[SPARC64]: Allocate and register the 4 sun4v mondo queues at bootup.
Needs to occur before we enable PSTATE_IE in %pstate. Signed-off-by: David S. Miller <davem@davemloft.net>
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ac29c11d4c
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@ -855,6 +855,51 @@ void init_irqwork_curcpu(void)
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memset(__irq_work + cpu, 0, sizeof(struct irq_work_struct));
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}
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static void __cpuinit init_one_mondo(unsigned long *pa_ptr, unsigned long type)
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{
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register unsigned long func __asm__("%o0");
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register unsigned long arg0 __asm__("%o1");
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register unsigned long arg1 __asm__("%o2");
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register unsigned long arg2 __asm__("%o3");
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unsigned long page = get_zeroed_page(GFP_ATOMIC);
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if (!page) {
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prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
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prom_halt();
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}
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*pa_ptr = __pa(page);
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func = HV_FAST_CPU_QCONF;
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arg0 = type;
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arg1 = *pa_ptr;
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arg2 = 128; /* XXX Implied by Niagara queue offsets. XXX */
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__asm__ __volatile__("ta %8"
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: "=&r" (func), "=&r" (arg0),
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"=&r" (arg1), "=&r" (arg2)
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: "0" (func), "1" (arg0),
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"2" (arg1), "3" (arg2),
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"i" (HV_FAST_TRAP));
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if (func != HV_EOK) {
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prom_printf("SUN4V: cpu_qconf(%lu) failed with error %lu\n",
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type, func);
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prom_halt();
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}
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}
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/* Allocate and init the mondo queues for this cpu. */
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void __cpuinit sun4v_init_mondo_queues(void)
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{
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int cpu = hard_smp_processor_id();
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struct trap_per_cpu *tb = &trap_block[cpu];
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init_one_mondo(&tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO);
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init_one_mondo(&tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO);
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init_one_mondo(&tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR);
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init_one_mondo(&tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR);
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}
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/* Only invoked on boot processor. */
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void __init init_IRQ(void)
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{
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@ -862,6 +907,9 @@ void __init init_IRQ(void)
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kill_prom_timer();
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memset(&ivector_table[0], 0, sizeof(ivector_table));
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if (tlb_type == hypervisor)
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sun4v_init_mondo_queues();
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/* We need to clear any IRQ's pending in the soft interrupt
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* registers, a spurious one could be left around from the
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* PROM timer which we just disabled.
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@ -309,7 +309,17 @@ do_unlock:
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call init_irqwork_curcpu
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nop
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call init_cur_cpu_trap
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sethi %hi(tlb_type), %g3
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lduw [%g3 + %lo(tlb_type)], %g2
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cmp %g2, 3
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bne,pt %icc, 1f
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nop
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call sun4v_init_mondo_queues
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nop
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1: call init_cur_cpu_trap
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nop
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/* Start using proper page size encodings in ctx register. */
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