NFS: NFSoRDMA Client Side Changes
In addition to a variety of bugfixes, these patches are mostly geared at enabling both swap and backchannel support to the NFS over RDMA client. Signed-off-by: Anna Schumake <Anna.Schumaker@Netapp.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJWN9tvAAoJENfLVL+wpUDrurkP/0exWvxZb0yAxOlquyh4tmUA ZO2rd+aap9iyaOPYGcWGd38x3WuvoecuaT/Eu+wRGkH89sF1LMSA+GUD7Ua/Ii7r 5spQP6tVRVswr+cK53H3fbEpQE7NTuBJB4RjivmddmduMPy678FcMSg4wfMqGwmw bFuCG70bYkEboIe+jiqNOzy6+Dkkn6h4pLg8S89jGj4XeV7JF9l7Cr0OfxZVWxme YX1y9lyIMB/dKsD8o2TjhfeSQ1TtmWDS1rw7MurIF/pIlmvTfAoivZFfflrAbOC6 vx/wWsswLKZPJ72QrXfnRErEI+8nea5mvBvgW2xQh1GywWQI5kzdvG3lVMmvjX3I g5X/e6oDaPAtBXuzundQP7vE3yYTGGH+C0rBoFRHR5ThuRZyNqQY0VphQ/nz+B6b m5loQaxKy+qDdNH0sTwaY3KUNoP4LHzMF+15g2nVIjKLZlG+7Yx8yJwhkKx4XXzn t8opIcLSNb6ehlQ/Vw3smhjc6NAXecg0jEeGkL1MV0Cqpk+Uyf1JFNyDL/nJkeI+ 3zlmVDIIbPCHz7gmqhlXCN6Ql6QttgGyt5mgW0f6Q1N0Miqix6DCywu9aaprLZPJ O+MOZaNa/6F0KSZpPTwqZ5i7nxrBu48r8OK0HDU7FOdJ1CZXd7y7TXrXnBVco4uu AXVsLy/tnjAlqOy07ibB =Ush5 -----END PGP SIGNATURE----- Merge tag 'nfs-rdma-4.4-2' of git://git.linux-nfs.org/projects/anna/nfs-rdma NFS: NFSoRDMA Client Side Changes In addition to a variety of bugfixes, these patches are mostly geared at enabling both swap and backchannel support to the NFS over RDMA client. Signed-off-by: Anna Schumake <Anna.Schumaker@Netapp.com>
This commit is contained in:
Коммит
ac3c860c75
|
@ -41,9 +41,13 @@ useless and be disabled, returning errors. So it is important to monitor
|
|||
the amount of free space and expand the <COW device> before it fills up.
|
||||
|
||||
<persistent?> is P (Persistent) or N (Not persistent - will not survive
|
||||
after reboot).
|
||||
The difference is that for transient snapshots less metadata must be
|
||||
saved on disk - they can be kept in memory by the kernel.
|
||||
after reboot). O (Overflow) can be added as a persistent store option
|
||||
to allow userspace to advertise its support for seeing "Overflow" in the
|
||||
snapshot status. So supported store types are "P", "PO" and "N".
|
||||
|
||||
The difference between persistent and transient is with transient
|
||||
snapshots less metadata must be saved on disk - they can be kept in
|
||||
memory by the kernel.
|
||||
|
||||
|
||||
* snapshot-merge <origin> <COW device> <persistent> <chunksize>
|
||||
|
|
|
@ -5,6 +5,7 @@ Required properties:
|
|||
- "renesas,usbhs-r8a7790"
|
||||
- "renesas,usbhs-r8a7791"
|
||||
- "renesas,usbhs-r8a7794"
|
||||
- "renesas,usbhs-r8a7795"
|
||||
- reg: Base address and length of the register for the USBHS
|
||||
- interrupts: Interrupt specifier for the USBHS
|
||||
- clocks: A list of phandle + clock specifier pairs
|
||||
|
|
38
MAINTAINERS
38
MAINTAINERS
|
@ -3591,6 +3591,13 @@ F: drivers/gpu/drm/i915/
|
|||
F: include/drm/i915*
|
||||
F: include/uapi/drm/i915*
|
||||
|
||||
DRM DRIVERS FOR ATMEL HLCDC
|
||||
M: Boris Brezillon <boris.brezillon@free-electrons.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/atmel-hlcdc/
|
||||
F: Documentation/devicetree/bindings/drm/atmel/
|
||||
|
||||
DRM DRIVERS FOR EXYNOS
|
||||
M: Inki Dae <inki.dae@samsung.com>
|
||||
M: Joonyoung Shim <jy0922.shim@samsung.com>
|
||||
|
@ -3619,6 +3626,14 @@ S: Maintained
|
|||
F: drivers/gpu/drm/imx/
|
||||
F: Documentation/devicetree/bindings/drm/imx/
|
||||
|
||||
DRM DRIVERS FOR GMA500 (Poulsbo, Moorestown and derivative chipsets)
|
||||
M: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
T: git git://github.com/patjak/drm-gma500
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/gma500
|
||||
F: include/drm/gma500*
|
||||
|
||||
DRM DRIVERS FOR NVIDIA TEGRA
|
||||
M: Thierry Reding <thierry.reding@gmail.com>
|
||||
M: Terje Bergström <tbergstrom@nvidia.com>
|
||||
|
@ -4003,7 +4018,7 @@ S: Maintained
|
|||
F: sound/usb/misc/ua101.c
|
||||
|
||||
EXTENSIBLE FIRMWARE INTERFACE (EFI)
|
||||
M: Matt Fleming <matt.fleming@intel.com>
|
||||
M: Matt Fleming <matt@codeblueprint.co.uk>
|
||||
L: linux-efi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
|
||||
S: Maintained
|
||||
|
@ -4018,7 +4033,7 @@ F: include/linux/efi*.h
|
|||
EFI VARIABLE FILESYSTEM
|
||||
M: Matthew Garrett <matthew.garrett@nebula.com>
|
||||
M: Jeremy Kerr <jk@ozlabs.org>
|
||||
M: Matt Fleming <matt.fleming@intel.com>
|
||||
M: Matt Fleming <matt@codeblueprint.co.uk>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
|
||||
L: linux-efi@vger.kernel.org
|
||||
S: Maintained
|
||||
|
@ -9101,6 +9116,15 @@ S: Supported
|
|||
F: Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
|
||||
F: drivers/net/ethernet/synopsys/dwc_eth_qos.c
|
||||
|
||||
SYNOPSYS DESIGNWARE I2C DRIVER
|
||||
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
M: Jarkko Nikula <jarkko.nikula@linux.intel.com>
|
||||
M: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/busses/i2c-designware-*
|
||||
F: include/linux/platform_data/i2c-designware.h
|
||||
|
||||
SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
|
||||
M: Seungwon Jeon <tgih.jun@samsung.com>
|
||||
M: Jaehoon Chung <jh80.chung@samsung.com>
|
||||
|
@ -9914,7 +9938,6 @@ S: Maintained
|
|||
F: drivers/staging/lustre
|
||||
|
||||
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
|
||||
M: Julian Andres Klode <jak@jak-linux.org>
|
||||
M: Marc Dietrich <marvin24@gmx.de>
|
||||
L: ac100@lists.launchpad.net (moderated for non-subscribers)
|
||||
L: linux-tegra@vger.kernel.org
|
||||
|
@ -11378,15 +11401,6 @@ W: http://oops.ghostprotocols.net:81/blog
|
|||
S: Maintained
|
||||
F: drivers/net/wireless/wl3501*
|
||||
|
||||
WM97XX TOUCHSCREEN DRIVERS
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Liam Girdwood <lrg@slimlogic.co.uk>
|
||||
L: linux-input@vger.kernel.org
|
||||
W: https://github.com/CirrusLogic/linux-drivers/wiki
|
||||
S: Supported
|
||||
F: drivers/input/touchscreen/*wm97*
|
||||
F: include/linux/wm97xx.h
|
||||
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
L: patches@opensource.wolfsonmicro.com
|
||||
T: git https://github.com/CirrusLogic/linux-drivers.git
|
||||
|
|
4
Makefile
4
Makefile
|
@ -1,8 +1,8 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Hurr durr I'ma sheep
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
@ -578,7 +578,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \
|
|||
sun4i-a10-hackberry.dtb \
|
||||
sun4i-a10-hyundai-a7hd.dtb \
|
||||
sun4i-a10-inet97fv2.dtb \
|
||||
sun4i-a10-itead-iteaduino-plus.dts \
|
||||
sun4i-a10-itead-iteaduino-plus.dtb \
|
||||
sun4i-a10-jesurun-q5.dtb \
|
||||
sun4i-a10-marsboard.dtb \
|
||||
sun4i-a10-mini-xplus.dtb \
|
||||
|
|
|
@ -98,6 +98,7 @@
|
|||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
clock-latency-ns = <200000>;
|
||||
opp-suspend;
|
||||
};
|
||||
opp07 {
|
||||
opp-hz = /bits/ 64 <900000000>;
|
||||
|
|
|
@ -197,6 +197,7 @@
|
|||
regulator-name = "P1.8V_LDO_OUT10";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo11_reg: LDO11 {
|
||||
|
|
|
@ -1117,7 +1117,7 @@
|
|||
interrupt-parent = <&combiner>;
|
||||
interrupts = <3 0>;
|
||||
clock-names = "sysmmu", "master";
|
||||
clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
|
||||
clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
|
||||
power-domains = <&disp_pd>;
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
|
|
@ -472,7 +472,6 @@
|
|||
*/
|
||||
pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>;
|
||||
pinctrl-names = "default";
|
||||
samsung,pwm-outputs = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
reg = <0x08>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <23 0x8>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
regulators {
|
||||
sw1_reg: sw1a {
|
||||
regulator-name = "SW1";
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <dt-bindings/clock/imx5-clock.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbh1>;
|
||||
regulator-name = "usbh1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
@ -47,7 +46,6 @@
|
|||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
|
|
@ -1627,6 +1627,7 @@
|
|||
"mix.0", "mix.1",
|
||||
"dvc.0", "dvc.1",
|
||||
"clk_a", "clk_b", "clk_c", "clk_i";
|
||||
power-domains = <&cpg_clocks>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
|
|
|
@ -1677,6 +1677,7 @@
|
|||
"mix.0", "mix.1",
|
||||
"dvc.0", "dvc.1",
|
||||
"clk_a", "clk_b", "clk_c", "clk_i";
|
||||
power-domains = <&cpg_clocks>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
|
|
|
@ -107,7 +107,7 @@
|
|||
720000 1200000
|
||||
528000 1100000
|
||||
312000 1000000
|
||||
144000 900000
|
||||
144000 1000000
|
||||
>;
|
||||
#cooling-cells = <2>;
|
||||
cooling-min-level = <0>;
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <asm/cputype.h>
|
||||
#include <asm/cp15.h>
|
||||
#include <asm/mcpm.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
||||
#include "regs-pmu.h"
|
||||
#include "common.h"
|
||||
|
@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
|
|||
cluster >= EXYNOS5420_NR_CLUSTERS)
|
||||
return -EINVAL;
|
||||
|
||||
exynos_cpu_power_up(cpunr);
|
||||
if (!exynos_cpu_power_state(cpunr)) {
|
||||
exynos_cpu_power_up(cpunr);
|
||||
|
||||
/*
|
||||
* This assumes the cluster number of the big cores(Cortex A15)
|
||||
* is 0 and the Little cores(Cortex A7) is 1.
|
||||
* When the system was booted from the Little core,
|
||||
* they should be reset during power up cpu.
|
||||
*/
|
||||
if (cluster &&
|
||||
cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) {
|
||||
/*
|
||||
* Before we reset the Little cores, we should wait
|
||||
* the SPARE2 register is set to 1 because the init
|
||||
* codes of the iROM will set the register after
|
||||
* initialization.
|
||||
*/
|
||||
while (!pmu_raw_readl(S5P_PMU_SPARE2))
|
||||
udelay(10);
|
||||
|
||||
pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu),
|
||||
EXYNOS_SWRESET);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr)
|
|||
#define SPREAD_ENABLE 0xF
|
||||
#define SPREAD_USE_STANDWFI 0xF
|
||||
|
||||
#define EXYNOS5420_KFC_CORE_RESET0 BIT(8)
|
||||
#define EXYNOS5420_KFC_ETM_RESET0 BIT(20)
|
||||
|
||||
#define EXYNOS5420_KFC_CORE_RESET(_nr) \
|
||||
((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr))
|
||||
|
||||
#define EXYNOS5420_BB_CON1 0x0784
|
||||
#define EXYNOS5420_BB_SEL_EN BIT(31)
|
||||
#define EXYNOS5420_BB_PMOS_EN BIT(7)
|
||||
|
|
|
@ -42,7 +42,7 @@ endif
|
|||
CHECKFLAGS += -D__aarch64__
|
||||
|
||||
ifeq ($(CONFIG_ARM64_ERRATUM_843419), y)
|
||||
CFLAGS_MODULE += -mcmodel=large
|
||||
KBUILD_CFLAGS_MODULE += -mcmodel=large
|
||||
endif
|
||||
|
||||
# Default value
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2)
|
||||
#define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5)
|
||||
|
||||
#define __NR_compat_syscalls 388
|
||||
#define __NR_compat_syscalls 390
|
||||
#endif
|
||||
|
||||
#define __ARCH_WANT_SYS_CLONE
|
||||
|
|
|
@ -797,3 +797,12 @@ __SYSCALL(__NR_memfd_create, sys_memfd_create)
|
|||
__SYSCALL(__NR_bpf, sys_bpf)
|
||||
#define __NR_execveat 387
|
||||
__SYSCALL(__NR_execveat, compat_sys_execveat)
|
||||
#define __NR_userfaultfd 388
|
||||
__SYSCALL(__NR_userfaultfd, sys_userfaultfd)
|
||||
#define __NR_membarrier 389
|
||||
__SYSCALL(__NR_membarrier, sys_membarrier)
|
||||
|
||||
/*
|
||||
* Please add new compat syscalls above this comment and update
|
||||
* __NR_compat_syscalls in asm/unistd.h.
|
||||
*/
|
||||
|
|
|
@ -19,6 +19,9 @@
|
|||
/* Required for AArch32 compatibility. */
|
||||
#define SA_RESTORER 0x04000000
|
||||
|
||||
#define MINSIGSTKSZ 5120
|
||||
#define SIGSTKSZ 16384
|
||||
|
||||
#include <asm-generic/signal.h>
|
||||
|
||||
#endif
|
||||
|
|
|
@ -256,6 +256,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
|
|||
*/
|
||||
#define ioremap_nocache(offset, size) \
|
||||
__ioremap_mode((offset), (size), _CACHE_UNCACHED)
|
||||
#define ioremap_uc ioremap_nocache
|
||||
|
||||
/*
|
||||
* ioremap_cachable - map bus memory into CPU space
|
||||
|
|
|
@ -13,16 +13,15 @@
|
|||
|
||||
#define __SWAB_64_THRU_32__
|
||||
|
||||
#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
|
||||
defined(_MIPS_ARCH_LOONGSON3A)
|
||||
#if !defined(__mips16) && \
|
||||
((defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
|
||||
defined(_MIPS_ARCH_LOONGSON3A))
|
||||
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u16 __arch_swab16(__u16 x)
|
||||
static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips32r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" wsbh %0, %1 \n"
|
||||
" .set pop \n"
|
||||
: "=r" (x)
|
||||
|
@ -32,13 +31,11 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
}
|
||||
#define __arch_swab16 __arch_swab16
|
||||
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u32 __arch_swab32(__u32 x)
|
||||
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips32r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" wsbh %0, %1 \n"
|
||||
" rotr %0, %0, 16 \n"
|
||||
" .set pop \n"
|
||||
|
@ -54,13 +51,11 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
* 64-bit kernel on r2 CPUs.
|
||||
*/
|
||||
#ifdef __mips64
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u64 __arch_swab64(__u64 x)
|
||||
static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips64r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" dsbh %0, %1 \n"
|
||||
" dshd %0, %0 \n"
|
||||
" .set pop \n"
|
||||
|
@ -71,5 +66,5 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
}
|
||||
#define __arch_swab64 __arch_swab64
|
||||
#endif /* __mips64 */
|
||||
#endif /* MIPS R2 or newer or Loongson 3A */
|
||||
#endif /* (not __mips16) and (MIPS R2 or newer or Loongson 3A) */
|
||||
#endif /* _ASM_SWAB_H */
|
||||
|
|
|
@ -111,7 +111,7 @@ CONFIG_SCSI_QLA_FC=m
|
|||
CONFIG_SCSI_QLA_ISCSI=m
|
||||
CONFIG_SCSI_LPFC=m
|
||||
CONFIG_SCSI_VIRTIO=m
|
||||
CONFIG_SCSI_DH=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_SCSI_DH_RDAC=m
|
||||
CONFIG_SCSI_DH_ALUA=m
|
||||
CONFIG_ATA=y
|
||||
|
|
|
@ -114,7 +114,7 @@ CONFIG_SCSI_QLA_FC=m
|
|||
CONFIG_SCSI_QLA_ISCSI=m
|
||||
CONFIG_SCSI_LPFC=m
|
||||
CONFIG_SCSI_VIRTIO=m
|
||||
CONFIG_SCSI_DH=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_SCSI_DH_RDAC=m
|
||||
CONFIG_SCSI_DH_ALUA=m
|
||||
CONFIG_ATA=y
|
||||
|
|
|
@ -61,8 +61,13 @@ struct machdep_calls {
|
|||
unsigned long addr,
|
||||
unsigned char *hpte_slot_array,
|
||||
int psize, int ssize, int local);
|
||||
/* special for kexec, to be called in real mode, linear mapping is
|
||||
* destroyed as well */
|
||||
/*
|
||||
* Special for kexec.
|
||||
* To be called in real mode with interrupts disabled. No locks are
|
||||
* taken as such, concurrent access on pre POWER5 hardware could result
|
||||
* in a deadlock.
|
||||
* The linear mapping is destroyed as well.
|
||||
*/
|
||||
void (*hpte_clear_all)(void);
|
||||
|
||||
void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
|
||||
|
|
|
@ -40,6 +40,11 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
|
|||
return (val + c->high_bits) & ~rhs;
|
||||
}
|
||||
|
||||
static inline unsigned long zero_bytemask(unsigned long mask)
|
||||
{
|
||||
return ~1ul << __fls(mask);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
|
|
|
@ -582,13 +582,21 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
|
|||
* be when they isi), and we are the only one left. We rely on our kernel
|
||||
* mapping being 0xC0's and the hardware ignoring those two real bits.
|
||||
*
|
||||
* This must be called with interrupts disabled.
|
||||
*
|
||||
* Taking the native_tlbie_lock is unsafe here due to the possibility of
|
||||
* lockdep being on. On pre POWER5 hardware, not taking the lock could
|
||||
* cause deadlock. POWER5 and newer not taking the lock is fine. This only
|
||||
* gets called during boot before secondary CPUs have come up and during
|
||||
* crashdump and all bets are off anyway.
|
||||
*
|
||||
* TODO: add batching support when enabled. remember, no dynamic memory here,
|
||||
* athough there is the control page available...
|
||||
*/
|
||||
static void native_hpte_clear(void)
|
||||
{
|
||||
unsigned long vpn = 0;
|
||||
unsigned long slot, slots, flags;
|
||||
unsigned long slot, slots;
|
||||
struct hash_pte *hptep = htab_address;
|
||||
unsigned long hpte_v;
|
||||
unsigned long pteg_count;
|
||||
|
@ -596,13 +604,6 @@ static void native_hpte_clear(void)
|
|||
|
||||
pteg_count = htab_hash_mask + 1;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
/* we take the tlbie lock and hold it. Some hardware will
|
||||
* deadlock if we try to tlbie from two processors at once.
|
||||
*/
|
||||
raw_spin_lock(&native_tlbie_lock);
|
||||
|
||||
slots = pteg_count * HPTES_PER_GROUP;
|
||||
|
||||
for (slot = 0; slot < slots; slot++, hptep++) {
|
||||
|
@ -614,8 +615,8 @@ static void native_hpte_clear(void)
|
|||
hpte_v = be64_to_cpu(hptep->v);
|
||||
|
||||
/*
|
||||
* Call __tlbie() here rather than tlbie() since we
|
||||
* already hold the native_tlbie_lock.
|
||||
* Call __tlbie() here rather than tlbie() since we can't take the
|
||||
* native_tlbie_lock.
|
||||
*/
|
||||
if (hpte_v & HPTE_V_VALID) {
|
||||
hpte_decode(hptep, slot, &psize, &apsize, &ssize, &vpn);
|
||||
|
@ -625,8 +626,6 @@ static void native_hpte_clear(void)
|
|||
}
|
||||
|
||||
asm volatile("eieio; tlbsync; ptesync":::"memory");
|
||||
raw_spin_unlock(&native_tlbie_lock);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -487,9 +487,12 @@ int opal_machine_check(struct pt_regs *regs)
|
|||
* PRD component would have already got notified about this
|
||||
* error through other channels.
|
||||
*
|
||||
* In any case, let us just fall through. We anyway heading
|
||||
* down to panic path.
|
||||
* If hardware marked this as an unrecoverable MCE, we are
|
||||
* going to panic anyway. Even if it didn't, it's not safe to
|
||||
* continue at this point, so we should explicitly panic.
|
||||
*/
|
||||
|
||||
panic("PowerNV Unrecovered Machine Check");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -194,11 +194,6 @@ static const struct os_area_db_id os_area_db_id_rtc_diff = {
|
|||
.key = OS_AREA_DB_KEY_RTC_DIFF
|
||||
};
|
||||
|
||||
static const struct os_area_db_id os_area_db_id_video_mode = {
|
||||
.owner = OS_AREA_DB_OWNER_LINUX,
|
||||
.key = OS_AREA_DB_KEY_VIDEO_MODE
|
||||
};
|
||||
|
||||
#define SECONDS_FROM_1970_TO_2000 946684800LL
|
||||
|
||||
/**
|
||||
|
|
|
@ -59,6 +59,7 @@ pages_do_alias(unsigned long addr1, unsigned long addr2)
|
|||
|
||||
#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
|
||||
extern void copy_page(void *to, void *from);
|
||||
#define copy_user_page(to, from, vaddr, pg) __copy_user(to, from, PAGE_SIZE)
|
||||
|
||||
struct page;
|
||||
struct vm_area_struct;
|
||||
|
|
|
@ -433,6 +433,7 @@ static struct crypto_alg algs[] = { {
|
|||
.blkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.setkey = aes_set_key,
|
||||
.encrypt = cbc_encrypt,
|
||||
.decrypt = cbc_decrypt,
|
||||
|
@ -452,6 +453,7 @@ static struct crypto_alg algs[] = { {
|
|||
.blkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.setkey = aes_set_key,
|
||||
.encrypt = ctr_crypt,
|
||||
.decrypt = ctr_crypt,
|
||||
|
|
|
@ -274,6 +274,7 @@ static struct crypto_alg algs[] = { {
|
|||
.blkcipher = {
|
||||
.min_keysize = CAMELLIA_MIN_KEY_SIZE,
|
||||
.max_keysize = CAMELLIA_MAX_KEY_SIZE,
|
||||
.ivsize = CAMELLIA_BLOCK_SIZE,
|
||||
.setkey = camellia_set_key,
|
||||
.encrypt = cbc_encrypt,
|
||||
.decrypt = cbc_decrypt,
|
||||
|
|
|
@ -429,6 +429,7 @@ static struct crypto_alg algs[] = { {
|
|||
.blkcipher = {
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = des_set_key,
|
||||
.encrypt = cbc_encrypt,
|
||||
.decrypt = cbc_decrypt,
|
||||
|
@ -485,6 +486,7 @@ static struct crypto_alg algs[] = { {
|
|||
.blkcipher = {
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES3_EDE_BLOCK_SIZE,
|
||||
.setkey = des3_ede_set_key,
|
||||
.encrypt = cbc3_encrypt,
|
||||
.decrypt = cbc3_decrypt,
|
||||
|
|
|
@ -1308,6 +1308,7 @@ config HIGHMEM
|
|||
config X86_PAE
|
||||
bool "PAE (Physical Address Extension) Support"
|
||||
depends on X86_32 && !HIGHMEM4G
|
||||
select SWIOTLB
|
||||
---help---
|
||||
PAE is required for NX support, and furthermore enables
|
||||
larger swapspace support for non-overcommit purposes. It
|
||||
|
|
|
@ -554,6 +554,11 @@ static int __init camellia_aesni_init(void)
|
|||
{
|
||||
const char *feature_name;
|
||||
|
||||
if (!cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {
|
||||
pr_info("AVX or AES-NI instructions are not detected.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &feature_name)) {
|
||||
pr_info("CPU feature '%s' is not supported.\n", feature_name);
|
||||
return -ENODEV;
|
||||
|
|
|
@ -1226,10 +1226,8 @@ void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
|
|||
|
||||
int kvm_is_in_guest(void);
|
||||
|
||||
int __x86_set_memory_region(struct kvm *kvm,
|
||||
const struct kvm_userspace_memory_region *mem);
|
||||
int x86_set_memory_region(struct kvm *kvm,
|
||||
const struct kvm_userspace_memory_region *mem);
|
||||
int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
|
||||
int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
|
||||
bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
|
||||
bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
|
||||
|
||||
|
|
|
@ -2418,7 +2418,7 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase)
|
|||
u64 val, cr0, cr4;
|
||||
u32 base3;
|
||||
u16 selector;
|
||||
int i;
|
||||
int i, r;
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
*reg_write(ctxt, i) = GET_SMSTATE(u64, smbase, 0x7ff8 - i * 8);
|
||||
|
@ -2460,13 +2460,17 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase)
|
|||
dt.address = GET_SMSTATE(u64, smbase, 0x7e68);
|
||||
ctxt->ops->set_gdt(ctxt, &dt);
|
||||
|
||||
r = rsm_enter_protected_mode(ctxt, cr0, cr4);
|
||||
if (r != X86EMUL_CONTINUE)
|
||||
return r;
|
||||
|
||||
for (i = 0; i < 6; i++) {
|
||||
int r = rsm_load_seg_64(ctxt, smbase, i);
|
||||
r = rsm_load_seg_64(ctxt, smbase, i);
|
||||
if (r != X86EMUL_CONTINUE)
|
||||
return r;
|
||||
}
|
||||
|
||||
return rsm_enter_protected_mode(ctxt, cr0, cr4);
|
||||
return X86EMUL_CONTINUE;
|
||||
}
|
||||
|
||||
static int em_rsm(struct x86_emulate_ctxt *ctxt)
|
||||
|
|
|
@ -4105,17 +4105,13 @@ static void seg_setup(int seg)
|
|||
static int alloc_apic_access_page(struct kvm *kvm)
|
||||
{
|
||||
struct page *page;
|
||||
struct kvm_userspace_memory_region kvm_userspace_mem;
|
||||
int r = 0;
|
||||
|
||||
mutex_lock(&kvm->slots_lock);
|
||||
if (kvm->arch.apic_access_page_done)
|
||||
goto out;
|
||||
kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
|
||||
kvm_userspace_mem.flags = 0;
|
||||
kvm_userspace_mem.guest_phys_addr = APIC_DEFAULT_PHYS_BASE;
|
||||
kvm_userspace_mem.memory_size = PAGE_SIZE;
|
||||
r = __x86_set_memory_region(kvm, &kvm_userspace_mem);
|
||||
r = __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
|
||||
APIC_DEFAULT_PHYS_BASE, PAGE_SIZE);
|
||||
if (r)
|
||||
goto out;
|
||||
|
||||
|
@ -4140,17 +4136,12 @@ static int alloc_identity_pagetable(struct kvm *kvm)
|
|||
{
|
||||
/* Called with kvm->slots_lock held. */
|
||||
|
||||
struct kvm_userspace_memory_region kvm_userspace_mem;
|
||||
int r = 0;
|
||||
|
||||
BUG_ON(kvm->arch.ept_identity_pagetable_done);
|
||||
|
||||
kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
|
||||
kvm_userspace_mem.flags = 0;
|
||||
kvm_userspace_mem.guest_phys_addr =
|
||||
kvm->arch.ept_identity_map_addr;
|
||||
kvm_userspace_mem.memory_size = PAGE_SIZE;
|
||||
r = __x86_set_memory_region(kvm, &kvm_userspace_mem);
|
||||
r = __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
|
||||
kvm->arch.ept_identity_map_addr, PAGE_SIZE);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
@ -4949,14 +4940,9 @@ static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
|
|||
static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
|
||||
{
|
||||
int ret;
|
||||
struct kvm_userspace_memory_region tss_mem = {
|
||||
.slot = TSS_PRIVATE_MEMSLOT,
|
||||
.guest_phys_addr = addr,
|
||||
.memory_size = PAGE_SIZE * 3,
|
||||
.flags = 0,
|
||||
};
|
||||
|
||||
ret = x86_set_memory_region(kvm, &tss_mem);
|
||||
ret = x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, addr,
|
||||
PAGE_SIZE * 3);
|
||||
if (ret)
|
||||
return ret;
|
||||
kvm->arch.tss_addr = addr;
|
||||
|
|
|
@ -6453,6 +6453,12 @@ static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
|
||||
!vcpu->arch.apf.halted);
|
||||
}
|
||||
|
||||
static int vcpu_run(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
int r;
|
||||
|
@ -6461,8 +6467,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu)
|
|||
vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
|
||||
|
||||
for (;;) {
|
||||
if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
|
||||
!vcpu->arch.apf.halted)
|
||||
if (kvm_vcpu_running(vcpu))
|
||||
r = vcpu_enter_guest(vcpu);
|
||||
else
|
||||
r = vcpu_block(kvm, vcpu);
|
||||
|
@ -7474,34 +7479,66 @@ void kvm_arch_sync_events(struct kvm *kvm)
|
|||
kvm_free_pit(kvm);
|
||||
}
|
||||
|
||||
int __x86_set_memory_region(struct kvm *kvm,
|
||||
const struct kvm_userspace_memory_region *mem)
|
||||
int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
|
||||
{
|
||||
int i, r;
|
||||
unsigned long hva;
|
||||
struct kvm_memslots *slots = kvm_memslots(kvm);
|
||||
struct kvm_memory_slot *slot, old;
|
||||
|
||||
/* Called with kvm->slots_lock held. */
|
||||
BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
|
||||
if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
|
||||
return -EINVAL;
|
||||
|
||||
slot = id_to_memslot(slots, id);
|
||||
if (size) {
|
||||
if (WARN_ON(slot->npages))
|
||||
return -EEXIST;
|
||||
|
||||
/*
|
||||
* MAP_SHARED to prevent internal slot pages from being moved
|
||||
* by fork()/COW.
|
||||
*/
|
||||
hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED | MAP_ANONYMOUS, 0);
|
||||
if (IS_ERR((void *)hva))
|
||||
return PTR_ERR((void *)hva);
|
||||
} else {
|
||||
if (!slot->npages)
|
||||
return 0;
|
||||
|
||||
hva = 0;
|
||||
}
|
||||
|
||||
old = *slot;
|
||||
for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
|
||||
struct kvm_userspace_memory_region m = *mem;
|
||||
struct kvm_userspace_memory_region m;
|
||||
|
||||
m.slot |= i << 16;
|
||||
m.slot = id | (i << 16);
|
||||
m.flags = 0;
|
||||
m.guest_phys_addr = gpa;
|
||||
m.userspace_addr = hva;
|
||||
m.memory_size = size;
|
||||
r = __kvm_set_memory_region(kvm, &m);
|
||||
if (r < 0)
|
||||
return r;
|
||||
}
|
||||
|
||||
if (!size) {
|
||||
r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
|
||||
WARN_ON(r < 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(__x86_set_memory_region);
|
||||
|
||||
int x86_set_memory_region(struct kvm *kvm,
|
||||
const struct kvm_userspace_memory_region *mem)
|
||||
int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
|
||||
{
|
||||
int r;
|
||||
|
||||
mutex_lock(&kvm->slots_lock);
|
||||
r = __x86_set_memory_region(kvm, mem);
|
||||
r = __x86_set_memory_region(kvm, id, gpa, size);
|
||||
mutex_unlock(&kvm->slots_lock);
|
||||
|
||||
return r;
|
||||
|
@ -7516,16 +7553,9 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
|
|||
* unless the the memory map has changed due to process exit
|
||||
* or fd copying.
|
||||
*/
|
||||
struct kvm_userspace_memory_region mem;
|
||||
memset(&mem, 0, sizeof(mem));
|
||||
mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
|
||||
x86_set_memory_region(kvm, &mem);
|
||||
|
||||
mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
|
||||
x86_set_memory_region(kvm, &mem);
|
||||
|
||||
mem.slot = TSS_PRIVATE_MEMSLOT;
|
||||
x86_set_memory_region(kvm, &mem);
|
||||
x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
|
||||
x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
|
||||
x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
|
||||
}
|
||||
kvm_iommu_unmap_guest(kvm);
|
||||
kfree(kvm->arch.vpic);
|
||||
|
@ -7628,27 +7658,6 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
const struct kvm_userspace_memory_region *mem,
|
||||
enum kvm_mr_change change)
|
||||
{
|
||||
/*
|
||||
* Only private memory slots need to be mapped here since
|
||||
* KVM_SET_MEMORY_REGION ioctl is no longer supported.
|
||||
*/
|
||||
if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
|
||||
unsigned long userspace_addr;
|
||||
|
||||
/*
|
||||
* MAP_SHARED to prevent internal slot pages from being moved
|
||||
* by fork()/COW.
|
||||
*/
|
||||
userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
|
||||
PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED | MAP_ANONYMOUS, 0);
|
||||
|
||||
if (IS_ERR((void *)userspace_addr))
|
||||
return PTR_ERR((void *)userspace_addr);
|
||||
|
||||
memslot->userspace_addr = userspace_addr;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -7710,17 +7719,6 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,
|
|||
{
|
||||
int nr_mmu_pages = 0;
|
||||
|
||||
if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
|
||||
int ret;
|
||||
|
||||
ret = vm_munmap(old->userspace_addr,
|
||||
old->npages * PAGE_SIZE);
|
||||
if (ret < 0)
|
||||
printk(KERN_WARNING
|
||||
"kvm_vm_ioctl_set_memory_region: "
|
||||
"failed to munmap memory\n");
|
||||
}
|
||||
|
||||
if (!kvm->arch.n_requested_mmu_pages)
|
||||
nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
|
||||
|
||||
|
@ -7769,19 +7767,36 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
|
|||
kvm_mmu_invalidate_zap_all_pages(kvm);
|
||||
}
|
||||
|
||||
static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (!list_empty_careful(&vcpu->async_pf.done))
|
||||
return true;
|
||||
|
||||
if (kvm_apic_has_events(vcpu))
|
||||
return true;
|
||||
|
||||
if (vcpu->arch.pv.pv_unhalted)
|
||||
return true;
|
||||
|
||||
if (atomic_read(&vcpu->arch.nmi_queued))
|
||||
return true;
|
||||
|
||||
if (test_bit(KVM_REQ_SMI, &vcpu->requests))
|
||||
return true;
|
||||
|
||||
if (kvm_arch_interrupt_allowed(vcpu) &&
|
||||
kvm_cpu_has_interrupt(vcpu))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
|
||||
kvm_x86_ops->check_nested_events(vcpu, false);
|
||||
|
||||
return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
|
||||
!vcpu->arch.apf.halted)
|
||||
|| !list_empty_careful(&vcpu->async_pf.done)
|
||||
|| kvm_apic_has_events(vcpu)
|
||||
|| vcpu->arch.pv.pv_unhalted
|
||||
|| atomic_read(&vcpu->arch.nmi_queued) ||
|
||||
(kvm_arch_interrupt_allowed(vcpu) &&
|
||||
kvm_cpu_has_interrupt(vcpu));
|
||||
return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
|
||||
|
|
|
@ -544,7 +544,8 @@ static int ahash_prepare_alg(struct ahash_alg *alg)
|
|||
struct crypto_alg *base = &alg->halg.base;
|
||||
|
||||
if (alg->halg.digestsize > PAGE_SIZE / 8 ||
|
||||
alg->halg.statesize > PAGE_SIZE / 8)
|
||||
alg->halg.statesize > PAGE_SIZE / 8 ||
|
||||
alg->halg.statesize == 0)
|
||||
return -EINVAL;
|
||||
|
||||
base->cra_type = &crypto_ahash_type;
|
||||
|
|
|
@ -61,6 +61,7 @@ ACPI_GLOBAL(struct acpi_table_header, acpi_gbl_original_dsdt_header);
|
|||
ACPI_INIT_GLOBAL(u32, acpi_gbl_dsdt_index, ACPI_INVALID_TABLE_INDEX);
|
||||
ACPI_INIT_GLOBAL(u32, acpi_gbl_facs_index, ACPI_INVALID_TABLE_INDEX);
|
||||
ACPI_INIT_GLOBAL(u32, acpi_gbl_xfacs_index, ACPI_INVALID_TABLE_INDEX);
|
||||
ACPI_INIT_GLOBAL(u32, acpi_gbl_fadt_index, ACPI_INVALID_TABLE_INDEX);
|
||||
|
||||
#if (!ACPI_REDUCED_HARDWARE)
|
||||
ACPI_GLOBAL(struct acpi_table_facs *, acpi_gbl_FACS);
|
||||
|
|
|
@ -85,7 +85,7 @@ void acpi_tb_set_table_loaded_flag(u32 table_index, u8 is_loaded);
|
|||
/*
|
||||
* tbfadt - FADT parse/convert/validate
|
||||
*/
|
||||
void acpi_tb_parse_fadt(u32 table_index);
|
||||
void acpi_tb_parse_fadt(void);
|
||||
|
||||
void acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 length);
|
||||
|
||||
|
@ -138,8 +138,6 @@ acpi_status acpi_tb_get_owner_id(u32 table_index, acpi_owner_id *owner_id);
|
|||
*/
|
||||
acpi_status acpi_tb_initialize_facs(void);
|
||||
|
||||
u8 acpi_tb_tables_loaded(void);
|
||||
|
||||
void
|
||||
acpi_tb_print_table_header(acpi_physical_address address,
|
||||
struct acpi_table_header *header);
|
||||
|
|
|
@ -71,7 +71,7 @@ acpi_status acpi_enable(void)
|
|||
|
||||
/* ACPI tables must be present */
|
||||
|
||||
if (!acpi_tb_tables_loaded()) {
|
||||
if (acpi_gbl_fadt_index == ACPI_INVALID_TABLE_INDEX) {
|
||||
return_ACPI_STATUS(AE_NO_ACPI_TABLES);
|
||||
}
|
||||
|
||||
|
|
|
@ -298,7 +298,7 @@ acpi_tb_select_address(char *register_name, u32 address32, u64 address64)
|
|||
*
|
||||
* FUNCTION: acpi_tb_parse_fadt
|
||||
*
|
||||
* PARAMETERS: table_index - Index for the FADT
|
||||
* PARAMETERS: None
|
||||
*
|
||||
* RETURN: None
|
||||
*
|
||||
|
@ -307,7 +307,7 @@ acpi_tb_select_address(char *register_name, u32 address32, u64 address64)
|
|||
*
|
||||
******************************************************************************/
|
||||
|
||||
void acpi_tb_parse_fadt(u32 table_index)
|
||||
void acpi_tb_parse_fadt(void)
|
||||
{
|
||||
u32 length;
|
||||
struct acpi_table_header *table;
|
||||
|
@ -319,11 +319,11 @@ void acpi_tb_parse_fadt(u32 table_index)
|
|||
* Get a local copy of the FADT and convert it to a common format
|
||||
* Map entire FADT, assumed to be smaller than one page.
|
||||
*/
|
||||
length = acpi_gbl_root_table_list.tables[table_index].length;
|
||||
length = acpi_gbl_root_table_list.tables[acpi_gbl_fadt_index].length;
|
||||
|
||||
table =
|
||||
acpi_os_map_memory(acpi_gbl_root_table_list.tables[table_index].
|
||||
address, length);
|
||||
acpi_os_map_memory(acpi_gbl_root_table_list.
|
||||
tables[acpi_gbl_fadt_index].address, length);
|
||||
if (!table) {
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -97,29 +97,6 @@ acpi_status acpi_tb_initialize_facs(void)
|
|||
}
|
||||
#endif /* !ACPI_REDUCED_HARDWARE */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: acpi_tb_tables_loaded
|
||||
*
|
||||
* PARAMETERS: None
|
||||
*
|
||||
* RETURN: TRUE if required ACPI tables are loaded
|
||||
*
|
||||
* DESCRIPTION: Determine if the minimum required ACPI tables are present
|
||||
* (FADT, FACS, DSDT)
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
u8 acpi_tb_tables_loaded(void)
|
||||
{
|
||||
|
||||
if (acpi_gbl_root_table_list.current_table_count >= 4) {
|
||||
return (TRUE);
|
||||
}
|
||||
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: acpi_tb_check_dsdt_header
|
||||
|
@ -392,7 +369,8 @@ acpi_status __init acpi_tb_parse_root_table(acpi_physical_address rsdp_address)
|
|||
ACPI_COMPARE_NAME(&acpi_gbl_root_table_list.
|
||||
tables[table_index].signature,
|
||||
ACPI_SIG_FADT)) {
|
||||
acpi_tb_parse_fadt(table_index);
|
||||
acpi_gbl_fadt_index = table_index;
|
||||
acpi_tb_parse_fadt();
|
||||
}
|
||||
|
||||
next_table:
|
||||
|
|
|
@ -77,13 +77,16 @@ static bool default_stop_ok(struct device *dev)
|
|||
dev_update_qos_constraint);
|
||||
|
||||
if (constraint_ns > 0) {
|
||||
constraint_ns -= td->start_latency_ns;
|
||||
constraint_ns -= td->save_state_latency_ns +
|
||||
td->stop_latency_ns +
|
||||
td->start_latency_ns +
|
||||
td->restore_state_latency_ns;
|
||||
if (constraint_ns == 0)
|
||||
return false;
|
||||
}
|
||||
td->effective_constraint_ns = constraint_ns;
|
||||
td->cached_stop_ok = constraint_ns > td->stop_latency_ns ||
|
||||
constraint_ns == 0;
|
||||
td->cached_stop_ok = constraint_ns >= 0;
|
||||
|
||||
/*
|
||||
* The children have been suspended already, so we don't need to take
|
||||
* their stop latencies into account here.
|
||||
|
@ -126,18 +129,6 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)
|
|||
|
||||
off_on_time_ns = genpd->power_off_latency_ns +
|
||||
genpd->power_on_latency_ns;
|
||||
/*
|
||||
* It doesn't make sense to remove power from the domain if saving
|
||||
* the state of all devices in it and the power off/power on operations
|
||||
* take too much time.
|
||||
*
|
||||
* All devices in this domain have been stopped already at this point.
|
||||
*/
|
||||
list_for_each_entry(pdd, &genpd->dev_list, list_node) {
|
||||
if (pdd->dev->driver)
|
||||
off_on_time_ns +=
|
||||
to_gpd_data(pdd)->td.save_state_latency_ns;
|
||||
}
|
||||
|
||||
min_off_time_ns = -1;
|
||||
/*
|
||||
|
@ -193,7 +184,6 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)
|
|||
* constraint_ns cannot be negative here, because the device has
|
||||
* been suspended.
|
||||
*/
|
||||
constraint_ns -= td->restore_state_latency_ns;
|
||||
if (constraint_ns <= off_on_time_ns)
|
||||
return false;
|
||||
|
||||
|
|
|
@ -1863,9 +1863,11 @@ static void rbd_osd_req_callback(struct ceph_osd_request *osd_req,
|
|||
rbd_osd_read_callback(obj_request);
|
||||
break;
|
||||
case CEPH_OSD_OP_SETALLOCHINT:
|
||||
rbd_assert(osd_req->r_ops[1].op == CEPH_OSD_OP_WRITE);
|
||||
rbd_assert(osd_req->r_ops[1].op == CEPH_OSD_OP_WRITE ||
|
||||
osd_req->r_ops[1].op == CEPH_OSD_OP_WRITEFULL);
|
||||
/* fall through */
|
||||
case CEPH_OSD_OP_WRITE:
|
||||
case CEPH_OSD_OP_WRITEFULL:
|
||||
rbd_osd_write_callback(obj_request);
|
||||
break;
|
||||
case CEPH_OSD_OP_STAT:
|
||||
|
@ -2401,7 +2403,10 @@ static void rbd_img_obj_request_fill(struct rbd_obj_request *obj_request,
|
|||
opcode = CEPH_OSD_OP_ZERO;
|
||||
}
|
||||
} else if (op_type == OBJ_OP_WRITE) {
|
||||
opcode = CEPH_OSD_OP_WRITE;
|
||||
if (!offset && length == object_size)
|
||||
opcode = CEPH_OSD_OP_WRITEFULL;
|
||||
else
|
||||
opcode = CEPH_OSD_OP_WRITE;
|
||||
osd_req_op_alloc_hint_init(osd_request, num_ops,
|
||||
object_size, object_size);
|
||||
num_ops++;
|
||||
|
@ -3760,6 +3765,7 @@ static int rbd_init_disk(struct rbd_device *rbd_dev)
|
|||
/* set io sizes to object size */
|
||||
segment_size = rbd_obj_bytes(&rbd_dev->header);
|
||||
blk_queue_max_hw_sectors(q, segment_size / SECTOR_SIZE);
|
||||
q->limits.max_sectors = queue_max_hw_sectors(q);
|
||||
blk_queue_max_segments(q, segment_size / SECTOR_SIZE);
|
||||
blk_queue_max_segment_size(q, segment_size);
|
||||
blk_queue_io_min(q, segment_size);
|
||||
|
|
|
@ -36,7 +36,6 @@ config ARM_CCI400_PORT_CTRL
|
|||
|
||||
config ARM_CCI500_PMU
|
||||
bool "ARM CCI500 PMU support"
|
||||
default y
|
||||
depends on (ARM && CPU_V7) || ARM64
|
||||
depends on PERF_EVENTS
|
||||
select ARM_CCI_PMU
|
||||
|
|
|
@ -197,6 +197,7 @@ static void __init of_cpu_clk_setup(struct device_node *node)
|
|||
for_each_node_by_type(dn, "cpu") {
|
||||
struct clk_init_data init;
|
||||
struct clk *clk;
|
||||
struct clk *parent_clk;
|
||||
char *clk_name = kzalloc(5, GFP_KERNEL);
|
||||
int cpu, err;
|
||||
|
||||
|
@ -208,8 +209,9 @@ static void __init of_cpu_clk_setup(struct device_node *node)
|
|||
goto bail_out;
|
||||
|
||||
sprintf(clk_name, "cpu%d", cpu);
|
||||
parent_clk = of_clk_get(node, 0);
|
||||
|
||||
cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0);
|
||||
cpuclk[cpu].parent_name = __clk_get_name(parent_clk);
|
||||
cpuclk[cpu].clk_name = clk_name;
|
||||
cpuclk[cpu].cpu = cpu;
|
||||
cpuclk[cpu].reg_base = clock_complex_base;
|
||||
|
|
|
@ -164,7 +164,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
* the values for DIV_COPY and DIV_HPM dividers need not be set.
|
||||
*/
|
||||
div0 = cfg_data->div0;
|
||||
if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
|
||||
div1 = cfg_data->div1;
|
||||
if (readl(base + E4210_SRC_CPU) & E4210_MUX_HPM_MASK)
|
||||
div1 = readl(base + E4210_DIV_CPU1) &
|
||||
|
@ -185,7 +185,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
alt_div = DIV_ROUND_UP(alt_prate, tmp_rate) - 1;
|
||||
WARN_ON(alt_div >= MAX_DIV);
|
||||
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
/*
|
||||
* In Exynos4210, ATB clock parent is also mout_core. So
|
||||
* ATB clock also needs to be mantained at safe speed.
|
||||
|
@ -206,7 +206,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
writel(div0, base + E4210_DIV_CPU0);
|
||||
wait_until_divider_stable(base + E4210_DIV_STAT_CPU0, DIV_MASK_ALL);
|
||||
|
||||
if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
|
||||
writel(div1, base + E4210_DIV_CPU1);
|
||||
wait_until_divider_stable(base + E4210_DIV_STAT_CPU1,
|
||||
DIV_MASK_ALL);
|
||||
|
@ -225,7 +225,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
|
|||
unsigned long mux_reg;
|
||||
|
||||
/* find out the divider values to use for clock data */
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
while ((cfg_data->prate * 1000) != ndata->new_rate) {
|
||||
if (cfg_data->prate == 0)
|
||||
return -EINVAL;
|
||||
|
@ -240,7 +240,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
|
|||
writel(mux_reg & ~(1 << 16), base + E4210_SRC_CPU);
|
||||
wait_until_mux_stable(base + E4210_STAT_CPU, 16, 1);
|
||||
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK);
|
||||
div_mask |= E4210_DIV0_ATB_MASK;
|
||||
}
|
||||
|
|
|
@ -374,7 +374,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
|
|||
DT_CLK(NULL, "gpio2_ick", "gpio2_ick"),
|
||||
DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
|
||||
DT_CLK(NULL, "uart3_ick", "uart3_ick"),
|
||||
DT_CLK(NULL, "uart4_ick", "uart4_ick"),
|
||||
DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
|
||||
DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
|
||||
DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
|
||||
|
@ -519,6 +518,7 @@ static struct ti_dt_clk am35xx_clks[] = {
|
|||
static struct ti_dt_clk omap36xx_clks[] = {
|
||||
DT_CLK(NULL, "omap_192m_alwon_fck", "omap_192m_alwon_fck"),
|
||||
DT_CLK(NULL, "uart4_fck", "uart4_fck"),
|
||||
DT_CLK(NULL, "uart4_ick", "uart4_ick"),
|
||||
{ .node_name = NULL },
|
||||
};
|
||||
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
|
||||
#include "clock.h"
|
||||
|
||||
#define DRA7_DPLL_ABE_DEFFREQ 180633600
|
||||
#define DRA7_DPLL_GMAC_DEFFREQ 1000000000
|
||||
#define DRA7_DPLL_USB_DEFFREQ 960000000
|
||||
|
||||
|
@ -313,27 +312,12 @@ static struct ti_dt_clk dra7xx_clks[] = {
|
|||
int __init dra7xx_dt_clk_init(void)
|
||||
{
|
||||
int rc;
|
||||
struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
|
||||
struct clk *dpll_ck, *hdcp_ck;
|
||||
|
||||
ti_dt_clocks_register(dra7xx_clks);
|
||||
|
||||
omap2_clk_disable_autoidle_all();
|
||||
|
||||
abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
|
||||
sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
|
||||
|
||||
rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
|
||||
if (!rc)
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
|
||||
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
|
||||
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
|
||||
if (rc)
|
||||
|
|
|
@ -222,7 +222,7 @@ int omap2_dflt_clk_enable(struct clk_hw *hw)
|
|||
}
|
||||
}
|
||||
|
||||
if (unlikely(!clk->enable_reg)) {
|
||||
if (unlikely(IS_ERR(clk->enable_reg))) {
|
||||
pr_err("%s: %s missing enable_reg\n", __func__,
|
||||
clk_hw_get_name(hw));
|
||||
ret = -EINVAL;
|
||||
|
@ -264,7 +264,7 @@ void omap2_dflt_clk_disable(struct clk_hw *hw)
|
|||
u32 v;
|
||||
|
||||
clk = to_clk_hw_omap(hw);
|
||||
if (!clk->enable_reg) {
|
||||
if (IS_ERR(clk->enable_reg)) {
|
||||
/*
|
||||
* 'independent' here refers to a clock which is not
|
||||
* controlled by its parent.
|
||||
|
|
|
@ -149,6 +149,9 @@ static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
|
|||
{
|
||||
struct acpi_cpufreq_data *data = policy->driver_data;
|
||||
|
||||
if (unlikely(!data))
|
||||
return -ENODEV;
|
||||
|
||||
return cpufreq_show_cpus(data->freqdomain_cpus, buf);
|
||||
}
|
||||
|
||||
|
|
|
@ -1436,8 +1436,10 @@ static void cpufreq_offline_finish(unsigned int cpu)
|
|||
* since this is a core component, and is essential for the
|
||||
* subsequent light-weight ->init() to succeed.
|
||||
*/
|
||||
if (cpufreq_driver->exit)
|
||||
if (cpufreq_driver->exit) {
|
||||
cpufreq_driver->exit(policy);
|
||||
policy->freq_table = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -776,6 +776,11 @@ static inline void intel_pstate_sample(struct cpudata *cpu)
|
|||
local_irq_save(flags);
|
||||
rdmsrl(MSR_IA32_APERF, aperf);
|
||||
rdmsrl(MSR_IA32_MPERF, mperf);
|
||||
if (cpu->prev_mperf == mperf) {
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
|
||||
tsc = rdtsc();
|
||||
local_irq_restore(flags);
|
||||
|
||||
|
|
|
@ -492,7 +492,7 @@ struct devfreq *devfreq_add_device(struct device *dev,
|
|||
if (err) {
|
||||
put_device(&devfreq->dev);
|
||||
mutex_unlock(&devfreq->lock);
|
||||
goto err_dev;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
mutex_unlock(&devfreq->lock);
|
||||
|
@ -518,7 +518,6 @@ struct devfreq *devfreq_add_device(struct device *dev,
|
|||
err_init:
|
||||
list_del(&devfreq->node);
|
||||
device_unregister(&devfreq->dev);
|
||||
err_dev:
|
||||
kfree(devfreq);
|
||||
err_out:
|
||||
return ERR_PTR(err);
|
||||
|
@ -795,8 +794,10 @@ static ssize_t governor_store(struct device *dev, struct device_attribute *attr,
|
|||
ret = PTR_ERR(governor);
|
||||
goto out;
|
||||
}
|
||||
if (df->governor == governor)
|
||||
if (df->governor == governor) {
|
||||
ret = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (df->governor) {
|
||||
ret = df->governor->event_handler(df, DEVFREQ_GOV_STOP, NULL);
|
||||
|
|
|
@ -672,8 +672,12 @@ int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev)
|
|||
/* disp clock */
|
||||
adev->clock.default_dispclk =
|
||||
le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq);
|
||||
if (adev->clock.default_dispclk == 0)
|
||||
adev->clock.default_dispclk = 54000; /* 540 Mhz */
|
||||
/* set a reasonable default for DP */
|
||||
if (adev->clock.default_dispclk < 53900) {
|
||||
DRM_INFO("Changing default dispclk from %dMhz to 600Mhz\n",
|
||||
adev->clock.default_dispclk / 100);
|
||||
adev->clock.default_dispclk = 60000;
|
||||
}
|
||||
adev->clock.dp_extclk =
|
||||
le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq);
|
||||
adev->clock.current_dispclk = adev->clock.default_dispclk;
|
||||
|
|
|
@ -177,7 +177,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
|
|||
|
||||
/* get chunks */
|
||||
INIT_LIST_HEAD(&p->validated);
|
||||
chunk_array_user = (uint64_t __user *)(cs->in.chunks);
|
||||
chunk_array_user = (uint64_t __user *)(unsigned long)(cs->in.chunks);
|
||||
if (copy_from_user(chunk_array, chunk_array_user,
|
||||
sizeof(uint64_t)*cs->in.num_chunks)) {
|
||||
ret = -EFAULT;
|
||||
|
@ -197,7 +197,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
|
|||
struct drm_amdgpu_cs_chunk user_chunk;
|
||||
uint32_t __user *cdata;
|
||||
|
||||
chunk_ptr = (void __user *)chunk_array[i];
|
||||
chunk_ptr = (void __user *)(unsigned long)chunk_array[i];
|
||||
if (copy_from_user(&user_chunk, chunk_ptr,
|
||||
sizeof(struct drm_amdgpu_cs_chunk))) {
|
||||
ret = -EFAULT;
|
||||
|
@ -208,7 +208,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
|
|||
p->chunks[i].length_dw = user_chunk.length_dw;
|
||||
|
||||
size = p->chunks[i].length_dw;
|
||||
cdata = (void __user *)user_chunk.chunk_data;
|
||||
cdata = (void __user *)(unsigned long)user_chunk.chunk_data;
|
||||
p->chunks[i].user_ptr = cdata;
|
||||
|
||||
p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t));
|
||||
|
|
|
@ -85,8 +85,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
|
|||
/* We borrow the event spin lock for protecting flip_status */
|
||||
spin_lock_irqsave(&crtc->dev->event_lock, flags);
|
||||
|
||||
/* set the proper interrupt */
|
||||
amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id);
|
||||
/* do the flip (mmio) */
|
||||
adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base);
|
||||
/* set the flip status */
|
||||
|
|
|
@ -242,11 +242,11 @@ static struct pci_device_id pciidlist[] = {
|
|||
{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
|
||||
#endif
|
||||
/* topaz */
|
||||
{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
|
||||
{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
|
||||
{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
|
||||
{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
|
||||
{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
|
||||
{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},
|
||||
{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},
|
||||
{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},
|
||||
{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},
|
||||
{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT},
|
||||
/* tonga */
|
||||
{0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
|
||||
{0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
|
||||
|
|
|
@ -402,3 +402,19 @@ bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj)
|
|||
return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev)
|
||||
{
|
||||
struct amdgpu_fbdev *afbdev = adev->mode_info.rfbdev;
|
||||
struct drm_fb_helper *fb_helper;
|
||||
int ret;
|
||||
|
||||
if (!afbdev)
|
||||
return;
|
||||
|
||||
fb_helper = &afbdev->helper;
|
||||
|
||||
ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
|
||||
if (ret)
|
||||
DRM_DEBUG("failed to restore crtc mode\n");
|
||||
}
|
||||
|
|
|
@ -485,7 +485,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
* Outdated mess for old drm with Xorg being in charge (void function now).
|
||||
*/
|
||||
/**
|
||||
* amdgpu_driver_firstopen_kms - drm callback for last close
|
||||
* amdgpu_driver_lastclose_kms - drm callback for last close
|
||||
*
|
||||
* @dev: drm dev pointer
|
||||
*
|
||||
|
@ -493,6 +493,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
*/
|
||||
void amdgpu_driver_lastclose_kms(struct drm_device *dev)
|
||||
{
|
||||
struct amdgpu_device *adev = dev->dev_private;
|
||||
|
||||
amdgpu_fbdev_restore_mode(adev);
|
||||
vga_switcheroo_process_delayed_switch();
|
||||
}
|
||||
|
||||
|
|
|
@ -567,6 +567,7 @@ void amdgpu_fbdev_fini(struct amdgpu_device *adev);
|
|||
void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state);
|
||||
int amdgpu_fbdev_total_size(struct amdgpu_device *adev);
|
||||
bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj);
|
||||
void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev);
|
||||
|
||||
void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev);
|
||||
|
||||
|
|
|
@ -455,8 +455,10 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
|
|||
return -ENOMEM;
|
||||
|
||||
r = amdgpu_ib_get(ring, NULL, ndw * 4, ib);
|
||||
if (r)
|
||||
if (r) {
|
||||
kfree(ib);
|
||||
return r;
|
||||
}
|
||||
ib->length_dw = 0;
|
||||
|
||||
/* walk over the address space and update the page directory */
|
||||
|
|
|
@ -6185,6 +6185,11 @@ static int ci_dpm_late_init(void *handle)
|
|||
if (!amdgpu_dpm)
|
||||
return 0;
|
||||
|
||||
/* init the sysfs and debugfs files late */
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = ci_set_temperature_range(adev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
@ -6232,9 +6237,6 @@ static int ci_dpm_sw_init(void *handle)
|
|||
adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
|
||||
if (amdgpu_dpm == 1)
|
||||
amdgpu_pm_print_power_states(adev);
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
goto dpm_failed;
|
||||
mutex_unlock(&adev->pm.mutex);
|
||||
DRM_INFO("amdgpu: dpm initialized\n");
|
||||
|
||||
|
|
|
@ -1567,6 +1567,9 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
|||
int ret, i;
|
||||
u16 tmp16;
|
||||
|
||||
if (pci_is_root_bus(adev->pdev->bus))
|
||||
return;
|
||||
|
||||
if (amdgpu_pcie_gen2 == 0)
|
||||
return;
|
||||
|
||||
|
|
|
@ -596,6 +596,12 @@ static int cz_dpm_late_init(void *handle)
|
|||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
|
||||
if (amdgpu_dpm) {
|
||||
int ret;
|
||||
/* init the sysfs and debugfs files late */
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* powerdown unused blocks for now */
|
||||
cz_dpm_powergate_uvd(adev, true);
|
||||
cz_dpm_powergate_vce(adev, true);
|
||||
|
@ -632,10 +638,6 @@ static int cz_dpm_sw_init(void *handle)
|
|||
if (amdgpu_dpm == 1)
|
||||
amdgpu_pm_print_power_states(adev);
|
||||
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
goto dpm_init_failed;
|
||||
|
||||
mutex_unlock(&adev->pm.mutex);
|
||||
DRM_INFO("amdgpu: dpm initialized\n");
|
||||
|
||||
|
|
|
@ -255,6 +255,24 @@ static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
|
|||
return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
|
||||
}
|
||||
|
||||
static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Enable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_get(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Disable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
/**
|
||||
* dce_v10_0_page_flip - pageflip callback.
|
||||
*
|
||||
|
@ -2663,9 +2681,10 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
dce_v10_0_vga_enable(crtc, true);
|
||||
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
|
||||
dce_v10_0_vga_enable(crtc, false);
|
||||
/* Make sure VBLANK interrupt is still enabled */
|
||||
/* Make sure VBLANK and PFLIP interrupts are still enabled */
|
||||
type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_update(adev, &adev->crtc_irq, type);
|
||||
amdgpu_irq_update(adev, &adev->pageflip_irq, type);
|
||||
drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
|
||||
dce_v10_0_crtc_load_lut(crtc);
|
||||
break;
|
||||
|
@ -3025,6 +3044,8 @@ static int dce_v10_0_hw_init(void *handle)
|
|||
dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v10_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3039,6 +3060,8 @@ static int dce_v10_0_hw_fini(void *handle)
|
|||
dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v10_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3050,6 +3073,8 @@ static int dce_v10_0_suspend(void *handle)
|
|||
|
||||
dce_v10_0_hpd_fini(adev);
|
||||
|
||||
dce_v10_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3075,6 +3100,8 @@ static int dce_v10_0_resume(void *handle)
|
|||
/* initialize hpd */
|
||||
dce_v10_0_hpd_init(adev);
|
||||
|
||||
dce_v10_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3369,7 +3396,6 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev,
|
|||
spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
|
||||
|
||||
drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
|
||||
queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
|
|||
return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
|
||||
}
|
||||
|
||||
static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Enable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_get(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Disable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
/**
|
||||
* dce_v11_0_page_flip - pageflip callback.
|
||||
*
|
||||
|
@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
dce_v11_0_vga_enable(crtc, true);
|
||||
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
|
||||
dce_v11_0_vga_enable(crtc, false);
|
||||
/* Make sure VBLANK interrupt is still enabled */
|
||||
/* Make sure VBLANK and PFLIP interrupts are still enabled */
|
||||
type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_update(adev, &adev->crtc_irq, type);
|
||||
amdgpu_irq_update(adev, &adev->pageflip_irq, type);
|
||||
drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
|
||||
dce_v11_0_crtc_load_lut(crtc);
|
||||
break;
|
||||
|
@ -2888,7 +2907,7 @@ static int dce_v11_0_early_init(void *handle)
|
|||
|
||||
switch (adev->asic_type) {
|
||||
case CHIP_CARRIZO:
|
||||
adev->mode_info.num_crtc = 4;
|
||||
adev->mode_info.num_crtc = 3;
|
||||
adev->mode_info.num_hpd = 6;
|
||||
adev->mode_info.num_dig = 9;
|
||||
break;
|
||||
|
@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handle)
|
|||
dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v11_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handle)
|
|||
dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v11_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handle)
|
|||
|
||||
dce_v11_0_hpd_fini(adev);
|
||||
|
||||
dce_v11_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle)
|
|||
/* initialize hpd */
|
||||
dce_v11_0_hpd_init(adev);
|
||||
|
||||
dce_v11_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
|
|||
spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
|
||||
|
||||
drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
|
||||
queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
|
|||
return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
|
||||
}
|
||||
|
||||
static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Enable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_get(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* Disable pflip interrupts */
|
||||
for (i = 0; i < adev->mode_info.num_crtc; i++)
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
|
||||
}
|
||||
|
||||
/**
|
||||
* dce_v8_0_page_flip - pageflip callback.
|
||||
*
|
||||
|
@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
dce_v8_0_vga_enable(crtc, true);
|
||||
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
|
||||
dce_v8_0_vga_enable(crtc, false);
|
||||
/* Make sure VBLANK interrupt is still enabled */
|
||||
/* Make sure VBLANK and PFLIP interrupts are still enabled */
|
||||
type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_update(adev, &adev->crtc_irq, type);
|
||||
amdgpu_irq_update(adev, &adev->pageflip_irq, type);
|
||||
drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
|
||||
dce_v8_0_crtc_load_lut(crtc);
|
||||
break;
|
||||
|
@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle)
|
|||
dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v8_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle)
|
|||
dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
|
||||
}
|
||||
|
||||
dce_v8_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle)
|
|||
|
||||
dce_v8_0_hpd_fini(adev);
|
||||
|
||||
dce_v8_0_pageflip_interrupt_fini(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle)
|
|||
/* initialize hpd */
|
||||
dce_v8_0_hpd_init(adev);
|
||||
|
||||
dce_v8_0_pageflip_interrupt_init(adev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
|
|||
spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
|
||||
|
||||
drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
|
||||
queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -2995,6 +2995,12 @@ static int kv_dpm_late_init(void *handle)
|
|||
{
|
||||
/* powerdown unused blocks for now */
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
int ret;
|
||||
|
||||
/* init the sysfs and debugfs files late */
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
kv_dpm_powergate_acp(adev, true);
|
||||
kv_dpm_powergate_samu(adev, true);
|
||||
|
@ -3038,9 +3044,6 @@ static int kv_dpm_sw_init(void *handle)
|
|||
adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
|
||||
if (amdgpu_dpm == 1)
|
||||
amdgpu_pm_print_power_states(adev);
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
goto dpm_failed;
|
||||
mutex_unlock(&adev->pm.mutex);
|
||||
DRM_INFO("amdgpu: dpm initialized\n");
|
||||
|
||||
|
|
|
@ -1005,6 +1005,9 @@ static void vi_pcie_gen3_enable(struct amdgpu_device *adev)
|
|||
u32 mask;
|
||||
int ret;
|
||||
|
||||
if (pci_is_root_bus(adev->pdev->bus))
|
||||
return;
|
||||
|
||||
if (amdgpu_pcie_gen2 == 0)
|
||||
return;
|
||||
|
||||
|
|
|
@ -2801,12 +2801,13 @@ static int drm_dp_mst_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs
|
|||
if (msgs[num - 1].flags & I2C_M_RD)
|
||||
reading = true;
|
||||
|
||||
if (!reading) {
|
||||
if (!reading || (num - 1 > DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)) {
|
||||
DRM_DEBUG_KMS("Unsupported I2C transaction for MST device\n");
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
memset(&msg, 0, sizeof(msg));
|
||||
msg.req_type = DP_REMOTE_I2C_READ;
|
||||
msg.u.i2c_read.num_transactions = num - 1;
|
||||
msg.u.i2c_read.port_number = port->port_num;
|
||||
|
|
|
@ -235,18 +235,12 @@ static ssize_t dpms_show(struct device *device,
|
|||
char *buf)
|
||||
{
|
||||
struct drm_connector *connector = to_drm_connector(device);
|
||||
struct drm_device *dev = connector->dev;
|
||||
uint64_t dpms_status;
|
||||
int ret;
|
||||
int dpms;
|
||||
|
||||
ret = drm_object_property_get_value(&connector->base,
|
||||
dev->mode_config.dpms_property,
|
||||
&dpms_status);
|
||||
if (ret)
|
||||
return 0;
|
||||
dpms = READ_ONCE(connector->dpms);
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%s\n",
|
||||
drm_get_dpms_name((int)dpms_status));
|
||||
drm_get_dpms_name(dpms));
|
||||
}
|
||||
|
||||
static ssize_t enabled_show(struct device *device,
|
||||
|
|
|
@ -469,9 +469,13 @@ nouveau_display_create(struct drm_device *dev)
|
|||
if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
|
||||
dev->mode_config.max_width = 4096;
|
||||
dev->mode_config.max_height = 4096;
|
||||
} else {
|
||||
} else
|
||||
if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) {
|
||||
dev->mode_config.max_width = 8192;
|
||||
dev->mode_config.max_height = 8192;
|
||||
} else {
|
||||
dev->mode_config.max_width = 16384;
|
||||
dev->mode_config.max_height = 16384;
|
||||
}
|
||||
|
||||
dev->mode_config.preferred_depth = 24;
|
||||
|
|
|
@ -178,8 +178,30 @@ nouveau_fbcon_sync(struct fb_info *info)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
nouveau_fbcon_open(struct fb_info *info, int user)
|
||||
{
|
||||
struct nouveau_fbdev *fbcon = info->par;
|
||||
struct nouveau_drm *drm = nouveau_drm(fbcon->dev);
|
||||
int ret = pm_runtime_get_sync(drm->dev->dev);
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
nouveau_fbcon_release(struct fb_info *info, int user)
|
||||
{
|
||||
struct nouveau_fbdev *fbcon = info->par;
|
||||
struct nouveau_drm *drm = nouveau_drm(fbcon->dev);
|
||||
pm_runtime_put(drm->dev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct fb_ops nouveau_fbcon_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_open = nouveau_fbcon_open,
|
||||
.fb_release = nouveau_fbcon_release,
|
||||
.fb_check_var = drm_fb_helper_check_var,
|
||||
.fb_set_par = drm_fb_helper_set_par,
|
||||
.fb_fillrect = nouveau_fbcon_fillrect,
|
||||
|
@ -195,6 +217,8 @@ static struct fb_ops nouveau_fbcon_ops = {
|
|||
|
||||
static struct fb_ops nouveau_fbcon_sw_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_open = nouveau_fbcon_open,
|
||||
.fb_release = nouveau_fbcon_release,
|
||||
.fb_check_var = drm_fb_helper_check_var,
|
||||
.fb_set_par = drm_fb_helper_set_par,
|
||||
.fb_fillrect = drm_fb_helper_cfb_fillrect,
|
||||
|
|
|
@ -267,6 +267,12 @@ init_i2c(struct nvbios_init *init, int index)
|
|||
index = NVKM_I2C_BUS_PRI;
|
||||
if (init->outp && init->outp->i2c_upper_default)
|
||||
index = NVKM_I2C_BUS_SEC;
|
||||
} else
|
||||
if (index == 0x80) {
|
||||
index = NVKM_I2C_BUS_PRI;
|
||||
} else
|
||||
if (index == 0x81) {
|
||||
index = NVKM_I2C_BUS_SEC;
|
||||
}
|
||||
|
||||
bus = nvkm_i2c_bus_find(i2c, index);
|
||||
|
|
|
@ -8,7 +8,10 @@ struct nvbios_source {
|
|||
void *(*init)(struct nvkm_bios *, const char *);
|
||||
void (*fini)(void *);
|
||||
u32 (*read)(void *, u32 offset, u32 length, struct nvkm_bios *);
|
||||
u32 (*size)(void *);
|
||||
bool rw;
|
||||
bool ignore_checksum;
|
||||
bool no_pcir;
|
||||
};
|
||||
|
||||
int nvbios_extend(struct nvkm_bios *, u32 length);
|
||||
|
|
|
@ -45,7 +45,7 @@ shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto)
|
|||
u32 read = mthd->func->read(data, start, limit - start, bios);
|
||||
bios->size = start + read;
|
||||
}
|
||||
return bios->size >= limit;
|
||||
return bios->size >= upto;
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -55,14 +55,22 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd)
|
|||
struct nvbios_image image;
|
||||
int score = 1;
|
||||
|
||||
if (!shadow_fetch(bios, mthd, offset + 0x1000)) {
|
||||
nvkm_debug(subdev, "%08x: header fetch failed\n", offset);
|
||||
return 0;
|
||||
}
|
||||
if (mthd->func->no_pcir) {
|
||||
image.base = 0;
|
||||
image.type = 0;
|
||||
image.size = mthd->func->size(mthd->data);
|
||||
image.last = 1;
|
||||
} else {
|
||||
if (!shadow_fetch(bios, mthd, offset + 0x1000)) {
|
||||
nvkm_debug(subdev, "%08x: header fetch failed\n",
|
||||
offset);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!nvbios_image(bios, idx, &image)) {
|
||||
nvkm_debug(subdev, "image %d invalid\n", idx);
|
||||
return 0;
|
||||
if (!nvbios_image(bios, idx, &image)) {
|
||||
nvkm_debug(subdev, "image %d invalid\n", idx);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
nvkm_debug(subdev, "%08x: type %02x, %d bytes\n",
|
||||
image.base, image.type, image.size);
|
||||
|
@ -74,7 +82,8 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd)
|
|||
|
||||
switch (image.type) {
|
||||
case 0x00:
|
||||
if (nvbios_checksum(&bios->data[image.base], image.size)) {
|
||||
if (!mthd->func->ignore_checksum &&
|
||||
nvbios_checksum(&bios->data[image.base], image.size)) {
|
||||
nvkm_debug(subdev, "%08x: checksum failed\n",
|
||||
image.base);
|
||||
if (mthd->func->rw)
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
*
|
||||
*/
|
||||
#include "priv.h"
|
||||
|
||||
#include <core/pci.h>
|
||||
|
||||
#if defined(__powerpc__)
|
||||
|
@ -33,17 +34,26 @@ static u32
|
|||
of_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
|
||||
{
|
||||
struct priv *priv = data;
|
||||
if (offset + length <= priv->size) {
|
||||
if (offset < priv->size) {
|
||||
length = min_t(u32, length, priv->size - offset);
|
||||
memcpy_fromio(bios->data + offset, priv->data + offset, length);
|
||||
return length;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32
|
||||
of_size(void *data)
|
||||
{
|
||||
struct priv *priv = data;
|
||||
return priv->size;
|
||||
}
|
||||
|
||||
static void *
|
||||
of_init(struct nvkm_bios *bios, const char *name)
|
||||
{
|
||||
struct pci_dev *pdev = bios->subdev.device->func->pci(bios->subdev.device)->pdev;
|
||||
struct nvkm_device *device = bios->subdev.device;
|
||||
struct pci_dev *pdev = device->func->pci(device)->pdev;
|
||||
struct device_node *dn;
|
||||
struct priv *priv;
|
||||
if (!(dn = pci_device_to_OF_node(pdev)))
|
||||
|
@ -62,7 +72,10 @@ nvbios_of = {
|
|||
.init = of_init,
|
||||
.fini = (void(*)(void *))kfree,
|
||||
.read = of_read,
|
||||
.size = of_size,
|
||||
.rw = false,
|
||||
.ignore_checksum = true,
|
||||
.no_pcir = true,
|
||||
};
|
||||
#else
|
||||
const struct nvbios_source
|
||||
|
|
|
@ -35,6 +35,8 @@ static const struct nvkm_device_agp_quirk
|
|||
nvkm_device_agp_quirks[] = {
|
||||
/* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */
|
||||
{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 },
|
||||
/* SiS 761 does not support AGP cards, use PCI mode */
|
||||
{ PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 },
|
||||
{},
|
||||
};
|
||||
|
||||
|
@ -137,8 +139,10 @@ nvkm_agp_ctor(struct nvkm_pci *pci)
|
|||
while (quirk->hostbridge_vendor) {
|
||||
if (info.device->vendor == quirk->hostbridge_vendor &&
|
||||
info.device->device == quirk->hostbridge_device &&
|
||||
pci->pdev->vendor == quirk->chip_vendor &&
|
||||
pci->pdev->device == quirk->chip_device) {
|
||||
(quirk->chip_vendor == (u16)PCI_ANY_ID ||
|
||||
pci->pdev->vendor == quirk->chip_vendor) &&
|
||||
(quirk->chip_device == (u16)PCI_ANY_ID ||
|
||||
pci->pdev->device == quirk->chip_device)) {
|
||||
nvkm_info(subdev, "forcing default agp mode to %dX, "
|
||||
"use NvAGP=<mode> to override\n",
|
||||
quirk->mode);
|
||||
|
|
|
@ -242,6 +242,10 @@ static int qxl_crtc_page_flip(struct drm_crtc *crtc,
|
|||
bo->is_primary = true;
|
||||
|
||||
ret = qxl_bo_reserve(bo, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = qxl_bo_pin(bo, bo->type, NULL);
|
||||
qxl_bo_unreserve(bo);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -257,7 +261,11 @@ static int qxl_crtc_page_flip(struct drm_crtc *crtc,
|
|||
}
|
||||
drm_vblank_put(dev, qcrtc->index);
|
||||
|
||||
qxl_bo_unreserve(bo);
|
||||
ret = qxl_bo_reserve(bo, false);
|
||||
if (!ret) {
|
||||
qxl_bo_unpin(bo);
|
||||
qxl_bo_unreserve(bo);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -144,14 +144,17 @@ static void qxl_dirty_update(struct qxl_fbdev *qfbdev,
|
|||
|
||||
spin_lock_irqsave(&qfbdev->dirty.lock, flags);
|
||||
|
||||
if (qfbdev->dirty.y1 < y)
|
||||
y = qfbdev->dirty.y1;
|
||||
if (qfbdev->dirty.y2 > y2)
|
||||
y2 = qfbdev->dirty.y2;
|
||||
if (qfbdev->dirty.x1 < x)
|
||||
x = qfbdev->dirty.x1;
|
||||
if (qfbdev->dirty.x2 > x2)
|
||||
x2 = qfbdev->dirty.x2;
|
||||
if ((qfbdev->dirty.y2 - qfbdev->dirty.y1) &&
|
||||
(qfbdev->dirty.x2 - qfbdev->dirty.x1)) {
|
||||
if (qfbdev->dirty.y1 < y)
|
||||
y = qfbdev->dirty.y1;
|
||||
if (qfbdev->dirty.y2 > y2)
|
||||
y2 = qfbdev->dirty.y2;
|
||||
if (qfbdev->dirty.x1 < x)
|
||||
x = qfbdev->dirty.x1;
|
||||
if (qfbdev->dirty.x2 > x2)
|
||||
x2 = qfbdev->dirty.x2;
|
||||
}
|
||||
|
||||
qfbdev->dirty.x1 = x;
|
||||
qfbdev->dirty.x2 = x2;
|
||||
|
|
|
@ -307,7 +307,7 @@ int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
|
|||
idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
|
||||
if (idr_ret < 0)
|
||||
return idr_ret;
|
||||
bo = qxl_bo_ref(to_qxl_bo(entry->tv.bo));
|
||||
bo = to_qxl_bo(entry->tv.bo);
|
||||
|
||||
(*release)->release_offset = create_rel->release_offset + 64;
|
||||
|
||||
|
@ -316,8 +316,6 @@ int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
|
|||
info = qxl_release_map(qdev, *release);
|
||||
info->id = idr_ret;
|
||||
qxl_release_unmap(qdev, *release, info);
|
||||
|
||||
qxl_bo_unref(&bo);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1633,18 +1633,8 @@ int radeon_modeset_init(struct radeon_device *rdev)
|
|||
radeon_fbdev_init(rdev);
|
||||
drm_kms_helper_poll_init(rdev->ddev);
|
||||
|
||||
if (rdev->pm.dpm_enabled) {
|
||||
/* do dpm late init */
|
||||
ret = radeon_pm_late_init(rdev);
|
||||
if (ret) {
|
||||
rdev->pm.dpm_enabled = false;
|
||||
DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
|
||||
}
|
||||
/* set the dpm state for PX since there won't be
|
||||
* a modeset to call this.
|
||||
*/
|
||||
radeon_pm_compute_clocks(rdev);
|
||||
}
|
||||
/* do pm late init */
|
||||
ret = radeon_pm_late_init(rdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -283,6 +283,7 @@ static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topol
|
|||
radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
|
||||
|
||||
drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
|
||||
drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
|
||||
drm_mode_connector_set_path_property(connector, pathprop);
|
||||
|
||||
return connector;
|
||||
|
|
|
@ -397,3 +397,19 @@ void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector
|
|||
{
|
||||
drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
|
||||
}
|
||||
|
||||
void radeon_fbdev_restore_mode(struct radeon_device *rdev)
|
||||
{
|
||||
struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev;
|
||||
struct drm_fb_helper *fb_helper;
|
||||
int ret;
|
||||
|
||||
if (!rfbdev)
|
||||
return;
|
||||
|
||||
fb_helper = &rfbdev->helper;
|
||||
|
||||
ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
|
||||
if (ret)
|
||||
DRM_DEBUG("failed to restore crtc mode\n");
|
||||
}
|
||||
|
|
|
@ -598,7 +598,7 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
* Outdated mess for old drm with Xorg being in charge (void function now).
|
||||
*/
|
||||
/**
|
||||
* radeon_driver_firstopen_kms - drm callback for last close
|
||||
* radeon_driver_lastclose_kms - drm callback for last close
|
||||
*
|
||||
* @dev: drm dev pointer
|
||||
*
|
||||
|
@ -606,6 +606,9 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
*/
|
||||
void radeon_driver_lastclose_kms(struct drm_device *dev)
|
||||
{
|
||||
struct radeon_device *rdev = dev->dev_private;
|
||||
|
||||
radeon_fbdev_restore_mode(rdev);
|
||||
vga_switcheroo_process_delayed_switch();
|
||||
}
|
||||
|
||||
|
|
|
@ -980,6 +980,7 @@ int radeon_fbdev_init(struct radeon_device *rdev);
|
|||
void radeon_fbdev_fini(struct radeon_device *rdev);
|
||||
void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
|
||||
bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
|
||||
void radeon_fbdev_restore_mode(struct radeon_device *rdev);
|
||||
|
||||
void radeon_fb_output_poll_changed(struct radeon_device *rdev);
|
||||
|
||||
|
|
|
@ -1326,14 +1326,6 @@ static int radeon_pm_init_old(struct radeon_device *rdev)
|
|||
INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler);
|
||||
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
/* where's the best place to put these? */
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power profile\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
|
||||
if (radeon_debugfs_pm_init(rdev)) {
|
||||
DRM_ERROR("Failed to register debugfs file for PM!\n");
|
||||
}
|
||||
|
@ -1391,20 +1383,6 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev)
|
|||
goto dpm_failed;
|
||||
rdev->pm.dpm_enabled = true;
|
||||
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for dpm state\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for dpm state\n");
|
||||
/* XXX: these are noops for dpm but are here for backwards compat */
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power profile\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
|
||||
if (radeon_debugfs_pm_init(rdev)) {
|
||||
DRM_ERROR("Failed to register debugfs file for dpm!\n");
|
||||
}
|
||||
|
@ -1545,9 +1523,44 @@ int radeon_pm_late_init(struct radeon_device *rdev)
|
|||
int ret = 0;
|
||||
|
||||
if (rdev->pm.pm_method == PM_METHOD_DPM) {
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
ret = radeon_dpm_late_enable(rdev);
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
if (rdev->pm.dpm_enabled) {
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for dpm state\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for dpm state\n");
|
||||
/* XXX: these are noops for dpm but are here for backwards compat */
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power profile\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
ret = radeon_dpm_late_enable(rdev);
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
if (ret) {
|
||||
rdev->pm.dpm_enabled = false;
|
||||
DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
|
||||
} else {
|
||||
/* set the dpm state for PX since there won't be
|
||||
* a modeset to call this.
|
||||
*/
|
||||
radeon_pm_compute_clocks(rdev);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
/* where's the best place to put these? */
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power profile\n");
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -2928,6 +2928,7 @@ static struct si_dpm_quirk si_dpm_quirk_list[] = {
|
|||
{ PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 },
|
||||
{ PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 },
|
||||
{ PCI_VENDOR_ID_ATI, 0x6811, 0x1762, 0x2015, 0, 120000 },
|
||||
{ PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 },
|
||||
{ 0, 0, 0, 0 },
|
||||
};
|
||||
|
||||
|
|
|
@ -34,8 +34,8 @@ virtio_gpu_debugfs_irq_info(struct seq_file *m, void *data)
|
|||
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
||||
struct virtio_gpu_device *vgdev = node->minor->dev->dev_private;
|
||||
|
||||
seq_printf(m, "fence %ld %lld\n",
|
||||
atomic64_read(&vgdev->fence_drv.last_seq),
|
||||
seq_printf(m, "fence %llu %lld\n",
|
||||
(u64)atomic64_read(&vgdev->fence_drv.last_seq),
|
||||
vgdev->fence_drv.sync_seq);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -61,7 +61,7 @@ static void virtio_timeline_value_str(struct fence *f, char *str, int size)
|
|||
{
|
||||
struct virtio_gpu_fence *fence = to_virtio_fence(f);
|
||||
|
||||
snprintf(str, size, "%lu", atomic64_read(&fence->drv->last_seq));
|
||||
snprintf(str, size, "%llu", (u64)atomic64_read(&fence->drv->last_seq));
|
||||
}
|
||||
|
||||
static const struct fence_ops virtio_fence_ops = {
|
||||
|
|
|
@ -657,7 +657,8 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
|
|||
struct vmw_resource *res = &user_srf->srf.res;
|
||||
|
||||
*p_base = NULL;
|
||||
ttm_base_object_unref(&user_srf->backup_base);
|
||||
if (user_srf->backup_base)
|
||||
ttm_base_object_unref(&user_srf->backup_base);
|
||||
vmw_resource_unreference(&res);
|
||||
}
|
||||
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/dmi.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clk-provider.h>
|
||||
|
@ -51,6 +52,22 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
/*
|
||||
* The HCNT/LCNT information coming from ACPI should be the most accurate
|
||||
* for given platform. However, some systems get it wrong. On such systems
|
||||
* we get better results by calculating those based on the input clock.
|
||||
*/
|
||||
static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
|
||||
{
|
||||
.ident = "Dell Inspiron 7348",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
|
||||
u16 *hcnt, u16 *lcnt, u32 *sda_hold)
|
||||
{
|
||||
|
@ -58,6 +75,9 @@ static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
|
|||
acpi_handle handle = ACPI_HANDLE(&pdev->dev);
|
||||
union acpi_object *obj;
|
||||
|
||||
if (dmi_check_system(dw_i2c_no_acpi_params))
|
||||
return;
|
||||
|
||||
if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
|
||||
return;
|
||||
|
||||
|
@ -253,12 +273,6 @@ static int dw_i2c_probe(struct platform_device *pdev)
|
|||
adap->dev.parent = &pdev->dev;
|
||||
adap->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
r = i2c_add_numbered_adapter(adap);
|
||||
if (r) {
|
||||
dev_err(&pdev->dev, "failure adding adapter\n");
|
||||
return r;
|
||||
}
|
||||
|
||||
if (dev->pm_runtime_disabled) {
|
||||
pm_runtime_forbid(&pdev->dev);
|
||||
} else {
|
||||
|
@ -268,6 +282,13 @@ static int dw_i2c_probe(struct platform_device *pdev)
|
|||
pm_runtime_enable(&pdev->dev);
|
||||
}
|
||||
|
||||
r = i2c_add_numbered_adapter(adap);
|
||||
if (r) {
|
||||
dev_err(&pdev->dev, "failure adding adapter\n");
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return r;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -690,15 +690,16 @@ static int rcar_i2c_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
platform_set_drvdata(pdev, priv);
|
||||
|
||||
ret = i2c_add_numbered_adapter(adap);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "reg adap failed: %d\n", ret);
|
||||
pm_runtime_disable(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
platform_set_drvdata(pdev, priv);
|
||||
|
||||
dev_info(dev, "probed\n");
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1243,17 +1243,19 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
|
|||
i2c->adap.nr = i2c->pdata->bus_num;
|
||||
i2c->adap.dev.of_node = pdev->dev.of_node;
|
||||
|
||||
platform_set_drvdata(pdev, i2c);
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
ret = i2c_add_numbered_adapter(&i2c->adap);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to add bus to i2c core\n");
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
s3c24xx_i2c_deregister_cpufreq(i2c);
|
||||
clk_unprepare(i2c->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, i2c);
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_enable(&i2c->adap.dev);
|
||||
|
||||
dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
|
||||
|
|
|
@ -694,12 +694,12 @@ static int i2c_device_probe(struct device *dev)
|
|||
goto err_clear_wakeup_irq;
|
||||
|
||||
status = dev_pm_domain_attach(&client->dev, true);
|
||||
if (status != -EPROBE_DEFER) {
|
||||
status = driver->probe(client, i2c_match_id(driver->id_table,
|
||||
client));
|
||||
if (status)
|
||||
goto err_detach_pm_domain;
|
||||
}
|
||||
if (status == -EPROBE_DEFER)
|
||||
goto err_clear_wakeup_irq;
|
||||
|
||||
status = driver->probe(client, i2c_match_id(driver->id_table, client));
|
||||
if (status)
|
||||
goto err_detach_pm_domain;
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
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