alx: add constants for the stats fields
Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sabrina Dubroca
David S. Miller
Родитель
19f6626469
Коммит
ac45a23c53
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@ -404,15 +404,59 @@
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/* MIB */
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#define ALX_MIB_BASE 0x1700
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#define ALX_MIB_RX_OK (ALX_MIB_BASE + 0)
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#define ALX_MIB_RX_ERRADDR (ALX_MIB_BASE + 92)
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#define ALX_MIB_TX_OK (ALX_MIB_BASE + 96)
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#define ALX_MIB_TX_MCCNT (ALX_MIB_BASE + 192)
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#define ALX_RX_STATS_BIN ALX_MIB_RX_OK
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#define ALX_RX_STATS_END ALX_MIB_RX_ERRADDR
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#define ALX_TX_STATS_BIN ALX_MIB_TX_OK
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#define ALX_TX_STATS_END ALX_MIB_TX_MCCNT
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#define ALX_MIB_RX_OK (ALX_MIB_BASE + 0)
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#define ALX_MIB_RX_BCAST (ALX_MIB_BASE + 4)
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#define ALX_MIB_RX_MCAST (ALX_MIB_BASE + 8)
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#define ALX_MIB_RX_PAUSE (ALX_MIB_BASE + 12)
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#define ALX_MIB_RX_CTRL (ALX_MIB_BASE + 16)
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#define ALX_MIB_RX_FCS_ERR (ALX_MIB_BASE + 20)
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#define ALX_MIB_RX_LEN_ERR (ALX_MIB_BASE + 24)
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#define ALX_MIB_RX_BYTE_CNT (ALX_MIB_BASE + 28)
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#define ALX_MIB_RX_RUNT (ALX_MIB_BASE + 32)
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#define ALX_MIB_RX_FRAG (ALX_MIB_BASE + 36)
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#define ALX_MIB_RX_SZ_64B (ALX_MIB_BASE + 40)
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#define ALX_MIB_RX_SZ_127B (ALX_MIB_BASE + 44)
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#define ALX_MIB_RX_SZ_255B (ALX_MIB_BASE + 48)
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#define ALX_MIB_RX_SZ_511B (ALX_MIB_BASE + 52)
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#define ALX_MIB_RX_SZ_1023B (ALX_MIB_BASE + 56)
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#define ALX_MIB_RX_SZ_1518B (ALX_MIB_BASE + 60)
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#define ALX_MIB_RX_SZ_MAX (ALX_MIB_BASE + 64)
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#define ALX_MIB_RX_OV_SZ (ALX_MIB_BASE + 68)
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#define ALX_MIB_RX_OV_RXF (ALX_MIB_BASE + 72)
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#define ALX_MIB_RX_OV_RRD (ALX_MIB_BASE + 76)
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#define ALX_MIB_RX_ALIGN_ERR (ALX_MIB_BASE + 80)
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#define ALX_MIB_RX_BCCNT (ALX_MIB_BASE + 84)
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#define ALX_MIB_RX_MCCNT (ALX_MIB_BASE + 88)
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#define ALX_MIB_RX_ERRADDR (ALX_MIB_BASE + 92)
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#define ALX_MIB_TX_OK (ALX_MIB_BASE + 96)
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#define ALX_MIB_TX_BCAST (ALX_MIB_BASE + 100)
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#define ALX_MIB_TX_MCAST (ALX_MIB_BASE + 104)
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#define ALX_MIB_TX_PAUSE (ALX_MIB_BASE + 108)
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#define ALX_MIB_TX_EXC_DEFER (ALX_MIB_BASE + 112)
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#define ALX_MIB_TX_CTRL (ALX_MIB_BASE + 116)
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#define ALX_MIB_TX_DEFER (ALX_MIB_BASE + 120)
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#define ALX_MIB_TX_BYTE_CNT (ALX_MIB_BASE + 124)
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#define ALX_MIB_TX_SZ_64B (ALX_MIB_BASE + 128)
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#define ALX_MIB_TX_SZ_127B (ALX_MIB_BASE + 132)
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#define ALX_MIB_TX_SZ_255B (ALX_MIB_BASE + 136)
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#define ALX_MIB_TX_SZ_511B (ALX_MIB_BASE + 140)
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#define ALX_MIB_TX_SZ_1023B (ALX_MIB_BASE + 144)
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#define ALX_MIB_TX_SZ_1518B (ALX_MIB_BASE + 148)
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#define ALX_MIB_TX_SZ_MAX (ALX_MIB_BASE + 152)
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#define ALX_MIB_TX_SINGLE_COL (ALX_MIB_BASE + 156)
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#define ALX_MIB_TX_MULTI_COL (ALX_MIB_BASE + 160)
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#define ALX_MIB_TX_LATE_COL (ALX_MIB_BASE + 164)
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#define ALX_MIB_TX_ABORT_COL (ALX_MIB_BASE + 168)
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#define ALX_MIB_TX_UNDERRUN (ALX_MIB_BASE + 172)
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#define ALX_MIB_TX_TRD_EOP (ALX_MIB_BASE + 176)
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#define ALX_MIB_TX_LEN_ERR (ALX_MIB_BASE + 180)
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#define ALX_MIB_TX_TRUNC (ALX_MIB_BASE + 184)
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#define ALX_MIB_TX_BCCNT (ALX_MIB_BASE + 188)
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#define ALX_MIB_TX_MCCNT (ALX_MIB_BASE + 192)
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#define ALX_MIB_UPDATE (ALX_MIB_BASE + 196)
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#define ALX_ISR 0x1600
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#define ALX_ISR_DIS BIT(31)
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