viafb: lcd.c, lcd.h, lcdtbl.h
lcd.c, lcd.h: LVDS generic process. lcdtbl.h: patch register for simultaneous case. Signed-off-by: Joseph Chan <josephchan@via.com.tw> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Joseph Chan
Linus Torvalds
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c91b557ad0
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ac6c97e20f
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/*
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* Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public
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* License as published by the Free Software Foundation;
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* either version 2, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
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* the implied warranty of MERCHANTABILITY or FITNESS FOR
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* A PARTICULAR PURPOSE.See the GNU General Public License
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* for more details.
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||||
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||||
* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __LCD_H__
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#define __LCD_H__
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/*Definition TMDS Device ID register*/
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#define VT1631_DEVICE_ID_REG 0x02
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#define VT1631_DEVICE_ID 0x92
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#define VT3271_DEVICE_ID_REG 0x02
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#define VT3271_DEVICE_ID 0x71
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#define GET_LCD_SIZE_BY_SYSTEM_BIOS 0x01
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#define GET_LCD_SIZE_BY_VGA_BIOS 0x02
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#define GET_LCD_SZIE_BY_HW_STRAPPING 0x03
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#define GET_LCD_SIZE_BY_USER_SETTING 0x04
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/* Definition DVI Panel ID*/
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/* Resolution: 640x480, Channel: single, Dithering: Enable */
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#define LCD_PANEL_ID0_640X480 0x00
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/* Resolution: 800x600, Channel: single, Dithering: Enable */
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#define LCD_PANEL_ID1_800X600 0x01
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/* Resolution: 1024x768, Channel: single, Dithering: Enable */
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#define LCD_PANEL_ID2_1024X768 0x02
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/* Resolution: 1280x768, Channel: single, Dithering: Enable */
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#define LCD_PANEL_ID3_1280X768 0x03
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/* Resolution: 1280x1024, Channel: dual, Dithering: Enable */
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#define LCD_PANEL_ID4_1280X1024 0x04
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/* Resolution: 1400x1050, Channel: dual, Dithering: Enable */
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#define LCD_PANEL_ID5_1400X1050 0x05
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/* Resolution: 1600x1200, Channel: dual, Dithering: Enable */
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#define LCD_PANEL_ID6_1600X1200 0x06
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/* Resolution: 1366x768, Channel: single, Dithering: Disable */
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#define LCD_PANEL_ID7_1366X768 0x07
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/* Resolution: 1024x600, Channel: single, Dithering: Enable*/
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#define LCD_PANEL_ID8_1024X600 0x08
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/* Resolution: 1280x800, Channel: single, Dithering: Enable*/
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#define LCD_PANEL_ID9_1280X800 0x09
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/* Resolution: 800x480, Channel: single, Dithering: Enable*/
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#define LCD_PANEL_IDA_800X480 0x0A
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/* Resolution: 1360x768, Channel: single, Dithering: Disable*/
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#define LCD_PANEL_IDB_1360X768 0x0B
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/* Resolution: 480x640, Channel: single, Dithering: Enable */
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#define LCD_PANEL_IDC_480X640 0x0C
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extern int viafb_LCD2_ON;
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extern int viafb_LCD_ON;
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extern int viafb_DVI_ON;
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void viafb_disable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info);
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void viafb_enable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info);
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void viafb_lcd_disable(void);
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void viafb_lcd_enable(void);
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void viafb_init_lcd_size(void);
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void viafb_init_lvds_output_interface(struct lvds_chip_information
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*plvds_chip_info,
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struct lvds_setting_information
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*plvds_setting_info);
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void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info);
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int viafb_lvds_trasmitter_identify(void);
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void viafb_init_lvds_output_interface(struct lvds_chip_information
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*plvds_chip_info,
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struct lvds_setting_information
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*plvds_setting_info);
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bool viafb_lcd_get_mobile_state(bool *mobile);
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void viafb_load_crtc_timing(struct display_timing device_timing,
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int set_iga);
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#endif /* __LCD_H__ */
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/*
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* Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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* This program is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public
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||||
* License as published by the Free Software Foundation;
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||||
* either version 2, or (at your option) any later version.
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||||
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||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
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||||
* the implied warranty of MERCHANTABILITY or FITNESS FOR
|
||||
* A PARTICULAR PURPOSE.See the GNU General Public License
|
||||
* for more details.
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||||
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||||
* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __LCDTBL_H__
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#define __LCDTBL_H__
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#include "share.h"
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/* CLE266 Software Power Sequence */
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/* {Mask}, {Data}, {Delay} */
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int PowerSequenceOn[3][3] =
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{ {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} };
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int PowerSequenceOff[3][3] =
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{ {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} };
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/* ++++++ P880 ++++++ */
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/* Panel 1600x1200 */
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struct io_reg P880_LCD_RES_6X4_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x5E},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C},
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{VIASR, SR46, 0xFF, 0x02}
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};
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#define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12)
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struct io_reg P880_LCD_RES_7X4_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x78},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C},
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{VIASR, SR46, 0xFF, 0x01}
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};
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#define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12)
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struct io_reg P880_LCD_RES_8X6_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x83},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88},
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{VIASR, SR46, 0xFF, 0x03}
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};
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#define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12)
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struct io_reg P880_LCD_RES_10X7_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0xAF},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR44, 0xFF, 0x92}, {VIASR, SR45, 0xFF, 0x88},
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{VIASR, SR46, 0xFF, 0x03}
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};
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#define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12)
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struct io_reg P880_LCD_RES_12X10_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0xD4},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88},
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{VIASR, SR46, 0xFF, 0x05}
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};
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#define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12)
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/* Panel 1400x1050 */
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struct io_reg P880_LCD_RES_6X4_14X10[] = {
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/* 640x480 */
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/* IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
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/* IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
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{VIACR, CR5D, 0x40, 0x24},
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/* IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
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/* IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x63},
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/* IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
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/* VCLK */
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{VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C},
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{VIASR, SR46, 0xFF, 0x05}
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};
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#define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10)
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struct io_reg P880_LCD_RES_8X6_14X10[] = {
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/* 800x600 */
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/* IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
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/* IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
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{VIACR, CR5D, 0x40, 0x24},
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/* IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
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/* IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x83},
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/* IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
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/* VCLK */
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{VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D},
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{VIASR, SR46, 0xFF, 0x05}
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};
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#define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10)
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/* ++++++ K400 ++++++ */
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/* Panel 1600x1200 */
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struct io_reg K400_LCD_RES_6X4_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x5E},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F}
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};
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#define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12)
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struct io_reg K400_LCD_RES_7X4_16X12[] = {
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/*IGA2 Horizontal Total */
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{VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
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/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x78},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D}
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};
|
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|
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#define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12)
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struct io_reg K400_LCD_RES_8X6_16X12[] = {
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||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
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||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
|
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{VIACR, CR5D, 0x40, 0x40},
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/*IGA2 Horizontal Total Shadow */
|
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{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
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{VIACR, CR6E, 0xFF, 0x83},
|
||||
/*IGA2 Offset */
|
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{VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F}
|
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};
|
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|
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#define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12)
|
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|
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struct io_reg K400_LCD_RES_10X7_16X12[] = {
|
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/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
|
||||
{VIACR, CR5D, 0x40, 0x40},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xAF},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12)
|
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|
||||
struct io_reg K400_LCD_RES_12X10_16X12[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
|
||||
{VIACR, CR5D, 0x40, 0x40},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xD4},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12)
|
||||
|
||||
/* Panel 1400x1050 */
|
||||
struct io_reg K400_LCD_RES_6X4_14X10[] = {
|
||||
/* 640x400 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x63},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_8X6_14X10[] = {
|
||||
/* 800x600 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x83},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_10X7_14X10[] = {
|
||||
/* 1024x768 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xA7},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_12X10_14X10[] = {
|
||||
/* 1280x768, 1280x960, 1280x1024 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xD2},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10)
|
||||
|
||||
/* ++++++ K400 ++++++ */
|
||||
/* Panel 1366x768 */
|
||||
struct io_reg K400_LCD_RES_6X4_1366X7[] = {
|
||||
/* 640x400 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x64},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_7X4_1366X7[] = {
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x75},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_8X6_1366X7[] = {
|
||||
/* 800x600 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x82},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_10X7_1366X7[] = {
|
||||
/* 1024x768 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xA7},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_12X10_1366X7[] = {
|
||||
/* 1280x768, 1280x960, 1280x1024 */
|
||||
/* IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
|
||||
/* IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
|
||||
{VIACR, CR5D, 0x40, 0x24},
|
||||
/* IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
|
||||
/* IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xD2},
|
||||
/* IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
|
||||
/* VCLK */
|
||||
{VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\
|
||||
ARRAY_SIZE(K400_LCD_RES_12X10_1366X7)
|
||||
|
||||
/* ++++++ K400 ++++++ */
|
||||
/* Panel 1280x1024 */
|
||||
struct io_reg K400_LCD_RES_6X4_12X10[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
|
||||
{VIACR, CR5D, 0x40, 0x1C},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x34},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x63},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_7X4_12X10[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
|
||||
{VIACR, CR5D, 0x40, 0x1C},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x68}, {VIACR, CR71, 0x08, 0x34},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x6C},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_8X6_12X10[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
|
||||
{VIACR, CR5D, 0x40, 0x1C},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x34},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x83},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10)
|
||||
|
||||
struct io_reg K400_LCD_RES_10X7_12X10[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
|
||||
{VIACR, CR5D, 0x40, 0x1C},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x34},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0xA7},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10)
|
||||
|
||||
/* ++++++ K400 ++++++ */
|
||||
/* Panel 1024x768 */
|
||||
struct io_reg K400_LCD_RES_6X4_10X7[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x64},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_7X4_10X7[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x75},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7)
|
||||
|
||||
struct io_reg K400_LCD_RES_8X6_10X7[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
|
||||
{VIACR, CR5D, 0x40, 0x13},
|
||||
/*IGA2 Horizontal Total Shadow */
|
||||
{VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
|
||||
/*IGA2 Horizontal Blank End Shadow */
|
||||
{VIACR, CR6E, 0xFF, 0x82},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
|
||||
};
|
||||
|
||||
#define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7)
|
||||
|
||||
/* ++++++ K400 ++++++ */
|
||||
/* Panel 800x600 */
|
||||
struct io_reg K400_LCD_RES_6X4_8X6[] = {
|
||||
/*IGA2 Horizontal Total */
|
||||
{VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34},
|
||||
/*IGA2 Horizontal Blank End */
|
||||
{VIACR, CR53, 0xFF, 0x1A}, {VIACR, CR54, 0x38, 0xE3},
|
||||
{VIACR, CR5D, 0x40, 0x12},
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/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x22},
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/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x63},
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/*IGA2 Offset */
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{VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00},
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/*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3}
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};
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#define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6)
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struct io_reg K400_LCD_RES_7X4_8X6[] = {
|
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/*IGA2 Horizontal Total */
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||||
{VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34},
|
||||
/*IGA2 Horizontal Blank End */
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{VIACR, CR53, 0xFF, 0x1F}, {VIACR, CR54, 0x38, 0xE3},
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{VIACR, CR5D, 0x40, 0x12},
|
||||
/*IGA2 Horizontal Total Shadow */
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{VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x22},
|
||||
/*IGA2 Horizontal Blank End Shadow */
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{VIACR, CR6E, 0xFF, 0x83},
|
||||
/*IGA2 Offset */
|
||||
{VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00},
|
||||
/*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59}
|
||||
};
|
||||
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||||
#define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6)
|
||||
|
||||
#endif /* __LCDTBL_H__ */
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||||
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