net: sxgbe: add EEE(Energy Efficient Ethernet) for Samsung sxgbe
Added support for the EEE(Energy Efficient Ethernet) in 10G ethernet driver. Signed-off-by: Girish K S <ks.giri@samsung.com> Neatening-by: Joe Perches <joe@perches.com> Signed-off-by: Byungho An <bh74.an@samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Girish K S
David S. Miller
Родитель
1edb9ca69e
Коммит
acc18c147b
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@ -118,6 +118,33 @@ struct sxgbe_mtl_ops;
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#define RX_PTP_SIGNAL 0x0A
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#define RX_PTP_RESV_MSG 0x0F
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/* EEE-LPI mode flags*/
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#define TX_ENTRY_LPI_MODE 0x10
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#define TX_EXIT_LPI_MODE 0x20
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#define RX_ENTRY_LPI_MODE 0x40
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#define RX_EXIT_LPI_MODE 0x80
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/* EEE-LPI Interrupt status flag */
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#define LPI_INT_STATUS BIT(5)
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/* EEE-LPI Default timer values */
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#define LPI_LINK_STATUS_TIMER 0x3E8
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#define LPI_MAC_WAIT_TIMER 0x00
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/* EEE-LPI Control and status definitions */
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#define LPI_CTRL_STATUS_TXA BIT(19)
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#define LPI_CTRL_STATUS_PLSDIS BIT(18)
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#define LPI_CTRL_STATUS_PLS BIT(17)
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#define LPI_CTRL_STATUS_LPIEN BIT(16)
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#define LPI_CTRL_STATUS_TXRSTP BIT(11)
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#define LPI_CTRL_STATUS_RXRSTP BIT(10)
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#define LPI_CTRL_STATUS_RLPIST BIT(9)
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#define LPI_CTRL_STATUS_TLPIST BIT(8)
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#define LPI_CTRL_STATUS_RLPIEX BIT(3)
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#define LPI_CTRL_STATUS_RLPIEN BIT(2)
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#define LPI_CTRL_STATUS_TLPIEX BIT(1)
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#define LPI_CTRL_STATUS_TLPIEN BIT(0)
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enum dma_irq_status {
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tx_hard_error = BIT(0),
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tx_bump_tc = BIT(1),
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@ -202,6 +229,13 @@ struct sxgbe_extra_stats {
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unsigned long rx_buffer_access_err;
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unsigned long rx_data_transfer_err;
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/* EEE-LPI stats */
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unsigned long tx_lpi_entry_n;
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unsigned long tx_lpi_exit_n;
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unsigned long rx_lpi_entry_n;
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unsigned long rx_lpi_exit_n;
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unsigned long eee_wakeup_error_n;
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/* RX specific */
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/* L2 error */
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unsigned long rx_code_gmii_err;
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@ -299,6 +333,13 @@ struct sxgbe_core_ops {
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unsigned char feature_index);
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/* adjust SXGBE speed */
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void (*set_speed)(void __iomem *ioaddr, unsigned char speed);
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/* EEE-LPI specific operations */
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void (*set_eee_mode)(void __iomem *ioaddr);
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void (*reset_eee_mode)(void __iomem *ioaddr);
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void (*set_eee_timer)(void __iomem *ioaddr, const int ls,
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const int tw);
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void (*set_eee_pls)(void __iomem *ioaddr, const int link);
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};
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
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@ -354,6 +395,8 @@ struct sxgbe_hw_features {
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/* IEEE 1588-2008 */
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unsigned int atime_stamp;
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unsigned int eee;
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unsigned int tx_csum_offload;
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unsigned int rx_csum_offload;
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unsigned int multi_macaddr;
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@ -437,6 +480,13 @@ struct sxgbe_priv_data {
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/* tc control */
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int tx_tc;
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int rx_tc;
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/* EEE-LPI specific members */
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struct timer_list eee_ctrl_timer;
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bool tx_path_in_lpi_mode;
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int lpi_irq;
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int eee_enabled;
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int eee_active;
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int tx_lpi_timer;
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};
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/* Function prototypes */
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@ -459,4 +509,7 @@ int sxgbe_restore(struct net_device *ndev);
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const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
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void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv);
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bool sxgbe_eee_init(struct sxgbe_priv_data * const priv);
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#endif /* __SXGBE_COMMON_H__ */
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@ -48,11 +48,38 @@ static void sxgbe_core_dump_regs(void __iomem *ioaddr)
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{
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}
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static int sxgbe_get_lpi_status(void __iomem *ioaddr, const u32 irq_status)
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{
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int status = 0;
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int lpi_status;
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/* Reading this register shall clear all the LPI status bits */
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lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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if (lpi_status & LPI_CTRL_STATUS_TLPIEN)
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status |= TX_ENTRY_LPI_MODE;
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if (lpi_status & LPI_CTRL_STATUS_TLPIEX)
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status |= TX_EXIT_LPI_MODE;
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if (lpi_status & LPI_CTRL_STATUS_RLPIEN)
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status |= RX_ENTRY_LPI_MODE;
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if (lpi_status & LPI_CTRL_STATUS_RLPIEX)
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status |= RX_EXIT_LPI_MODE;
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return status;
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}
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/* Handle extra events on specific interrupts hw dependent */
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static int sxgbe_core_host_irq_status(void __iomem *ioaddr,
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struct sxgbe_extra_stats *x)
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{
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return 0;
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int irq_status, status = 0;
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irq_status = readl(ioaddr + SXGBE_CORE_INT_STATUS_REG);
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if (unlikely(irq_status & LPI_INT_STATUS))
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status |= sxgbe_get_lpi_status(ioaddr, irq_status);
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return status;
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}
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/* Set power management mode (e.g. magic frame) */
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@ -138,6 +165,59 @@ static void sxgbe_core_set_speed(void __iomem *ioaddr, unsigned char speed)
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writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
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}
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static void sxgbe_set_eee_mode(void __iomem *ioaddr)
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{
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u32 ctrl;
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/* Enable the LPI mode for transmit path with Tx automate bit set.
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* When Tx Automate bit is set, MAC internally handles the entry
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* to LPI mode after all outstanding and pending packets are
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* transmitted.
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*/
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ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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ctrl |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_TXA;
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writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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}
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static void sxgbe_reset_eee_mode(void __iomem *ioaddr)
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{
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u32 ctrl;
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ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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ctrl &= ~(LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_TXA);
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writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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}
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static void sxgbe_set_eee_pls(void __iomem *ioaddr, const int link)
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{
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u32 ctrl;
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ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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/* If the PHY link status is UP then set PLS */
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if (link)
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ctrl |= LPI_CTRL_STATUS_PLS;
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else
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ctrl &= ~LPI_CTRL_STATUS_PLS;
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writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
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}
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static void sxgbe_set_eee_timer(void __iomem *ioaddr,
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const int ls, const int tw)
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{
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int value = ((tw & 0xffff)) | ((ls & 0x7ff) << 16);
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/* Program the timers in the LPI timer control register:
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* LS: minimum time (ms) for which the link
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* status from PHY should be ok before transmitting
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* the LPI pattern.
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* TW: minimum time (us) for which the core waits
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* after it has stopped transmitting the LPI pattern.
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*/
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writel(value, ioaddr + SXGBE_CORE_LPI_TIMER_CTRL);
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}
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const struct sxgbe_core_ops core_ops = {
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.core_init = sxgbe_core_init,
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.dump_regs = sxgbe_core_dump_regs,
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@ -150,6 +230,10 @@ const struct sxgbe_core_ops core_ops = {
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.get_controller_version = sxgbe_get_controller_version,
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.get_hw_feature = sxgbe_get_hw_feature,
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.set_speed = sxgbe_core_set_speed,
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.set_eee_mode = sxgbe_set_eee_mode,
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.reset_eee_mode = sxgbe_reset_eee_mode,
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.set_eee_timer = sxgbe_set_eee_timer,
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.set_eee_pls = sxgbe_set_eee_pls,
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};
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void)
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@ -32,10 +32,57 @@ struct sxgbe_stats {
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}
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static const struct sxgbe_stats sxgbe_gstrings_stats[] = {
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SXGBE_STAT(tx_lpi_entry_n),
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SXGBE_STAT(tx_lpi_exit_n),
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SXGBE_STAT(rx_lpi_entry_n),
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SXGBE_STAT(rx_lpi_exit_n),
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SXGBE_STAT(eee_wakeup_error_n),
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};
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#define SXGBE_STATS_LEN ARRAY_SIZE(sxgbe_gstrings_stats)
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static int sxgbe_get_eee(struct net_device *dev,
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struct ethtool_eee *edata)
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{
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struct sxgbe_priv_data *priv = netdev_priv(dev);
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if (!priv->hw_cap.eee)
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return -EOPNOTSUPP;
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edata->eee_enabled = priv->eee_enabled;
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edata->eee_active = priv->eee_active;
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edata->tx_lpi_timer = priv->tx_lpi_timer;
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return phy_ethtool_get_eee(priv->phydev, edata);
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}
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static int sxgbe_set_eee(struct net_device *dev,
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struct ethtool_eee *edata)
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{
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struct sxgbe_priv_data *priv = netdev_priv(dev);
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priv->eee_enabled = edata->eee_enabled;
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if (!priv->eee_enabled) {
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sxgbe_disable_eee_mode(priv);
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} else {
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/* We are asking for enabling the EEE but it is safe
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* to verify all by invoking the eee_init function.
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* In case of failure it will return an error.
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*/
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priv->eee_enabled = sxgbe_eee_init(priv);
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if (!priv->eee_enabled)
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return -EOPNOTSUPP;
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/* Do not change tx_lpi_timer in case of failure */
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priv->tx_lpi_timer = edata->tx_lpi_timer;
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}
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return phy_ethtool_set_eee(priv->phydev, edata);
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}
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static const struct ethtool_ops sxgbe_ethtool_ops = {
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.get_eee = sxgbe_get_eee,
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.set_eee = sxgbe_set_eee,
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};
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void sxgbe_set_ethtool_ops(struct net_device *netdev)
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@ -55,6 +55,9 @@
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#define SXGBE_DEFAULT_LPI_TIMER 1000
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static int debug = -1;
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static int eee_timer = SXGBE_DEFAULT_LPI_TIMER;
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module_param(eee_timer, int, S_IRUGO | S_IWUSR);
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module_param(debug, int, S_IRUGO | S_IWUSR);
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static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
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@ -67,6 +70,97 @@ static irqreturn_t sxgbe_rx_interrupt(int irq, void *dev_id);
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#define SXGBE_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x))
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#define SXGBE_LPI_TIMER(x) (jiffies + msecs_to_jiffies(x))
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/**
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* sxgbe_verify_args - verify the driver parameters.
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* Description: it verifies if some wrong parameter is passed to the driver.
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* Note that wrong parameters are replaced with the default values.
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*/
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static void sxgbe_verify_args(void)
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{
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if (unlikely(eee_timer < 0))
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eee_timer = SXGBE_DEFAULT_LPI_TIMER;
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}
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static void sxgbe_enable_eee_mode(const struct sxgbe_priv_data *priv)
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{
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/* Check and enter in LPI mode */
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if (!priv->tx_path_in_lpi_mode)
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priv->hw->mac->set_eee_mode(priv->ioaddr);
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}
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void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv)
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{
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/* Exit and disable EEE in case of we are are in LPI state. */
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priv->hw->mac->reset_eee_mode(priv->ioaddr);
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del_timer_sync(&priv->eee_ctrl_timer);
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priv->tx_path_in_lpi_mode = false;
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}
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/**
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* sxgbe_eee_ctrl_timer
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* @arg : data hook
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* Description:
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* If there is no data transfer and if we are not in LPI state,
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* then MAC Transmitter can be moved to LPI state.
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*/
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static void sxgbe_eee_ctrl_timer(unsigned long arg)
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{
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struct sxgbe_priv_data *priv = (struct sxgbe_priv_data *)arg;
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sxgbe_enable_eee_mode(priv);
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mod_timer(&priv->eee_ctrl_timer, SXGBE_LPI_TIMER(eee_timer));
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}
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/**
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* sxgbe_eee_init
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* @priv: private device pointer
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* Description:
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* If the EEE support has been enabled while configuring the driver,
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* if the GMAC actually supports the EEE (from the HW cap reg) and the
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* phy can also manage EEE, so enable the LPI state and start the timer
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* to verify if the tx path can enter in LPI state.
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*/
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bool sxgbe_eee_init(struct sxgbe_priv_data * const priv)
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{
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bool ret = false;
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/* MAC core supports the EEE feature. */
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if (priv->hw_cap.eee) {
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/* Check if the PHY supports EEE */
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if (phy_init_eee(priv->phydev, 1))
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return false;
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priv->eee_active = 1;
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init_timer(&priv->eee_ctrl_timer);
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priv->eee_ctrl_timer.function = sxgbe_eee_ctrl_timer;
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priv->eee_ctrl_timer.data = (unsigned long)priv;
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priv->eee_ctrl_timer.expires = SXGBE_LPI_TIMER(eee_timer);
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add_timer(&priv->eee_ctrl_timer);
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priv->hw->mac->set_eee_timer(priv->ioaddr,
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SXGBE_DEFAULT_LPI_TIMER,
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priv->tx_lpi_timer);
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pr_info("Energy-Efficient Ethernet initialized\n");
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ret = true;
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}
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return ret;
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}
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static void sxgbe_eee_adjust(const struct sxgbe_priv_data *priv)
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{
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/* When the EEE has been already initialised we have to
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* modify the PLS bit in the LPI ctrl & status reg according
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* to the PHY link status. For this reason.
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*/
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if (priv->eee_enabled)
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priv->hw->mac->set_eee_pls(priv->ioaddr, priv->phydev->link);
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}
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/**
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* sxgbe_clk_csr_set - dynamically set the MDC clock
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* @priv: driver private structure
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@ -156,6 +250,9 @@ static void sxgbe_adjust_link(struct net_device *dev)
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if (new_state & netif_msg_link(priv))
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phy_print_status(phydev);
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/* Alter the MAC settings for EEE */
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sxgbe_eee_adjust(priv);
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}
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/**
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@ -676,7 +773,7 @@ static void sxgbe_tx_queue_clean(struct sxgbe_tx_queue *tqueue)
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* @priv: driver private structure
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* Description: it reclaims resources after transmission completes.
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*/
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static void sxgbe_tx_all_clean(struct sxgbe_priv_data *priv)
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static void sxgbe_tx_all_clean(struct sxgbe_priv_data * const priv)
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{
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u8 queue_num;
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@ -685,6 +782,11 @@ static void sxgbe_tx_all_clean(struct sxgbe_priv_data *priv)
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sxgbe_tx_queue_clean(tqueue);
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}
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if ((priv->eee_enabled) && (!priv->tx_path_in_lpi_mode)) {
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sxgbe_enable_eee_mode(priv);
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mod_timer(&priv->eee_ctrl_timer, SXGBE_LPI_TIMER(eee_timer));
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}
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}
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/**
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@ -766,6 +868,7 @@ static int sxgbe_get_hw_features(struct sxgbe_priv_data * const priv)
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features->multi_macaddr = SXGBE_HW_FEAT_MACADDR_COUNT(rval);
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features->tstamp_srcselect = SXGBE_HW_FEAT_TSTMAP_SRC(rval);
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features->sa_vlan_insert = SXGBE_HW_FEAT_SRCADDR_VLAN(rval);
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features->eee = SXGBE_HW_FEAT_EEE(rval);
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}
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/* Read First Capability Register CAP[1] */
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@ -983,6 +1086,20 @@ static int sxgbe_open(struct net_device *dev)
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goto init_error;
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}
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||||
|
||||
/* If the LPI irq is different from the mac irq
|
||||
* register a dedicated handler
|
||||
*/
|
||||
if (priv->lpi_irq != dev->irq) {
|
||||
ret = devm_request_irq(priv->device, priv->lpi_irq,
|
||||
sxgbe_common_interrupt,
|
||||
IRQF_SHARED, dev->name, dev);
|
||||
if (unlikely(ret < 0)) {
|
||||
netdev_err(dev, "%s: ERROR: allocating the LPI IRQ %d (%d)\n",
|
||||
__func__, priv->lpi_irq, ret);
|
||||
goto init_error;
|
||||
}
|
||||
}
|
||||
|
||||
/* Request TX DMA irq lines */
|
||||
SXGBE_FOR_EACH_QUEUE(SXGBE_TX_QUEUES, queue_num) {
|
||||
ret = devm_request_irq(priv->device,
|
||||
|
|
@ -1038,6 +1155,9 @@ static int sxgbe_open(struct net_device *dev)
|
|||
priv->hw->dma->rx_watchdog(priv->ioaddr, SXGBE_MAX_DMA_RIWT);
|
||||
}
|
||||
|
||||
priv->tx_lpi_timer = SXGBE_DEFAULT_LPI_TIMER;
|
||||
priv->eee_enabled = sxgbe_eee_init(priv);
|
||||
|
||||
napi_enable(&priv->napi);
|
||||
netif_start_queue(dev);
|
||||
|
||||
|
|
@ -1063,6 +1183,9 @@ static int sxgbe_release(struct net_device *dev)
|
|||
{
|
||||
struct sxgbe_priv_data *priv = netdev_priv(dev);
|
||||
|
||||
if (priv->eee_enabled)
|
||||
del_timer_sync(&priv->eee_ctrl_timer);
|
||||
|
||||
/* Stop and disconnect the PHY */
|
||||
if (priv->phydev) {
|
||||
phy_stop(priv->phydev);
|
||||
|
|
@ -1123,6 +1246,9 @@ static netdev_tx_t sxgbe_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
/* get the spinlock */
|
||||
spin_lock(&tqueue->tx_lock);
|
||||
|
||||
if (priv->tx_path_in_lpi_mode)
|
||||
sxgbe_disable_eee_mode(priv);
|
||||
|
||||
if (unlikely(sxgbe_tx_avail(tqueue, tx_rsize) < nr_frags + 1)) {
|
||||
if (!netif_tx_queue_stopped(dev_txq)) {
|
||||
netif_tx_stop_queue(dev_txq);
|
||||
|
|
@ -1380,6 +1506,25 @@ static void sxgbe_tx_timeout(struct net_device *dev)
|
|||
*/
|
||||
static irqreturn_t sxgbe_common_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct net_device *netdev = (struct net_device *)dev_id;
|
||||
struct sxgbe_priv_data *priv = netdev_priv(netdev);
|
||||
int status;
|
||||
|
||||
status = priv->hw->mac->host_irq_status(priv->ioaddr, &priv->xstats);
|
||||
/* For LPI we need to save the tx status */
|
||||
if (status & TX_ENTRY_LPI_MODE) {
|
||||
priv->xstats.tx_lpi_entry_n++;
|
||||
priv->tx_path_in_lpi_mode = true;
|
||||
}
|
||||
if (status & TX_EXIT_LPI_MODE) {
|
||||
priv->xstats.tx_lpi_exit_n++;
|
||||
priv->tx_path_in_lpi_mode = false;
|
||||
}
|
||||
if (status & RX_ENTRY_LPI_MODE)
|
||||
priv->xstats.rx_lpi_entry_n++;
|
||||
if (status & RX_EXIT_LPI_MODE)
|
||||
priv->xstats.rx_lpi_exit_n++;
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
|
@ -1876,6 +2021,9 @@ struct sxgbe_priv_data *sxgbe_drv_probe(struct device *device,
|
|||
priv->plat = plat_dat;
|
||||
priv->ioaddr = addr;
|
||||
|
||||
/* Verify driver arguments */
|
||||
sxgbe_verify_args();
|
||||
|
||||
/* Init MAC and get the capabilities */
|
||||
sxgbe_hw_init(priv);
|
||||
|
||||
|
|
@ -2032,7 +2180,21 @@ module_exit(sxgbe_exit);
|
|||
#ifndef MODULE
|
||||
static int __init sxgbe_cmdline_opt(char *str)
|
||||
{
|
||||
char *opt;
|
||||
|
||||
if (!str || !*str)
|
||||
return -EINVAL;
|
||||
while ((opt = strsep(&str, ",")) != NULL) {
|
||||
if (!strncmp(opt, "eee_timer:", 6)) {
|
||||
if (kstrtoint(opt + 10, 0, &eee_timer))
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
err:
|
||||
pr_err("%s: ERROR broken module parameter conversion\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
__setup("sxgbeeth=", sxgbe_cmdline_opt);
|
||||
|
|
@ -2043,6 +2205,7 @@ __setup("sxgbeeth=", sxgbe_cmdline_opt);
|
|||
MODULE_DESCRIPTION("SAMSUNG 10G/2.5G/1G Ethernet PLATFORM driver");
|
||||
|
||||
MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
|
||||
MODULE_PARM_DESC(eee_timer, "EEE-LPI Default LS timer value");
|
||||
|
||||
MODULE_AUTHOR("Siva Reddy Kallam <siva.kallam@samsung.com>");
|
||||
MODULE_AUTHOR("ByungHo An <bh74.an@samsung.com>");
|
||||
|
|
|
|||
|
|
@ -145,6 +145,12 @@ static int sxgbe_platform_probe(struct platform_device *pdev)
|
|||
}
|
||||
}
|
||||
|
||||
priv->lpi_irq = irq_of_parse_and_map(node, chan);
|
||||
if (priv->lpi_irq <= 0) {
|
||||
dev_err(dev, "sxgbe lpi irq parsing failed\n");
|
||||
goto err_rx_irq_unmap;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, priv->dev);
|
||||
|
||||
pr_debug("platform driver registration completed\n");
|
||||
|
|
|
|||
|
|
@ -25,6 +25,11 @@
|
|||
#define SXGBE_CORE_HASH_TABLE_REG5 0x0024
|
||||
#define SXGBE_CORE_HASH_TABLE_REG6 0x0028
|
||||
#define SXGBE_CORE_HASH_TABLE_REG7 0x002C
|
||||
|
||||
/* EEE-LPI Registers */
|
||||
#define SXGBE_CORE_LPI_CTRL_STATUS 0x00D0
|
||||
#define SXGBE_CORE_LPI_TIMER_CTRL 0x00D4
|
||||
|
||||
/* VLAN Specific Registers */
|
||||
#define SXGBE_CORE_VLAN_TAG_REG 0x0050
|
||||
#define SXGBE_CORE_VLAN_HASHTAB_REG 0x0058
|
||||
|
|
|
|||
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Ссылка в новой задаче