MIPS: Add cases for CPU_P5600

Add a CPU_P5600 case to various switch statements, doing the same thing
as for CPU_PROAPTIV.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6408/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/include/asm/cpu-type.h

@@ -46,6 +46,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
 	case CPU_M14KEC:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
+	case CPU_P5600:
 #endif
 
 #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1

arch/mips/kernel/idle.c

@@ -187,6 +187,7 @@ void __init check_wait(void)
 	case CPU_1074K:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
+	case CPU_P5600:
 		cpu_wait = r4k_wait;
 		if (read_c0_config7() & MIPS_CONF7_WII)
 			cpu_wait = r4k_wait_irqoff;

arch/mips/kernel/spram.c

@@ -208,6 +208,7 @@ void spram_config(void)
 	case CPU_1074K:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
+	case CPU_P5600:
 		config0 = read_c0_config();
 		/* FIXME: addresses are Malta specific */
 		if (config0 & (1<<24)) {

arch/mips/kernel/traps.c

@@ -1439,6 +1439,7 @@ static inline void parity_protection_init(void)
 	case CPU_1074K:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
+	case CPU_P5600:
 		{
 #define ERRCTL_PE	0x80000000
 #define ERRCTL_L2P	0x00800000

arch/mips/mm/c-r4k.c

@@ -1115,6 +1115,7 @@ static void probe_pcache(void)
 	case CPU_1004K:
 	case CPU_1074K:
 	case CPU_INTERAPTIV:
+	case CPU_P5600:
 	case CPU_PROAPTIV:
 		if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K))
 			alias_74k_erratum(c);

arch/mips/mm/sc-mips.c

@@ -79,6 +79,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
 	case CPU_1074K:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
+	case CPU_P5600:
 	case CPU_BMIPS5000:
 		if (config2 & (1 << 12))
 			return 0;

arch/mips/mm/tlbex.c

@@ -511,6 +511,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
 		case CPU_74K:
 		case CPU_1074K:
 		case CPU_PROAPTIV:
+		case CPU_P5600:
 			break;
 
 		default: