Merge branch 'thread-irq-simpler' into devel
This commit is contained in:
Linus Walleij
Коммит
acf1fcf772
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@ -175,8 +175,8 @@ The IRQ portions of the GPIO block are implemented using an irqchip, using
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the header <linux/irq.h>. So basically such a driver is utilizing two sub-
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systems simultaneously: gpio and irq.
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RT_FULL: GPIO driver should not use spinlock_t or any sleepable APIs
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(like PM runtime) as part of its irq_chip implementation on -RT.
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RT_FULL: a realtime compliant GPIO driver should not use spinlock_t or any
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sleepable APIs (like PM runtime) as part of its irq_chip implementation.
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- spinlock_t should be replaced with raw_spinlock_t [1].
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- If sleepable APIs have to be used, these can be done from the .irq_bus_lock()
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and .irq_bus_unlock() callbacks, as these are the only slowpath callbacks
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@ -185,33 +185,32 @@ RT_FULL: GPIO driver should not use spinlock_t or any sleepable APIs
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GPIO irqchips usually fall in one of two categories:
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* CHAINED GPIO irqchips: these are usually the type that is embedded on
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an SoC. This means that there is a fast IRQ handler for the GPIOs that
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an SoC. This means that there is a fast IRQ flow handler for the GPIOs that
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gets called in a chain from the parent IRQ handler, most typically the
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system interrupt controller. This means the GPIO irqchip is registered
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using irq_set_chained_handler() or the corresponding
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gpiochip_set_chained_irqchip() helper function, and the GPIO irqchip
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handler will be called immediately from the parent irqchip, while
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holding the IRQs disabled. The GPIO irqchip will then end up calling
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something like this sequence in its interrupt handler:
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system interrupt controller. This means that the GPIO irqchip handler will
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be called immediately from the parent irqchip, while holding the IRQs
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disabled. The GPIO irqchip will then end up calling something like this
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sequence in its interrupt handler:
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static irqreturn_t tc3589x_gpio_irq(int irq, void *data)
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static irqreturn_t foo_gpio_irq(int irq, void *data)
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chained_irq_enter(...);
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generic_handle_irq(...);
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chained_irq_exit(...);
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Chained GPIO irqchips typically can NOT set the .can_sleep flag on
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struct gpio_chip, as everything happens directly in the callbacks.
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struct gpio_chip, as everything happens directly in the callbacks: no
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slow bus traffic like I2C can be used.
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RT_FULL: Note, chained IRQ handlers will not be forced threaded on -RT.
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As result, spinlock_t or any sleepable APIs (like PM runtime) can't be used
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in chained IRQ handler.
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if required (and if it can't be converted to the nested threaded GPIO irqchip)
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- chained IRQ handler can be converted to generic irq handler and this way
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it will be threaded IRQ handler on -RT and hard IRQ handler on non-RT
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If required (and if it can't be converted to the nested threaded GPIO irqchip)
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a chained IRQ handler can be converted to generic irq handler and this way
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it will be a threaded IRQ handler on -RT and a hard IRQ handler on non-RT
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(for example, see [3]).
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Know W/A: The generic_handle_irq() is expected to be called with IRQ disabled,
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so IRQ core will complain if it will be called from IRQ handler which is
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forced thread. The "fake?" raw lock can be used to W/A this problem:
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so the IRQ core will complain if it is called from an IRQ handler which is
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forced to a thread. The "fake?" raw lock can be used to W/A this problem:
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raw_spinlock_t wa_lock;
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static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
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@ -243,7 +242,7 @@ GPIO irqchips usually fall in one of two categories:
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by the driver. The hallmark of this driver is to call something like
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this in its interrupt handler:
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static irqreturn_t tc3589x_gpio_irq(int irq, void *data)
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static irqreturn_t foo_gpio_irq(int irq, void *data)
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...
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handle_nested_irq(irq);
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@ -256,23 +255,31 @@ associated irqdomain and resource allocation callbacks, the gpiolib has
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some helpers that can be enabled by selecting the GPIOLIB_IRQCHIP Kconfig
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symbol:
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* gpiochip_irqchip_add(): adds an irqchip to a gpiochip. It will pass
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* gpiochip_irqchip_add(): adds a chained irqchip to a gpiochip. It will pass
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the struct gpio_chip* for the chip to all IRQ callbacks, so the callbacks
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need to embed the gpio_chip in its state container and obtain a pointer
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to the container using container_of().
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(See Documentation/driver-model/design-patterns.txt)
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If there is a need to exclude certain GPIOs from the IRQ domain, one can
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set .irq_need_valid_mask of the gpiochip before gpiochip_add_data() is
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called. This allocates .irq_valid_mask with as many bits set as there are
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GPIOs in the chip. Drivers can exclude GPIOs by clearing bits from this
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mask. The mask must be filled in before gpiochip_irqchip_add() is called.
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* gpiochip_irqchip_add_nested(): adds a nested irqchip to a gpiochip.
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Apart from that it works exactly like the chained irqchip.
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* gpiochip_set_chained_irqchip(): sets up a chained irq handler for a
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gpio_chip from a parent IRQ and passes the struct gpio_chip* as handler
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data. (Notice handler data, since the irqchip data is likely used by the
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parent irqchip!) This is for the chained type of chip. This is also used
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to set up a nested irqchip if NULL is passed as handler.
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parent irqchip!).
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* gpiochip_set_nested_irqchip(): sets up a nested irq handler for a
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gpio_chip from a parent IRQ. As the parent IRQ has usually been
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explicitly requested by the driver, this does very little more than
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mark all the child IRQs as having the other IRQ as parent.
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If there is a need to exclude certain GPIOs from the IRQ domain, you can
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set .irq_need_valid_mask of the gpiochip before gpiochip_add_data() is
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called. This allocates an .irq_valid_mask with as many bits set as there
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are GPIOs in the chip. Drivers can exclude GPIOs by clearing bits from this
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mask. The mask must be filled in before gpiochip_irqchip_add() or
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gpiochip_irqchip_add_nested() is called.
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To use the helpers please keep the following in mind:
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@ -323,6 +330,9 @@ When implementing an irqchip inside a GPIO driver, these two functions should
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typically be called in the .startup() and .shutdown() callbacks from the
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irqchip.
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When using the gpiolib irqchip helpers, these callback are automatically
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assigned.
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Real-Time compliance for GPIO IRQ chips
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---------------------------------------
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@ -468,17 +468,19 @@ static int adnp_irq_setup(struct adnp *adnp)
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return err;
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}
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err = gpiochip_irqchip_add(chip,
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&adnp_irq_chip,
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0,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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err = gpiochip_irqchip_add_nested(chip,
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&adnp_irq_chip,
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0,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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if (err) {
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dev_err(chip->parent,
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"could not connect irqchip to gpiochip\n");
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return err;
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}
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gpiochip_set_nested_irqchip(chip, &adnp_irq_chip, adnp->client->irq);
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return 0;
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}
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@ -351,8 +351,8 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
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return retval;
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}
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gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0,
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handle_simple_irq, IRQ_TYPE_NONE);
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gpiochip_irqchip_add_nested(&cg->chip, &crystalcove_irqchip, 0,
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handle_simple_irq, IRQ_TYPE_NONE);
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retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
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IRQF_ONESHOT, KBUILD_MODNAME, cg);
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@ -362,6 +362,8 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
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return retval;
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}
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gpiochip_set_nested_irqchip(&cg->chip, &crystalcove_irqchip, irq);
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return 0;
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}
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@ -467,7 +467,6 @@ static int dln2_gpio_probe(struct platform_device *pdev)
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dln2->gpio.base = -1;
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dln2->gpio.ngpio = pins;
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dln2->gpio.can_sleep = true;
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dln2->gpio.irq_not_threaded = true;
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dln2->gpio.set = dln2_gpio_set;
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dln2->gpio.get = dln2_gpio_get;
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dln2->gpio.request = dln2_gpio_request;
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@ -520,20 +520,19 @@ static int max732x_irq_setup(struct max732x_chip *chip,
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client->irq);
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return ret;
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}
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ret = gpiochip_irqchip_add(&chip->gpio_chip,
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&max732x_irq_chip,
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irq_base,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
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&max732x_irq_chip,
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irq_base,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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if (ret) {
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dev_err(&client->dev,
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"could not connect irqchip to gpiochip\n");
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return ret;
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}
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gpiochip_set_chained_irqchip(&chip->gpio_chip,
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&max732x_irq_chip,
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client->irq,
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NULL);
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gpiochip_set_nested_irqchip(&chip->gpio_chip,
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&max732x_irq_chip,
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client->irq);
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}
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return 0;
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@ -473,21 +473,20 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
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return err;
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}
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err = gpiochip_irqchip_add(chip,
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&mcp23s08_irq_chip,
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0,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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err = gpiochip_irqchip_add_nested(chip,
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&mcp23s08_irq_chip,
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0,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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if (err) {
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dev_err(chip->parent,
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"could not connect irqchip to gpiochip: %d\n", err);
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return err;
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}
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gpiochip_set_chained_irqchip(chip,
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&mcp23s08_irq_chip,
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mcp->irq,
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NULL);
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gpiochip_set_nested_irqchip(chip,
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&mcp23s08_irq_chip,
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mcp->irq);
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return 0;
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}
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|
|
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@ -636,20 +636,20 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
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return ret;
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}
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ret = gpiochip_irqchip_add(&chip->gpio_chip,
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&pca953x_irq_chip,
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irq_base,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
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&pca953x_irq_chip,
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irq_base,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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if (ret) {
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dev_err(&client->dev,
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"could not connect irqchip to gpiochip\n");
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return ret;
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}
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|
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gpiochip_set_chained_irqchip(&chip->gpio_chip,
|
||||
&pca953x_irq_chip,
|
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client->irq, NULL);
|
||||
gpiochip_set_nested_irqchip(&chip->gpio_chip,
|
||||
&pca953x_irq_chip,
|
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client->irq);
|
||||
}
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|
||||
return 0;
|
||||
|
|
|
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|
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@ -378,9 +378,10 @@ static int pcf857x_probe(struct i2c_client *client,
|
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/* Enable irqchip if we have an interrupt */
|
||||
if (client->irq) {
|
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status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip,
|
||||
0, handle_level_irq,
|
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IRQ_TYPE_NONE);
|
||||
status = gpiochip_irqchip_add_nested(&gpio->chip,
|
||||
&pcf857x_irq_chip,
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0, handle_level_irq,
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IRQ_TYPE_NONE);
|
||||
if (status) {
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||||
dev_err(&client->dev, "cannot add irqchip\n");
|
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goto fail;
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||||
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@ -393,8 +394,8 @@ static int pcf857x_probe(struct i2c_client *client,
|
|||
if (status)
|
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goto fail;
|
||||
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gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
|
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client->irq, NULL);
|
||||
gpiochip_set_nested_irqchip(&gpio->chip, &pcf857x_irq_chip,
|
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client->irq);
|
||||
gpio->irq_parent = client->irq;
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}
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||||
|
||||
|
|
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|
|
@ -484,21 +484,20 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
|
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if (stmpe_gpio->norequest_mask & BIT(i))
|
||||
clear_bit(i, stmpe_gpio->chip.irq_valid_mask);
|
||||
}
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||||
ret = gpiochip_irqchip_add(&stmpe_gpio->chip,
|
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&stmpe_gpio_irq_chip,
|
||||
0,
|
||||
handle_simple_irq,
|
||||
IRQ_TYPE_NONE);
|
||||
ret = gpiochip_irqchip_add_nested(&stmpe_gpio->chip,
|
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&stmpe_gpio_irq_chip,
|
||||
0,
|
||||
handle_simple_irq,
|
||||
IRQ_TYPE_NONE);
|
||||
if (ret) {
|
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dev_err(&pdev->dev,
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||||
"could not connect irqchip to gpiochip\n");
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goto out_disable;
|
||||
}
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||||
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||||
gpiochip_set_chained_irqchip(&stmpe_gpio->chip,
|
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&stmpe_gpio_irq_chip,
|
||||
irq,
|
||||
NULL);
|
||||
gpiochip_set_nested_irqchip(&stmpe_gpio->chip,
|
||||
&stmpe_gpio_irq_chip,
|
||||
irq);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, stmpe_gpio);
|
||||
|
|
|
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|
|
@ -337,21 +337,20 @@ static int tc3589x_gpio_probe(struct platform_device *pdev)
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|||
return ret;
|
||||
}
|
||||
|
||||
ret = gpiochip_irqchip_add(&tc3589x_gpio->chip,
|
||||
&tc3589x_gpio_irq_chip,
|
||||
0,
|
||||
handle_simple_irq,
|
||||
IRQ_TYPE_NONE);
|
||||
ret = gpiochip_irqchip_add_nested(&tc3589x_gpio->chip,
|
||||
&tc3589x_gpio_irq_chip,
|
||||
0,
|
||||
handle_simple_irq,
|
||||
IRQ_TYPE_NONE);
|
||||
if (ret) {
|
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dev_err(&pdev->dev,
|
||||
"could not connect irqchip to gpiochip\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
|
||||
&tc3589x_gpio_irq_chip,
|
||||
irq,
|
||||
NULL);
|
||||
gpiochip_set_nested_irqchip(&tc3589x_gpio->chip,
|
||||
&tc3589x_gpio_irq_chip,
|
||||
irq);
|
||||
|
||||
platform_set_drvdata(pdev, tc3589x_gpio);
|
||||
|
||||
|
|
|
|||
|
|
@ -426,8 +426,8 @@ static int wcove_gpio_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = gpiochip_irqchip_add(&wg->chip, &wcove_irqchip, 0,
|
||||
handle_simple_irq, IRQ_TYPE_NONE);
|
||||
ret = gpiochip_irqchip_add_nested(&wg->chip, &wcove_irqchip, 0,
|
||||
handle_simple_irq, IRQ_TYPE_NONE);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to add irqchip: %d\n", ret);
|
||||
return ret;
|
||||
|
|
@ -446,6 +446,8 @@ static int wcove_gpio_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
gpiochip_set_nested_irqchip(&wg->chip, &wcove_irqchip, virq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1440,7 +1440,7 @@ static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
|
|||
}
|
||||
|
||||
/**
|
||||
* gpiochip_set_chained_irqchip() - sets a chained irqchip to a gpiochip
|
||||
* gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
|
||||
* @gpiochip: the gpiochip to set the irqchip chain to
|
||||
* @irqchip: the irqchip to chain to the gpiochip
|
||||
* @parent_irq: the irq number corresponding to the parent IRQ for this
|
||||
|
|
@ -1449,10 +1449,10 @@ static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
|
|||
* coming out of the gpiochip. If the interrupt is nested rather than
|
||||
* cascaded, pass NULL in this handler argument
|
||||
*/
|
||||
void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
int parent_irq,
|
||||
irq_flow_handler_t parent_handler)
|
||||
static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
int parent_irq,
|
||||
irq_flow_handler_t parent_handler)
|
||||
{
|
||||
unsigned int offset;
|
||||
|
||||
|
|
@ -1476,7 +1476,7 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
|||
irq_set_chained_handler_and_data(parent_irq, parent_handler,
|
||||
gpiochip);
|
||||
|
||||
gpiochip->irq_parent = parent_irq;
|
||||
gpiochip->irq_chained_parent = parent_irq;
|
||||
}
|
||||
|
||||
/* Set the parent IRQ for all affected IRQs */
|
||||
|
|
@ -1487,8 +1487,47 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
|||
parent_irq);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
|
||||
* @gpiochip: the gpiochip to set the irqchip chain to
|
||||
* @irqchip: the irqchip to chain to the gpiochip
|
||||
* @parent_irq: the irq number corresponding to the parent IRQ for this
|
||||
* chained irqchip
|
||||
* @parent_handler: the parent interrupt handler for the accumulated IRQ
|
||||
* coming out of the gpiochip. If the interrupt is nested rather than
|
||||
* cascaded, pass NULL in this handler argument
|
||||
*/
|
||||
void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
int parent_irq,
|
||||
irq_flow_handler_t parent_handler)
|
||||
{
|
||||
gpiochip_set_cascaded_irqchip(gpiochip, irqchip, parent_irq,
|
||||
parent_handler);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
|
||||
|
||||
/**
|
||||
* gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
|
||||
* @gpiochip: the gpiochip to set the irqchip nested handler to
|
||||
* @irqchip: the irqchip to nest to the gpiochip
|
||||
* @parent_irq: the irq number corresponding to the parent IRQ for this
|
||||
* nested irqchip
|
||||
*/
|
||||
void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
int parent_irq)
|
||||
{
|
||||
if (!gpiochip->irq_nested) {
|
||||
chip_err(gpiochip, "tried to nest a chained gpiochip\n");
|
||||
return;
|
||||
}
|
||||
gpiochip_set_cascaded_irqchip(gpiochip, irqchip, parent_irq,
|
||||
NULL);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
|
||||
|
||||
/**
|
||||
* gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
|
||||
* @d: the irqdomain used by this irqchip
|
||||
|
|
@ -1511,8 +1550,8 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
|
|||
*/
|
||||
irq_set_lockdep_class(irq, chip->lock_key);
|
||||
irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
|
||||
/* Chips that can sleep need nested thread handlers */
|
||||
if (chip->can_sleep && !chip->irq_not_threaded)
|
||||
/* Chips that use nested thread handlers have them marked */
|
||||
if (chip->irq_nested)
|
||||
irq_set_nested_thread(irq, 1);
|
||||
irq_set_noprobe(irq);
|
||||
|
||||
|
|
@ -1530,7 +1569,7 @@ static void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
|
|||
{
|
||||
struct gpio_chip *chip = d->host_data;
|
||||
|
||||
if (chip->can_sleep)
|
||||
if (chip->irq_nested)
|
||||
irq_set_nested_thread(irq, 0);
|
||||
irq_set_chip_and_handler(irq, NULL, NULL);
|
||||
irq_set_chip_data(irq, NULL);
|
||||
|
|
@ -1585,9 +1624,9 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
|
|||
|
||||
acpi_gpiochip_free_interrupts(gpiochip);
|
||||
|
||||
if (gpiochip->irq_parent) {
|
||||
irq_set_chained_handler(gpiochip->irq_parent, NULL);
|
||||
irq_set_handler_data(gpiochip->irq_parent, NULL);
|
||||
if (gpiochip->irq_chained_parent) {
|
||||
irq_set_chained_handler(gpiochip->irq_chained_parent, NULL);
|
||||
irq_set_handler_data(gpiochip->irq_chained_parent, NULL);
|
||||
}
|
||||
|
||||
/* Remove all IRQ mappings and delete the domain */
|
||||
|
|
@ -1611,7 +1650,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
|
|||
}
|
||||
|
||||
/**
|
||||
* gpiochip_irqchip_add() - adds an irqchip to a gpiochip
|
||||
* _gpiochip_irqchip_add() - adds an irqchip to a gpiochip
|
||||
* @gpiochip: the gpiochip to add the irqchip to
|
||||
* @irqchip: the irqchip to add to the gpiochip
|
||||
* @first_irq: if not dynamically assigned, the base (first) IRQ to
|
||||
|
|
@ -1619,6 +1658,8 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
|
|||
* @handler: the irq handler to use (often a predefined irq core function)
|
||||
* @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
|
||||
* to have the core avoid setting up any default type in the hardware.
|
||||
* @nested: whether this is a nested irqchip calling handle_nested_irq()
|
||||
* in its IRQ handler
|
||||
* @lock_key: lockdep class
|
||||
*
|
||||
* This function closely associates a certain irqchip with a certain
|
||||
|
|
@ -1640,6 +1681,7 @@ int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
|
|||
unsigned int first_irq,
|
||||
irq_flow_handler_t handler,
|
||||
unsigned int type,
|
||||
bool nested,
|
||||
struct lock_class_key *lock_key)
|
||||
{
|
||||
struct device_node *of_node;
|
||||
|
|
@ -1654,6 +1696,7 @@ int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
|
|||
pr_err("missing gpiochip .dev parent pointer\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
gpiochip->irq_nested = nested;
|
||||
of_node = gpiochip->parent->of_node;
|
||||
#ifdef CONFIG_OF_GPIO
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -82,8 +82,6 @@ enum single_ended_mode {
|
|||
* implies that if the chip supports IRQs, these IRQs need to be threaded
|
||||
* as the chip access may sleep when e.g. reading out the IRQ status
|
||||
* registers.
|
||||
* @irq_not_threaded: flag must be set if @can_sleep is set but the
|
||||
* IRQs don't need to be threaded
|
||||
* @read_reg: reader function for generic GPIO
|
||||
* @write_reg: writer function for generic GPIO
|
||||
* @pin2mask: some generic GPIO controllers work with the big-endian bits
|
||||
|
|
@ -109,8 +107,10 @@ enum single_ended_mode {
|
|||
* for GPIO IRQs, provided by GPIO driver
|
||||
* @irq_default_type: default IRQ triggering type applied during GPIO driver
|
||||
* initialization, provided by GPIO driver
|
||||
* @irq_parent: GPIO IRQ chip parent/bank linux irq number,
|
||||
* provided by GPIO driver
|
||||
* @irq_chained_parent: GPIO IRQ chip parent/bank linux irq number,
|
||||
* provided by GPIO driver for chained interrupt (not for nested
|
||||
* interrupts).
|
||||
* @irq_nested: True if set the interrupt handling is nested.
|
||||
* @irq_need_valid_mask: If set core allocates @irq_valid_mask with all
|
||||
* bits set to one
|
||||
* @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to
|
||||
|
|
@ -166,7 +166,6 @@ struct gpio_chip {
|
|||
u16 ngpio;
|
||||
const char *const *names;
|
||||
bool can_sleep;
|
||||
bool irq_not_threaded;
|
||||
|
||||
#if IS_ENABLED(CONFIG_GPIO_GENERIC)
|
||||
unsigned long (*read_reg)(void __iomem *reg);
|
||||
|
|
@ -192,7 +191,8 @@ struct gpio_chip {
|
|||
unsigned int irq_base;
|
||||
irq_flow_handler_t irq_handler;
|
||||
unsigned int irq_default_type;
|
||||
int irq_parent;
|
||||
int irq_chained_parent;
|
||||
bool irq_nested;
|
||||
bool irq_need_valid_mask;
|
||||
unsigned long *irq_valid_mask;
|
||||
struct lock_class_key *lock_key;
|
||||
|
|
@ -270,24 +270,40 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
|||
int parent_irq,
|
||||
irq_flow_handler_t parent_handler);
|
||||
|
||||
void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
int parent_irq);
|
||||
|
||||
int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
unsigned int first_irq,
|
||||
irq_flow_handler_t handler,
|
||||
unsigned int type,
|
||||
bool nested,
|
||||
struct lock_class_key *lock_key);
|
||||
|
||||
/* FIXME: I assume threaded IRQchips do not have the lockdep problem */
|
||||
static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
|
||||
struct irq_chip *irqchip,
|
||||
unsigned int first_irq,
|
||||
irq_flow_handler_t handler,
|
||||
unsigned int type)
|
||||
{
|
||||
return _gpiochip_irqchip_add(gpiochip, irqchip, first_irq,
|
||||
handler, type, true, NULL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
#define gpiochip_irqchip_add(...) \
|
||||
( \
|
||||
({ \
|
||||
static struct lock_class_key _key; \
|
||||
_gpiochip_irqchip_add(__VA_ARGS__, &_key); \
|
||||
_gpiochip_irqchip_add(__VA_ARGS__, false, &_key); \
|
||||
}) \
|
||||
)
|
||||
#else
|
||||
#define gpiochip_irqchip_add(...) \
|
||||
_gpiochip_irqchip_add(__VA_ARGS__, NULL)
|
||||
_gpiochip_irqchip_add(__VA_ARGS__, false, NULL)
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_GPIOLIB_IRQCHIP */
|
||||
|
|
|
|||
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