usb: fixes for v3.8-rc5
Finally we have a build fix for fsl-mxc-udc UDC driver. We also have a fix for ep0 maxburst setting on DWC3 which could confuse the HW if we tell it we had way too many streams on that endpoint when it _has_ to be only one. cppi_dma support for MUSB got a fix when running as a module. By dropping the wrong __init annotation, the function will be available even when we're modules and we're done with .init.text section. Last, but not least, we have a fix on FunctionFS which was causing a bug on our option parsing algorithm. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQ+T2OAAoJEIaOsuA1yqRE/eEP/jJTOGu8LJegFohGFSVY80RK IuMhPCRa3uE26YFaP6OQOFHwVSrzMYfITcptQQsrQKv6zE25m+ZYOpD7pL8MQV8q YNhvBS44G7j42akQVoE0kqN00PCWyQgjGxx93+NSOik8IOUy4s9Em8yTkAsXwGa6 CHId1KmEgEq3IbT/+XJAEjMvV7FHONF7p08LK1riPRtIC7sb6BODjdAPKj5Hv5r6 o2xta0LslSNHMIs8CUpeK6qol9n6n9Oz7NRj2yEFiC/bebLjQ0X0Eo44QfwkLtqj u3hFL1BPfv39U47fmAugZqeelKfmPgpohY+CUrCc2Wqrvo1aae7nEJrU4xQV02WH kFj1I8EVtcSmq9TvnXaAW75MNPRUtKAJsxWTTVqTIzPBRYvVv0i+8whDDSiEj+xN FlqzpHd1ojKnqk+BS9nI9XXPGFV022xecPGj5rg9gTEuoutYndHl2LDBB+u6lraP FnhUHkQ4UtJH3yzuZ3Xv7ugrGK9FQX3zJKtXJXS85QTNtFlL80cK3Ph12d6xOCs1 oGadH0wdCOE4lEjeTloaaC+/tMuiSWzLPQBcIUC5IAXrH9zLXuFnkB6RFEqspSJH ebFeJRNKodOaZxge4YbO2/kaY2MQa1hJfzlJtXexZNCKxK7iA+fL9a70KgmWJUs+ DwPlhoa+JFwJLSYVnOow =4n68 -----END PGP SIGNATURE----- Merge tag 'fixes-for-v3.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-linus Felipe writes: usb: fixes for v3.8-rc5 Finally we have a build fix for fsl-mxc-udc UDC driver. We also have a fix for ep0 maxburst setting on DWC3 which could confuse the HW if we tell it we had way too many streams on that endpoint when it _has_ to be only one. cppi_dma support for MUSB got a fix when running as a module. By dropping the wrong __init annotation, the function will be available even when we're modules and we're done with .init.text section. Last, but not least, we have a fix on FunctionFS which was causing a bug on our option parsing algorithm.
This commit is contained in:
Коммит
ad2e632966
|
@ -116,7 +116,7 @@ my_suspend (struct pci_dev * pci_dev,
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|||
return 0; /* a negative value on error, 0 on success. */
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}
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static void __devexit
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static void
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my_remove (struct pci_dev * pci_dev)
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{
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my_device *my = pci_get_drvdata (pci_dev);
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|
@ -124,7 +124,7 @@ my_remove (struct pci_dev * pci_dev)
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/* Describe me. */
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}
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static int __devinit
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static int
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my_probe (struct pci_dev * pci_dev,
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const struct pci_device_id * pci_id)
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{
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|
@ -157,7 +157,7 @@ my_pci_driver = {
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.id_table = my_pci_device_ids,
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.probe = my_probe,
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.remove = __devexit_p (my_remove),
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.remove = my_remove,
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/* Power management functions. */
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.suspend = my_suspend,
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|
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@ -76,7 +76,7 @@ To notify SR-IOV core of Virtual Function Migration:
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Following piece of code illustrates the usage of the SR-IOV API.
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static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
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static int dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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pci_enable_sriov(dev, NR_VIRTFN);
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|
@ -85,7 +85,7 @@ static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *
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return 0;
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}
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static void __devexit dev_remove(struct pci_dev *dev)
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static void dev_remove(struct pci_dev *dev)
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{
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pci_disable_sriov(dev);
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|
@ -131,7 +131,7 @@ static struct pci_driver dev_driver = {
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.name = "SR-IOV Physical Function driver",
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.id_table = dev_id_table,
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.probe = dev_probe,
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.remove = __devexit_p(dev_remove),
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.remove = dev_remove,
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.suspend = dev_suspend,
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.resume = dev_resume,
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.shutdown = dev_shutdown,
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|
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@ -183,12 +183,6 @@ Please mark the initialization and cleanup functions where appropriate
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initializes.
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__exit Exit code. Ignored for non-modular drivers.
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__devinit Device initialization code.
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Identical to __init if the kernel is not compiled
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with CONFIG_HOTPLUG, normal function otherwise.
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__devexit The same for __exit.
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Tips on when/where to use the above attributes:
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o The module_init()/module_exit() functions (and all
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initialization functions called _only_ from these)
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|
@ -196,20 +190,6 @@ Tips on when/where to use the above attributes:
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o Do not mark the struct pci_driver.
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o The ID table array should be marked __devinitconst; this is done
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automatically if the table is declared with DEFINE_PCI_DEVICE_TABLE().
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o The probe() and remove() functions should be marked __devinit
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and __devexit respectively. All initialization functions
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exclusively called by the probe() routine, can be marked __devinit.
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Ditto for remove() and __devexit.
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o If mydriver_remove() is marked with __devexit(), then all address
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references to mydriver_remove must use __devexit_p(mydriver_remove)
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(in the struct pci_driver declaration for example).
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__devexit_p() will generate the function name _or_ NULL if the
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function will be discarded. For an example, see drivers/net/tg3.c.
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o Do NOT mark a function if you are not sure which mark to use.
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Better to not mark the function than mark the function wrong.
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|
|
|
@ -185,7 +185,7 @@ input driver:
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.acpi_match_table ACPI_PTR(mpu3050_acpi_match),
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},
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.probe = mpu3050_probe,
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.remove = __devexit_p(mpu3050_remove),
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.remove = mpu3050_remove,
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.id_table = mpu3050_ids,
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};
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|
|
|
@ -60,11 +60,6 @@ clks: clkctrl@80040000 {
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compatible = "fsl,imx23-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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clock-output-names =
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...
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"uart", /* 32 */
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...
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"end_of_list";
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};
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auart0: serial@8006c000 {
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|
|
|
@ -146,10 +146,6 @@ clks: ccm@53f80000 {
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compatible = "fsl,imx25-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@43f90000 {
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|
|
|
@ -83,11 +83,6 @@ clks: clkctrl@80040000 {
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compatible = "fsl,imx28-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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clock-output-names =
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...
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"uart", /* 45 */
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...
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"end_of_list";
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};
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auart0: serial@8006a000 {
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|
|
|
@ -211,10 +211,6 @@ clks: ccm@020c4000 {
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reg = <0x020c4000 0x4000>;
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interrupts = <0 87 0x04 0 88 0x04>;
|
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#clock-cells = <1>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@02020000 {
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|
|
|
@ -1,4 +1,19 @@
|
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GPIO line that should be set high/low to power off a device
|
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Driver a GPIO line that can be used to turn the power off.
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|
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The driver supports both level triggered and edge triggered power off.
|
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At driver load time, the driver will request the given gpio line and
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install a pm_power_off handler. If the optional properties 'input' is
|
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not found, the GPIO line will be driven in the inactive
|
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state. Otherwise its configured as an input.
|
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|
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When the pm_power_off is called, the gpio is configured as an output,
|
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and drive active, so triggering a level triggered power off
|
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condition. This will also cause an inactive->active edge condition, so
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triggering positive edge triggered power off. After a delay of 100ms,
|
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the GPIO is set to inactive, thus causing an active->inactive edge,
|
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triggering negative edge triggered power off. After another 100ms
|
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delay the GPIO is driver active again. If the power is still on and
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the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.
|
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|
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Required properties:
|
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- compatible : should be "gpio-poweroff".
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|
@ -13,10 +28,9 @@ Optional properties:
|
|||
property is not specified, the GPIO is initialized as an output in its
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inactive state.
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|
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|
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Examples:
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gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio 4 0>; /* GPIO 4 Active Low */
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gpios = <&gpio 4 0>;
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};
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|
|
|
@ -0,0 +1,47 @@
|
|||
CSR SiRFprimaII pinmux controller
|
||||
|
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Required properties:
|
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- compatible : "sirf,prima2-pinctrl"
|
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- reg : Address range of the pinctrl registers
|
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- interrupts : Interrupts used by every GPIO group
|
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- gpio-controller : Indicates this device is a GPIO controller
|
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- interrupt-controller : Marks the device node as an interrupt controller
|
||||
Optional properties:
|
||||
- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
|
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- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
|
||||
|
||||
Please refer to pinctrl-bindings.txt in this directory for details of the common
|
||||
pinctrl bindings used by client devices.
|
||||
|
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SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
|
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Each of these subnodes represents some desired configuration for a group of pins.
|
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|
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Required subnode-properties:
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- sirf,pins : An array of strings. Each string contains the name of a group.
|
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- sirf,function: A string containing the name of the function to mux to the
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group.
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Valid values for group and function names can be found from looking at the
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group and function arrays in driver files:
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drivers/pinctrl/pinctrl-sirf.c
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|
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For example, pinctrl might have subnodes like the following:
|
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uart2_pins_a: uart2@0 {
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uart {
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sirf,pins = "uart2grp";
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sirf,function = "uart2";
|
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};
|
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};
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uart2_noflow_pins_a: uart2@1 {
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uart {
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sirf,pins = "uart2_nostreamctrlgrp";
|
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sirf,function = "uart2_nostreamctrl";
|
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};
|
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};
|
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|
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For a specific board, if it wants to use uart2 without hardware flow control,
|
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it can add the following to its board-specific .dts file.
|
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uart2: uart@0xb0070000 {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&uart2_noflow_pins_a>;
|
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}
|
|
@ -91,7 +91,7 @@ Example (from the nxp OHCI driver):
|
|||
|
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static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
|
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|
||||
static int __devinit usb_hcd_nxp_probe(struct platform_device *pdev)
|
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static int usb_hcd_nxp_probe(struct platform_device *pdev)
|
||||
{
|
||||
(...)
|
||||
struct i2c_adapter *i2c_adap;
|
||||
|
|
|
@ -36,7 +36,7 @@ neigh/default/unres_qlen_bytes - INTEGER
|
|||
The maximum number of bytes which may be used by packets
|
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queued for each unresolved address by other network layers.
|
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(added in linux 3.3)
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Seting negative value is meaningless and will retrun error.
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Setting negative value is meaningless and will return error.
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Default: 65536 Bytes(64KB)
|
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|
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neigh/default/unres_qlen - INTEGER
|
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|
@ -215,7 +215,7 @@ tcp_ecn - INTEGER
|
|||
Possible values are:
|
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0 Disable ECN. Neither initiate nor accept ECN.
|
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1 Always request ECN on outgoing connection attempts.
|
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2 Enable ECN when requested by incomming connections
|
||||
2 Enable ECN when requested by incoming connections
|
||||
but do not request ECN on outgoing connections.
|
||||
Default: 2
|
||||
|
||||
|
@ -503,7 +503,7 @@ tcp_fastopen - INTEGER
|
|||
tcp_syn_retries - INTEGER
|
||||
Number of times initial SYNs for an active TCP connection attempt
|
||||
will be retransmitted. Should not be higher than 255. Default value
|
||||
is 6, which corresponds to 63seconds till the last restransmission
|
||||
is 6, which corresponds to 63seconds till the last retransmission
|
||||
with the current initial RTO of 1second. With this the final timeout
|
||||
for an active TCP connection attempt will happen after 127seconds.
|
||||
|
||||
|
@ -1331,6 +1331,12 @@ force_tllao - BOOLEAN
|
|||
race condition where the sender deletes the cached link-layer address
|
||||
prior to receiving a response to a previous solicitation."
|
||||
|
||||
ndisc_notify - BOOLEAN
|
||||
Define mode for notification of address and device changes.
|
||||
0 - (default): do nothing
|
||||
1 - Generate unsolicited neighbour advertisements when device is brought
|
||||
up or hardware address changes.
|
||||
|
||||
icmp/*:
|
||||
ratelimit - INTEGER
|
||||
Limit the maximal rates for sending ICMPv6 packets.
|
||||
|
@ -1530,7 +1536,7 @@ cookie_hmac_alg - STRING
|
|||
* sha1
|
||||
* none
|
||||
Ability to assign md5 or sha1 as the selected alg is predicated on the
|
||||
configuarion of those algorithms at build time (CONFIG_CRYPTO_MD5 and
|
||||
configuration of those algorithms at build time (CONFIG_CRYPTO_MD5 and
|
||||
CONFIG_CRYPTO_SHA1).
|
||||
|
||||
Default: Dependent on configuration. MD5 if available, else SHA1 if
|
||||
|
@ -1548,7 +1554,7 @@ rcvbuf_policy - INTEGER
|
|||
blocking.
|
||||
|
||||
1: rcvbuf space is per association
|
||||
0: recbuf space is per socket
|
||||
0: rcvbuf space is per socket
|
||||
|
||||
Default: 0
|
||||
|
||||
|
|
|
@ -642,12 +642,13 @@ out the following operations:
|
|||
* During system suspend it calls pm_runtime_get_noresume() and
|
||||
pm_runtime_barrier() for every device right before executing the
|
||||
subsystem-level .suspend() callback for it. In addition to that it calls
|
||||
pm_runtime_disable() for every device right after executing the
|
||||
subsystem-level .suspend() callback for it.
|
||||
__pm_runtime_disable() with 'false' as the second argument for every device
|
||||
right before executing the subsystem-level .suspend_late() callback for it.
|
||||
|
||||
* During system resume it calls pm_runtime_enable() and pm_runtime_put_sync()
|
||||
for every device right before and right after executing the subsystem-level
|
||||
.resume() callback for it, respectively.
|
||||
for every device right after executing the subsystem-level .resume_early()
|
||||
callback and right after executing the subsystem-level .resume() callback
|
||||
for it, respectively.
|
||||
|
||||
7. Generic subsystem callbacks
|
||||
|
||||
|
|
|
@ -236,7 +236,7 @@ static int rpmsg_sample_probe(struct rpmsg_channel *rpdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __devexit rpmsg_sample_remove(struct rpmsg_channel *rpdev)
|
||||
static void rpmsg_sample_remove(struct rpmsg_channel *rpdev)
|
||||
{
|
||||
dev_info(&rpdev->dev, "rpmsg sample client driver is removed\n");
|
||||
}
|
||||
|
@ -253,7 +253,7 @@ static struct rpmsg_driver rpmsg_sample_client = {
|
|||
.id_table = rpmsg_driver_sample_id_table,
|
||||
.probe = rpmsg_sample_probe,
|
||||
.callback = rpmsg_sample_cb,
|
||||
.remove = __devexit_p(rpmsg_sample_remove),
|
||||
.remove = rpmsg_sample_remove,
|
||||
};
|
||||
|
||||
static int __init init(void)
|
||||
|
|
|
@ -345,7 +345,7 @@ SPI protocol drivers somewhat resemble platform device drivers:
|
|||
},
|
||||
|
||||
.probe = CHIP_probe,
|
||||
.remove = __devexit_p(CHIP_remove),
|
||||
.remove = CHIP_remove,
|
||||
.suspend = CHIP_suspend,
|
||||
.resume = CHIP_resume,
|
||||
};
|
||||
|
@ -355,7 +355,7 @@ device whose board_info gave a modalias of "CHIP". Your probe() code
|
|||
might look like this unless you're creating a device which is managing
|
||||
a bus (appearing under /sys/class/spi_master).
|
||||
|
||||
static int __devinit CHIP_probe(struct spi_device *spi)
|
||||
static int CHIP_probe(struct spi_device *spi)
|
||||
{
|
||||
struct CHIP *chip;
|
||||
struct CHIP_platform_data *pdata;
|
||||
|
|
|
@ -38,6 +38,7 @@ show up in /proc/sys/kernel:
|
|||
- l2cr [ PPC only ]
|
||||
- modprobe ==> Documentation/debugging-modules.txt
|
||||
- modules_disabled
|
||||
- msg_next_id [ sysv ipc ]
|
||||
- msgmax
|
||||
- msgmnb
|
||||
- msgmni
|
||||
|
@ -62,7 +63,9 @@ show up in /proc/sys/kernel:
|
|||
- rtsig-max
|
||||
- rtsig-nr
|
||||
- sem
|
||||
- sem_next_id [ sysv ipc ]
|
||||
- sg-big-buff [ generic SCSI device (sg) ]
|
||||
- shm_next_id [ sysv ipc ]
|
||||
- shm_rmid_forced
|
||||
- shmall
|
||||
- shmmax [ sysv ipc ]
|
||||
|
@ -320,6 +323,22 @@ to false.
|
|||
|
||||
==============================================================
|
||||
|
||||
msg_next_id, sem_next_id, and shm_next_id:
|
||||
|
||||
These three toggles allows to specify desired id for next allocated IPC
|
||||
object: message, semaphore or shared memory respectively.
|
||||
|
||||
By default they are equal to -1, which means generic allocation logic.
|
||||
Possible values to set are in range {0..INT_MAX}.
|
||||
|
||||
Notes:
|
||||
1) kernel doesn't guarantee, that new object will have desired id. So,
|
||||
it's up to userspace, how to handle an object with "wrong" id.
|
||||
2) Toggle with non-default value will be set back to -1 by kernel after
|
||||
successful IPC object allocation.
|
||||
|
||||
==============================================================
|
||||
|
||||
nmi_watchdog:
|
||||
|
||||
Enables/Disables the NMI watchdog on x86 systems. When the value is
|
||||
|
@ -542,6 +561,19 @@ are doing anyway :)
|
|||
|
||||
==============================================================
|
||||
|
||||
shmall:
|
||||
|
||||
This parameter sets the total amount of shared memory pages that
|
||||
can be used system wide. Hence, SHMALL should always be at least
|
||||
ceil(shmmax/PAGE_SIZE).
|
||||
|
||||
If you are not sure what the default PAGE_SIZE is on your Linux
|
||||
system, you can run the following command:
|
||||
|
||||
# getconf PAGE_SIZE
|
||||
|
||||
==============================================================
|
||||
|
||||
shmmax:
|
||||
|
||||
This value can be used to query and set the run time limit
|
||||
|
|
|
@ -174,8 +174,7 @@ The recommended approach is as follows:
|
|||
|
||||
static atomic_t drv_instance = ATOMIC_INIT(0);
|
||||
|
||||
static int __devinit drv_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *pci_id)
|
||||
static int drv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
|
||||
{
|
||||
...
|
||||
state->instance = atomic_inc_return(&drv_instance) - 1;
|
||||
|
|
|
@ -182,8 +182,7 @@ int iterate(void *p)
|
|||
|
||||
static atomic_t drv_instance = ATOMIC_INIT(0);
|
||||
|
||||
static int __devinit drv_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *pci_id)
|
||||
static int drv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
|
||||
{
|
||||
...
|
||||
state->instance = atomic_inc_return(&drv_instance) - 1;
|
||||
|
|
249
MAINTAINERS
249
MAINTAINERS
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Terrified Chipmunk
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -9,8 +9,8 @@
|
|||
#ifndef _ASM_AXP_PARPORT_H
|
||||
#define _ASM_AXP_PARPORT_H 1
|
||||
|
||||
static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
|
||||
static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
|
||||
static int parport_pc_find_isa_ports (int autoirq, int autodma);
|
||||
static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
|
||||
{
|
||||
return parport_pc_find_isa_ports (autoirq, autodma);
|
||||
}
|
||||
|
|
|
@ -59,13 +59,13 @@ struct pci_controller *pci_isa_hose;
|
|||
* Quirks.
|
||||
*/
|
||||
|
||||
static void __devinit quirk_isa_bridge(struct pci_dev *dev)
|
||||
static void quirk_isa_bridge(struct pci_dev *dev)
|
||||
{
|
||||
dev->class = PCI_CLASS_BRIDGE_ISA << 8;
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge);
|
||||
|
||||
static void __devinit quirk_cypress(struct pci_dev *dev)
|
||||
static void quirk_cypress(struct pci_dev *dev)
|
||||
{
|
||||
/* The Notorious Cy82C693 chip. */
|
||||
|
||||
|
@ -104,7 +104,7 @@ static void __devinit quirk_cypress(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress);
|
||||
|
||||
/* Called for each device after PCI setup is done. */
|
||||
static void __devinit pcibios_fixup_final(struct pci_dev *dev)
|
||||
static void pcibios_fixup_final(struct pci_dev *dev)
|
||||
{
|
||||
unsigned int class = dev->class >> 8;
|
||||
|
||||
|
@ -198,8 +198,7 @@ subsys_initcall(pcibios_init);
|
|||
#ifdef ALPHA_RESTORE_SRM_SETUP
|
||||
static struct pdev_srm_saved_conf *srm_saved_configs;
|
||||
|
||||
void __devinit
|
||||
pdev_save_srm_config(struct pci_dev *dev)
|
||||
void pdev_save_srm_config(struct pci_dev *dev)
|
||||
{
|
||||
struct pdev_srm_saved_conf *tmp;
|
||||
static int printed = 0;
|
||||
|
@ -241,8 +240,7 @@ pci_restore_srm_config(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
void __devinit
|
||||
pcibios_fixup_bus(struct pci_bus *bus)
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
|
|
|
@ -68,7 +68,7 @@ enum ipi_message_type {
|
|||
};
|
||||
|
||||
/* Set to a secondary's cpuid when it comes online. */
|
||||
static int smp_secondary_alive __devinitdata = 0;
|
||||
static int smp_secondary_alive = 0;
|
||||
|
||||
int smp_num_probed; /* Internal processor count */
|
||||
int smp_num_cpus = 1; /* Number that came online. */
|
||||
|
@ -172,7 +172,7 @@ smp_callin(void)
|
|||
}
|
||||
|
||||
/* Wait until hwrpb->txrdy is clear for cpu. Return -1 on timeout. */
|
||||
static int __devinit
|
||||
static int
|
||||
wait_for_txrdy (unsigned long cpumask)
|
||||
{
|
||||
unsigned long timeout;
|
||||
|
@ -468,7 +468,7 @@ smp_prepare_cpus(unsigned int max_cpus)
|
|||
smp_num_cpus = smp_num_probed;
|
||||
}
|
||||
|
||||
void __devinit
|
||||
void
|
||||
smp_prepare_boot_cpu(void)
|
||||
{
|
||||
}
|
||||
|
|
|
@ -303,7 +303,7 @@ titan_late_init(void)
|
|||
|
||||
}
|
||||
|
||||
static int __devinit
|
||||
static int
|
||||
titan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
u8 intline;
|
||||
|
|
|
@ -371,7 +371,6 @@ config ARCH_CNS3XXX
|
|||
config ARCH_CLPS711X
|
||||
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select AUTO_ZRELADDR
|
||||
select CLKDEV_LOOKUP
|
||||
select COMMON_CLK
|
||||
|
@ -1230,6 +1229,7 @@ config ARM_ERRATA_430973
|
|||
config ARM_ERRATA_458693
|
||||
bool "ARM errata: Processor deadlock when a false hazard is created"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 458693 Cortex-A8 (r2p0)
|
||||
erratum. For very specific sequences of memory operations, it is
|
||||
|
@ -1243,6 +1243,7 @@ config ARM_ERRATA_458693
|
|||
config ARM_ERRATA_460075
|
||||
bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 460075 Cortex-A8 (r2p0)
|
||||
erratum. Any asynchronous access to the L2 cache may encounter a
|
||||
|
@ -1255,6 +1256,7 @@ config ARM_ERRATA_460075
|
|||
config ARM_ERRATA_742230
|
||||
bool "ARM errata: DMB operation may be faulty"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 742230 Cortex-A9
|
||||
(r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
|
||||
|
@ -1267,6 +1269,7 @@ config ARM_ERRATA_742230
|
|||
config ARM_ERRATA_742231
|
||||
bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 742231 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under certain conditions, specific to the
|
||||
|
@ -1317,6 +1320,7 @@ config PL310_ERRATA_727915
|
|||
config ARM_ERRATA_743622
|
||||
bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 743622 Cortex-A9
|
||||
(r2p*) erratum. Under very rare conditions, a faulty
|
||||
|
@ -1330,6 +1334,7 @@ config ARM_ERRATA_743622
|
|||
config ARM_ERRATA_751472
|
||||
bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 751472 Cortex-A9 (prior
|
||||
to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
|
||||
|
|
|
@ -155,6 +155,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
|
|||
dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
|
||||
|
||||
targets += dtbs
|
||||
targets += $(dtb-y)
|
||||
endif
|
||||
|
||||
# *.dtb used to be generated in the directory above. Clean out the
|
||||
|
|
|
@ -50,17 +50,19 @@
|
|||
ranges;
|
||||
|
||||
serial@d0012000 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012000 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <41>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012100 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012100 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <42>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -34,7 +34,14 @@
|
|||
reg = <0>;
|
||||
clocks = <&cpuclk 0>;
|
||||
};
|
||||
}
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "marvell,sheeva-v7";
|
||||
reg = <1>;
|
||||
clocks = <&cpuclk 1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
pinctrl {
|
||||
|
|
|
@ -85,5 +85,13 @@
|
|||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -100,5 +100,13 @@
|
|||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -42,17 +42,19 @@
|
|||
|
||||
soc {
|
||||
serial@d0012200 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012200 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <43>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012300 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012300 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <44>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -93,14 +95,6 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@d0060900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0xd0060900 0x100
|
||||
|
|
|
@ -306,6 +306,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0 /* PB17 periph A */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x0 /* PB19 periph A */
|
||||
1 20 0x1 0x0 /* PB20 periph A */
|
||||
1 21 0x1 0x0>; /* PB21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -450,6 +466,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffbc000 0x4000>;
|
||||
interrupts = <14 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -271,6 +271,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0 /* PB1 periph B */
|
||||
1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 3 0x2 0x0 /* PB3 periph B */
|
||||
1 4 0x2 0x0 /* PB4 periph B */
|
||||
1 5 0x2 0x0>; /* PB5 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x0 /* PB6 periph A */
|
||||
1 7 0x1 0x0 /* PB7 periph A */
|
||||
1 8 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<1 9 0x1 0x0 /* PB9 periph A */
|
||||
1 10 0x1 0x0 /* PB10 periph A */
|
||||
1 11 0x1 0x0>; /* PB11 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -368,6 +400,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff98000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -375,6 +409,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -290,6 +290,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<3 0 0x1 0x0 /* PD0 periph A */
|
||||
3 1 0x1 0x0 /* PD1 periph A */
|
||||
3 2 0x1 0x0>; /* PD2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<3 3 0x1 0x0 /* PD3 periph A */
|
||||
3 4 0x1 0x0 /* PD4 periph A */
|
||||
3 5 0x1 0x0>; /* PD5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<3 10 0x1 0x0 /* PD10 periph A */
|
||||
3 11 0x1 0x0 /* PD11 periph A */
|
||||
3 12 0x1 0x0>; /* PD12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<3 13 0x1 0x0 /* PD13 periph A */
|
||||
3 14 0x1 0x0 /* PD14 periph A */
|
||||
3 15 0x1 0x0>; /* PD15 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -425,6 +457,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -432,6 +466,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfffa0000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
};
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
@ -244,6 +245,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -294,6 +311,15 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf801c000 0x4000>;
|
||||
|
|
|
@ -88,13 +88,6 @@
|
|||
interrupts = <1 4 7>;
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
|
@ -290,6 +283,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -333,6 +342,15 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
|
|
|
@ -170,7 +170,9 @@
|
|||
gpio-bank = <8>;
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
pinctrl@80157000 {
|
||||
// This is actually the PRCMU base address
|
||||
reg = <0x80157000 0x2000>;
|
||||
compatible = "stericsson,nmk_pinctrl";
|
||||
};
|
||||
|
||||
|
|
|
@ -117,6 +117,7 @@
|
|||
pinctrl: pinctrl@d0200 {
|
||||
compatible = "marvell,dove-pinctrl";
|
||||
reg = <0xd0200 0x10>;
|
||||
clocks = <&gate_clk 22>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -39,6 +40,7 @@
|
|||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -46,6 +48,7 @@
|
|||
|
||||
cpu@2 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -53,6 +56,7 @@
|
|||
|
||||
cpu@3 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
|
||||
};
|
||||
|
||||
sdhci@12530000 {
|
||||
|
|
|
@ -574,7 +574,7 @@
|
|||
|
||||
hdmi {
|
||||
compatible = "samsung,exynos5-hdmi";
|
||||
reg = <0x14530000 0x100000>;
|
||||
reg = <0x14530000 0x70000>;
|
||||
interrupts = <0 95 0>;
|
||||
};
|
||||
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc";
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc";
|
||||
};
|
||||
|
||||
spi {
|
||||
|
|
|
@ -30,33 +30,37 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu@900 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
device_type = "cpu";
|
||||
reg = <0x900>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
cpu@901 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
device_type = "cpu";
|
||||
reg = <0x901>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
cpu@902 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <2>;
|
||||
device_type = "cpu";
|
||||
reg = <0x902>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
cpu@903 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <3>;
|
||||
device_type = "cpu";
|
||||
reg = <0x903>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
|
|
@ -39,17 +39,17 @@
|
|||
hog_pins_a: hog@0 {
|
||||
reg = <0>;
|
||||
fsl,pinmux-ids = <
|
||||
0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
|
||||
0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
|
||||
>;
|
||||
fsl,drive-strength = <0>;
|
||||
fsl,voltage = <1>;
|
||||
fsl,pull-up = <0>;
|
||||
};
|
||||
|
||||
led_pin_gpio0_17: led_gpio0_17@0 {
|
||||
led_pin_gpio2_1: led_gpio2_1@0 {
|
||||
reg = <0>;
|
||||
fsl,pinmux-ids = <
|
||||
0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
|
||||
0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
|
||||
>;
|
||||
fsl,drive-strength = <0>;
|
||||
fsl,voltage = <1>;
|
||||
|
@ -110,7 +110,7 @@
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pin_gpio0_17>;
|
||||
pinctrl-0 = <&led_pin_gpio2_1>;
|
||||
|
||||
user {
|
||||
label = "green";
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
|
||||
/ {
|
||||
model = "Buglabs i.MX31 Bug 1.x";
|
||||
compatible = "fsl,imx31-bug", "fsl,imx31";
|
||||
compatible = "buglabs,imx31-bug", "fsl,imx31";
|
||||
|
||||
memory {
|
||||
reg = <0x80000000 0x8000000>; /* 128M */
|
||||
|
|
|
@ -492,7 +492,7 @@
|
|||
compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x53fcc000 0x4000>;
|
||||
interrupts = <83>;
|
||||
clocks = <&clks 158>, <&clks 157>;
|
||||
clocks = <&clks 87>, <&clks 86>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#size-cells = <0>;
|
||||
interrupts = <32>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&gate_clk 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -82,4 +82,21 @@
|
|||
gpios = <&gpio1 16 1>;
|
||||
};
|
||||
};
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sata0_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA0 Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 4 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -144,6 +144,7 @@
|
|||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <19>;
|
||||
clocks = <&gate_clk 3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -686,8 +686,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
|
|||
* %-EINVAL no platform data passed
|
||||
* %0 successful.
|
||||
*/
|
||||
static int __devinit
|
||||
__sa1111_probe(struct device *me, struct resource *mem, int irq)
|
||||
static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
|
||||
{
|
||||
struct sa1111_platform_data *pd = me->platform_data;
|
||||
struct sa1111 *sachip;
|
||||
|
@ -1011,7 +1010,7 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
#define sa1111_resume NULL
|
||||
#endif
|
||||
|
||||
static int __devinit sa1111_probe(struct platform_device *pdev)
|
||||
static int sa1111_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem;
|
||||
int irq;
|
||||
|
|
|
@ -176,7 +176,7 @@ static int scoop_resume(struct platform_device *dev)
|
|||
#define scoop_resume NULL
|
||||
#endif
|
||||
|
||||
static int __devinit scoop_probe(struct platform_device *pdev)
|
||||
static int scoop_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct scoop_dev *devptr;
|
||||
struct scoop_config *inf;
|
||||
|
@ -243,7 +243,7 @@ err_ioremap:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit scoop_remove(struct platform_device *pdev)
|
||||
static int scoop_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct scoop_dev *sdev = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
@ -268,7 +268,7 @@ static int __devexit scoop_remove(struct platform_device *pdev)
|
|||
|
||||
static struct platform_driver scoop_driver = {
|
||||
.probe = scoop_probe,
|
||||
.remove = __devexit_p(scoop_remove),
|
||||
.remove = scoop_remove,
|
||||
.suspend = scoop_suspend,
|
||||
.resume = scoop_resume,
|
||||
.driver = {
|
||||
|
|
|
@ -206,6 +206,7 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
|
|||
struct device_node *node)
|
||||
{
|
||||
struct vic_device *v;
|
||||
int i;
|
||||
|
||||
if (vic_id >= ARRAY_SIZE(vic_devices)) {
|
||||
printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
|
||||
|
@ -220,6 +221,10 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
|
|||
vic_id++;
|
||||
v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
|
||||
&vic_irqdomain_ops, v);
|
||||
/* create an IRQ mapping for each valid IRQ */
|
||||
for (i = 0; i < fls(valid_sources); i++)
|
||||
if (valid_sources & (1 << i))
|
||||
irq_create_mapping(v->domain, i);
|
||||
}
|
||||
|
||||
static void vic_ack_irq(struct irq_data *d)
|
||||
|
@ -416,9 +421,9 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
|
|||
return -EIO;
|
||||
|
||||
/*
|
||||
* Passing -1 as first IRQ makes the simple domain allocate descriptors
|
||||
* Passing 0 as first IRQ makes the simple domain allocate descriptors
|
||||
*/
|
||||
__vic_init(regs, -1, ~0, ~0, node);
|
||||
__vic_init(regs, 0, ~0, ~0, node);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -33,9 +33,7 @@ CONFIG_MVNETA=y
|
|||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
|
|
|
@ -78,7 +78,7 @@ void pcibios_report_status(u_int status_mask, int warn)
|
|||
* Bug 3 is responsible for the sound DMA grinding to a halt. We now
|
||||
* live with bug 2.
|
||||
*/
|
||||
static void __devinit pci_fixup_83c553(struct pci_dev *dev)
|
||||
static void pci_fixup_83c553(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Set memory region to start at address 0, and enable IO
|
||||
|
@ -130,7 +130,7 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553);
|
||||
|
||||
static void __devinit pci_fixup_unassign(struct pci_dev *dev)
|
||||
static void pci_fixup_unassign(struct pci_dev *dev)
|
||||
{
|
||||
dev->resource[0].end -= dev->resource[0].start;
|
||||
dev->resource[0].start = 0;
|
||||
|
@ -142,7 +142,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F,
|
|||
* if it is the host bridge by marking it as such. These resources are of
|
||||
* no consequence to the PCI layer (they are handled elsewhere).
|
||||
*/
|
||||
static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
|
||||
static void pci_fixup_dec21285(struct pci_dev *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -161,7 +161,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_d
|
|||
/*
|
||||
* PCI IDE controllers use non-standard I/O port decoding, respect it.
|
||||
*/
|
||||
static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
|
||||
static void pci_fixup_ide_bases(struct pci_dev *dev)
|
||||
{
|
||||
struct resource *r;
|
||||
int i;
|
||||
|
@ -182,7 +182,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
|
|||
/*
|
||||
* Put the DEC21142 to sleep
|
||||
*/
|
||||
static void __devinit pci_fixup_dec21142(struct pci_dev *dev)
|
||||
static void pci_fixup_dec21142(struct pci_dev *dev)
|
||||
{
|
||||
pci_write_config_dword(dev, 0x40, 0x80000000);
|
||||
}
|
||||
|
@ -204,7 +204,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_d
|
|||
* functional. However, The CY82C693U _does not work_ in bus
|
||||
* master mode without locking the PCI bus solid.
|
||||
*/
|
||||
static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
|
||||
static void pci_fixup_cy82c693(struct pci_dev *dev)
|
||||
{
|
||||
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
|
||||
u32 base0, base1;
|
||||
|
@ -254,7 +254,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
|
||||
|
||||
static void __devinit pci_fixup_it8152(struct pci_dev *dev)
|
||||
static void pci_fixup_it8152(struct pci_dev *dev)
|
||||
{
|
||||
int i;
|
||||
/* fixup for ITE 8152 devices */
|
||||
|
@ -361,9 +361,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
|
|||
printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
|
||||
bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
|
||||
}
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
EXPORT_SYMBOL(pcibios_fixup_bus);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Swizzle the device pin each time we cross a bridge. If a platform does
|
||||
|
@ -380,7 +378,7 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
|
|||
* PCI standard swizzle is implemented on plug-in cards and Cardbus based
|
||||
* PCI extenders, so it can not be ignored.
|
||||
*/
|
||||
static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
|
||||
static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
|
||||
{
|
||||
struct pci_sys_data *sys = dev->sysdata;
|
||||
int slot, oldpin = *pin;
|
||||
|
|
|
@ -339,7 +339,7 @@ static struct miscdevice etb_miscdev = {
|
|||
.fops = &etb_fops,
|
||||
};
|
||||
|
||||
static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
static int etb_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
{
|
||||
struct tracectx *t = &tracer;
|
||||
int ret = 0;
|
||||
|
@ -531,7 +531,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
|
|||
static struct kobj_attribute trace_mode_attr =
|
||||
__ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
|
||||
|
||||
static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
static int etm_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
{
|
||||
struct tracectx *t = &tracer;
|
||||
int ret = 0;
|
||||
|
|
|
@ -132,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
int cpu;
|
||||
for_each_possible_cpu(cpu) {
|
||||
|
@ -178,7 +178,7 @@ static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
|
|||
/*
|
||||
* PMU platform driver and devicetree bindings.
|
||||
*/
|
||||
static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
|
||||
static struct of_device_id cpu_pmu_of_device_ids[] = {
|
||||
{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
|
||||
{.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
|
||||
{.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
|
||||
|
@ -190,7 +190,7 @@ static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
|
|||
{},
|
||||
};
|
||||
|
||||
static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
|
||||
static struct platform_device_id cpu_pmu_plat_device_ids[] = {
|
||||
{.name = "arm-pmu"},
|
||||
{},
|
||||
};
|
||||
|
@ -198,7 +198,7 @@ static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
|
|||
/*
|
||||
* CPU PMU identification and probing.
|
||||
*/
|
||||
static int __devinit probe_current_pmu(struct arm_pmu *pmu)
|
||||
static int probe_current_pmu(struct arm_pmu *pmu)
|
||||
{
|
||||
int cpu = get_cpu();
|
||||
unsigned long cpuid = read_cpuid_id();
|
||||
|
@ -252,7 +252,7 @@ static int __devinit probe_current_pmu(struct arm_pmu *pmu)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devinit cpu_pmu_device_probe(struct platform_device *pdev)
|
||||
static int cpu_pmu_device_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *of_id;
|
||||
int (*init_fn)(struct arm_pmu *);
|
||||
|
|
|
@ -653,7 +653,7 @@ static int armv6_map_event(struct perf_event *event)
|
|||
&armv6_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit armv6pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv6pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "v6";
|
||||
cpu_pmu->handle_irq = armv6pmu_handle_irq;
|
||||
|
@ -685,7 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event)
|
|||
&armv6mpcore_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "v6mpcore";
|
||||
cpu_pmu->handle_irq = armv6pmu_handle_irq;
|
||||
|
|
|
@ -1226,7 +1226,7 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)
|
|||
cpu_pmu->max_period = (1LLU << 32) - 1;
|
||||
};
|
||||
|
||||
static u32 __devinit armv7_read_num_pmnc_events(void)
|
||||
static u32 armv7_read_num_pmnc_events(void)
|
||||
{
|
||||
u32 nb_cnt;
|
||||
|
||||
|
@ -1237,7 +1237,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void)
|
|||
return nb_cnt + 1;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A8";
|
||||
|
@ -1246,7 +1246,7 @@ static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A9";
|
||||
|
@ -1255,7 +1255,7 @@ static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A5";
|
||||
|
@ -1264,7 +1264,7 @@ static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A15";
|
||||
|
@ -1274,7 +1274,7 @@ static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A7";
|
||||
|
|
|
@ -440,7 +440,7 @@ static int xscale_map_event(struct perf_event *event)
|
|||
&xscale_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit xscale1pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int xscale1pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "xscale1";
|
||||
cpu_pmu->handle_irq = xscale1pmu_handle_irq;
|
||||
|
@ -810,7 +810,7 @@ static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val)
|
|||
}
|
||||
}
|
||||
|
||||
static int __devinit xscale2pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int xscale2pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "xscale2";
|
||||
cpu_pmu->handle_irq = xscale2pmu_handle_irq;
|
||||
|
|
|
@ -358,7 +358,7 @@ static int cpld_video_probe(struct i2c_client *client,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit cpld_video_remove(struct i2c_client *client)
|
||||
static int cpld_video_remove(struct i2c_client *client)
|
||||
{
|
||||
cpld_client = NULL;
|
||||
return 0;
|
||||
|
|
|
@ -256,7 +256,7 @@ static int cdce_probe(struct i2c_client *client,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit cdce_remove(struct i2c_client *client)
|
||||
static int cdce_remove(struct i2c_client *client)
|
||||
{
|
||||
cdce_i2c_client = NULL;
|
||||
return 0;
|
||||
|
@ -274,7 +274,7 @@ static struct i2c_driver cdce_driver = {
|
|||
.name = "cdce949",
|
||||
},
|
||||
.probe = cdce_probe,
|
||||
.remove = __devexit_p(cdce_remove),
|
||||
.remove = cdce_remove,
|
||||
.id_table = cdce_id,
|
||||
};
|
||||
|
||||
|
|
|
@ -135,7 +135,7 @@ static struct pci_ops pcie_ops = {
|
|||
.write = pcie_wr_conf,
|
||||
};
|
||||
|
||||
static void __devinit rc_pci_fixup(struct pci_dev *dev)
|
||||
static void rc_pci_fixup(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Prevent enumeration of root complex.
|
||||
|
|
|
@ -74,6 +74,8 @@ config SOC_EXYNOS5440
|
|||
depends on ARCH_EXYNOS5
|
||||
select ARM_ARCH_TIMER
|
||||
select AUTO_ZRELADDR
|
||||
select PINCTRL
|
||||
select PINCTRL_EXYNOS5440
|
||||
help
|
||||
Enable EXYNOS5440 SoC support
|
||||
|
||||
|
|
|
@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal)
|
|||
{
|
||||
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
|
||||
|
||||
/* EXYNOS5440 can support only common clock framework */
|
||||
|
||||
if (soc_is_exynos5440())
|
||||
return;
|
||||
|
||||
#ifdef CONFIG_SOC_EXYNOS5250
|
||||
s3c24xx_register_baseclocks(xtal);
|
||||
s5p_register_clocks(xtal);
|
||||
|
||||
exynos5_register_clocks();
|
||||
exynos5_setup_clocks();
|
||||
#endif
|
||||
}
|
||||
|
||||
#define COMBINER_ENABLE_SET 0x0
|
||||
|
|
|
@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
|
|||
|
||||
static void highbank_power_off(void)
|
||||
{
|
||||
hignbank_set_pwr_shutdown();
|
||||
highbank_set_pwr_shutdown();
|
||||
|
||||
while (1)
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
|
|||
{
|
||||
flush_cache_all();
|
||||
|
||||
highbank_set_cpu_jump(cpu, secondary_startup);
|
||||
highbank_set_cpu_jump(cpu, phys_to_virt(0));
|
||||
highbank_set_core_pwr();
|
||||
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
|
|||
|
||||
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
highbank_set_cpu_jump(cpu, secondary_startup);
|
||||
gic_raise_softirq(cpumask_of(cpu), 0);
|
||||
return 0;
|
||||
}
|
||||
|
@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
|
|||
|
||||
static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (scu_base_addr)
|
||||
scu_enable(scu_base_addr);
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup into the jump table
|
||||
* The cores are in wfi and wait until they receive a soft interrupt
|
||||
* and a non-zero value to jump to. Then the secondary CPU branches
|
||||
* to this address.
|
||||
*/
|
||||
for (i = 1; i < max_cpus; i++)
|
||||
highbank_set_cpu_jump(i, secondary_startup);
|
||||
}
|
||||
|
||||
struct smp_operations highbank_smp_ops __initdata = {
|
||||
|
|
|
@ -14,10 +14,12 @@
|
|||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/cpu_pm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/suspend.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/suspend.h>
|
||||
|
||||
|
@ -26,16 +28,31 @@
|
|||
|
||||
static int highbank_suspend_finish(unsigned long val)
|
||||
{
|
||||
outer_flush_all();
|
||||
outer_disable();
|
||||
|
||||
highbank_set_pwr_suspend();
|
||||
|
||||
cpu_do_idle();
|
||||
|
||||
highbank_clear_pwr_request();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int highbank_pm_enter(suspend_state_t state)
|
||||
{
|
||||
hignbank_set_pwr_suspend();
|
||||
cpu_pm_enter();
|
||||
cpu_cluster_pm_enter();
|
||||
|
||||
highbank_set_cpu_jump(0, cpu_resume);
|
||||
cpu_suspend(0, highbank_suspend_finish);
|
||||
|
||||
cpu_cluster_pm_exit();
|
||||
cpu_pm_exit();
|
||||
|
||||
highbank_smc1(0x102, 0x1);
|
||||
if (scu_base_addr)
|
||||
scu_enable(scu_base_addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
|
|||
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_suspend(void)
|
||||
static inline void highbank_clear_core_pwr(void)
|
||||
{
|
||||
int cpu = cpu_logical_map(smp_processor_id());
|
||||
if (scu_base_addr)
|
||||
scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
|
||||
else
|
||||
writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
|
||||
}
|
||||
|
||||
static inline void highbank_set_pwr_suspend(void)
|
||||
{
|
||||
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_shutdown(void)
|
||||
static inline void highbank_set_pwr_shutdown(void)
|
||||
{
|
||||
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_soft_reset(void)
|
||||
static inline void highbank_set_pwr_soft_reset(void)
|
||||
{
|
||||
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_hard_reset(void)
|
||||
static inline void highbank_set_pwr_hard_reset(void)
|
||||
{
|
||||
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void highbank_clear_pwr_request(void)
|
||||
{
|
||||
writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_clear_core_pwr();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -22,9 +22,9 @@
|
|||
void highbank_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 'h')
|
||||
hignbank_set_pwr_hard_reset();
|
||||
highbank_set_pwr_hard_reset();
|
||||
else
|
||||
hignbank_set_pwr_soft_reset();
|
||||
highbank_set_pwr_soft_reset();
|
||||
|
||||
while (1)
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -841,8 +841,6 @@ config SOC_IMX6Q
|
|||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_ERRATA_743622
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select ARM_ERRATA_775420
|
||||
|
|
|
@ -254,9 +254,9 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
|
||||
/* i.mx25 has the i.mx35 type cspi */
|
||||
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
|
||||
|
|
|
@ -236,9 +236,9 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.0");
|
||||
|
|
|
@ -139,9 +139,9 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
/* i.mx31 has the i.mx21 type uart */
|
||||
clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
|
||||
|
|
|
@ -251,9 +251,9 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
|
|
|
@ -269,9 +269,9 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
|
|
|
@ -188,7 +188,7 @@ static struct cpufreq_driver mxc_driver = {
|
|||
.name = "imx",
|
||||
};
|
||||
|
||||
static int __devinit mxc_cpufreq_driver_init(void)
|
||||
static int mxc_cpufreq_driver_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&mxc_driver);
|
||||
}
|
||||
|
|
|
@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
|
|||
|
||||
#include <linux/fsl_devices.h>
|
||||
struct imx_fsl_usb2_udc_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t irq;
|
||||
};
|
||||
|
|
|
@ -11,35 +11,36 @@
|
|||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc) \
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _USB_OTG_BASE_ADDR, \
|
||||
.irq = soc ## _INT_USB_OTG, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX51
|
||||
const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51, "imx-udc-mx51");
|
||||
#endif
|
||||
|
||||
struct platform_device *__init imx_add_fsl_usb2_udc(
|
||||
|
@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
|
||||
return imx_add_platform_device_dmamask(data->devid, -1,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
#define BP_MMDC_MAPSR_PSD 0
|
||||
#define BP_MMDC_MAPSR_PSS 4
|
||||
|
||||
static int __devinit imx_mmdc_probe(struct platform_device *pdev)
|
||||
static int imx_mmdc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
void __iomem *mmdc_base, *reg;
|
||||
|
|
|
@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
|||
|
||||
/* Scan an IOP13XX PCI bus. nr selects which ATU we use.
|
||||
*/
|
||||
struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
int which_atu;
|
||||
struct pci_bus *bus = NULL;
|
||||
|
|
|
@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void)
|
|||
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
clkspec.args[0] = CGC_BIT_SDIO;
|
||||
orion_clkdev_add(NULL, "mvsdio",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
}
|
||||
|
||||
static void __init kirkwood_of_clk_init(void)
|
||||
|
|
|
@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = {
|
|||
0
|
||||
};
|
||||
|
||||
#define TOPKICK_SATA0_PWR_ENABLE 36
|
||||
|
||||
void __init usi_topkick_init(void)
|
||||
{
|
||||
/*
|
||||
|
@ -73,8 +71,6 @@ void __init usi_topkick_init(void)
|
|||
*/
|
||||
kirkwood_mpp_conf(topkick_mpp_config);
|
||||
|
||||
/* SATA0 power enable */
|
||||
gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
|
||||
|
||||
kirkwood_ge00_init(&topkick_ge00_data);
|
||||
kirkwood_sdio_init(&topkick_mvsdio_data);
|
||||
|
|
|
@ -214,7 +214,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
|
||||
* the device. Decoding setup is handled by the orion code.
|
||||
*/
|
||||
static void __devinit rc_pci_fixup(struct pci_dev *dev)
|
||||
static void rc_pci_fixup(struct pci_dev *dev)
|
||||
{
|
||||
if (dev->bus->parent == NULL && dev->devfn == 0) {
|
||||
int i;
|
||||
|
|
|
@ -92,7 +92,7 @@ static struct i2c_board_info acs5k_i2c_devs[] __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static void __devinit acs5k_i2c_init(void)
|
||||
static void acs5k_i2c_init(void)
|
||||
{
|
||||
/* The gpio interface */
|
||||
platform_device_register(&acs5k_i2c_device);
|
||||
|
|
|
@ -61,7 +61,7 @@ struct gen_pool *sram_get_gpool(char *pool_name)
|
|||
}
|
||||
EXPORT_SYMBOL(sram_get_gpool);
|
||||
|
||||
static int __devinit sram_probe(struct platform_device *pdev)
|
||||
static int sram_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sram_platdata *pdata = pdev->dev.platform_data;
|
||||
struct sram_bank_info *info;
|
||||
|
@ -125,7 +125,7 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit sram_remove(struct platform_device *pdev)
|
||||
static int sram_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sram_bank_info *info;
|
||||
|
||||
|
|
|
@ -120,7 +120,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
|
|||
* and unknown state. This function should be called early to
|
||||
* wait on the ARM9.
|
||||
*/
|
||||
void __devinit proc_comm_boot_wait(void)
|
||||
void proc_comm_boot_wait(void)
|
||||
{
|
||||
void __iomem *base = MSM_SHARED_RAM_BASE;
|
||||
|
||||
|
|
|
@ -988,7 +988,7 @@ int smd_core_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit msm_smd_probe(struct platform_device *pdev)
|
||||
static int msm_smd_probe(struct platform_device *pdev)
|
||||
{
|
||||
/*
|
||||
* If we haven't waited for the ARM9 to boot up till now,
|
||||
|
|
|
@ -173,7 +173,7 @@ static struct pci_ops pcie_ops = {
|
|||
.write = pcie_wr_conf,
|
||||
};
|
||||
|
||||
static void __devinit rc_pci_fixup(struct pci_dev *dev)
|
||||
static void rc_pci_fixup(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Prevent enumeration of root complex.
|
||||
|
|
|
@ -27,7 +27,6 @@
|
|||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/platform_data/pinctrl-nomadik.h>
|
||||
#include <linux/platform_data/clocksource-nomadik-mtu.h>
|
||||
#include <linux/platform_data/mtd-nomadik-nand.h>
|
||||
#include <asm/hardware/vic.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
|
|
@ -22,49 +22,49 @@
|
|||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */
|
||||
#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
|
||||
|
||||
/*
|
||||
* Interrupt numbers generic for all Nomadik Chip cuts
|
||||
*/
|
||||
#define IRQ_WATCHDOG 1
|
||||
#define IRQ_SOFTINT 2
|
||||
#define IRQ_CRYPTO 3
|
||||
#define IRQ_OWM 4
|
||||
#define IRQ_MTU0 5
|
||||
#define IRQ_MTU1 6
|
||||
#define IRQ_GPIO0 7
|
||||
#define IRQ_GPIO1 8
|
||||
#define IRQ_GPIO2 9
|
||||
#define IRQ_GPIO3 10
|
||||
#define IRQ_RTC_RTT 11
|
||||
#define IRQ_SSP 12
|
||||
#define IRQ_UART0 13
|
||||
#define IRQ_DMA1 14
|
||||
#define IRQ_CLCD_MDIF 15
|
||||
#define IRQ_DMA0 16
|
||||
#define IRQ_PWRFAIL 17
|
||||
#define IRQ_UART1 18
|
||||
#define IRQ_FIRDA 19
|
||||
#define IRQ_MSP0 20
|
||||
#define IRQ_I2C0 21
|
||||
#define IRQ_I2C1 22
|
||||
#define IRQ_SDMMC 23
|
||||
#define IRQ_USBOTG 24
|
||||
#define IRQ_SVA_IT0 25
|
||||
#define IRQ_SVA_IT1 26
|
||||
#define IRQ_SAA_IT0 27
|
||||
#define IRQ_SAA_IT1 28
|
||||
#define IRQ_UART2 29
|
||||
#define IRQ_MSP2 30
|
||||
#define IRQ_L2CC 49
|
||||
#define IRQ_HPI 50
|
||||
#define IRQ_SKE 51
|
||||
#define IRQ_KP 52
|
||||
#define IRQ_MEMST 55
|
||||
#define IRQ_SGA_IT 59
|
||||
#define IRQ_USBM 61
|
||||
#define IRQ_MSP1 63
|
||||
#define IRQ_WATCHDOG (IRQ_VIC_START+0)
|
||||
#define IRQ_SOFTINT (IRQ_VIC_START+1)
|
||||
#define IRQ_CRYPTO (IRQ_VIC_START+2)
|
||||
#define IRQ_OWM (IRQ_VIC_START+3)
|
||||
#define IRQ_MTU0 (IRQ_VIC_START+4)
|
||||
#define IRQ_MTU1 (IRQ_VIC_START+5)
|
||||
#define IRQ_GPIO0 (IRQ_VIC_START+6)
|
||||
#define IRQ_GPIO1 (IRQ_VIC_START+7)
|
||||
#define IRQ_GPIO2 (IRQ_VIC_START+8)
|
||||
#define IRQ_GPIO3 (IRQ_VIC_START+9)
|
||||
#define IRQ_RTC_RTT (IRQ_VIC_START+10)
|
||||
#define IRQ_SSP (IRQ_VIC_START+11)
|
||||
#define IRQ_UART0 (IRQ_VIC_START+12)
|
||||
#define IRQ_DMA1 (IRQ_VIC_START+13)
|
||||
#define IRQ_CLCD_MDIF (IRQ_VIC_START+14)
|
||||
#define IRQ_DMA0 (IRQ_VIC_START+15)
|
||||
#define IRQ_PWRFAIL (IRQ_VIC_START+16)
|
||||
#define IRQ_UART1 (IRQ_VIC_START+17)
|
||||
#define IRQ_FIRDA (IRQ_VIC_START+18)
|
||||
#define IRQ_MSP0 (IRQ_VIC_START+19)
|
||||
#define IRQ_I2C0 (IRQ_VIC_START+20)
|
||||
#define IRQ_I2C1 (IRQ_VIC_START+21)
|
||||
#define IRQ_SDMMC (IRQ_VIC_START+22)
|
||||
#define IRQ_USBOTG (IRQ_VIC_START+23)
|
||||
#define IRQ_SVA_IT0 (IRQ_VIC_START+24)
|
||||
#define IRQ_SVA_IT1 (IRQ_VIC_START+25)
|
||||
#define IRQ_SAA_IT0 (IRQ_VIC_START+26)
|
||||
#define IRQ_SAA_IT1 (IRQ_VIC_START+27)
|
||||
#define IRQ_UART2 (IRQ_VIC_START+28)
|
||||
#define IRQ_MSP2 (IRQ_VIC_START+29)
|
||||
#define IRQ_L2CC (IRQ_VIC_START+30)
|
||||
#define IRQ_HPI (IRQ_VIC_START+31)
|
||||
#define IRQ_SKE (IRQ_VIC_START+32)
|
||||
#define IRQ_KP (IRQ_VIC_START+33)
|
||||
#define IRQ_MEMST (IRQ_VIC_START+34)
|
||||
#define IRQ_SGA_IT (IRQ_VIC_START+35)
|
||||
#define IRQ_USBM (IRQ_VIC_START+36)
|
||||
#define IRQ_MSP1 (IRQ_VIC_START+37)
|
||||
|
||||
#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64)
|
||||
|
||||
|
|
|
@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
|
|||
.ctrl_name = "internal",
|
||||
};
|
||||
|
||||
static struct omap_usb_config ams_delta_usb_config = {
|
||||
static struct omap_usb_config ams_delta_usb_config __initdata = {
|
||||
.register_host = 1,
|
||||
.hmc_mode = 16,
|
||||
.pins[0] = 2,
|
||||
|
|
|
@ -142,7 +142,7 @@ static struct omap_mbox mbox_dsp_info = {
|
|||
|
||||
static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL };
|
||||
|
||||
static int __devinit omap1_mbox_probe(struct platform_device *pdev)
|
||||
static int omap1_mbox_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem;
|
||||
int ret;
|
||||
|
@ -165,7 +165,7 @@ static int __devinit omap1_mbox_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit omap1_mbox_remove(struct platform_device *pdev)
|
||||
static int omap1_mbox_remove(struct platform_device *pdev)
|
||||
{
|
||||
omap_mbox_unregister();
|
||||
iounmap(mbox_base);
|
||||
|
@ -174,7 +174,7 @@ static int __devexit omap1_mbox_remove(struct platform_device *pdev)
|
|||
|
||||
static struct platform_driver omap1_mbox_driver = {
|
||||
.probe = omap1_mbox_probe,
|
||||
.remove = __devexit_p(omap1_mbox_remove),
|
||||
.remove = omap1_mbox_remove,
|
||||
.driver = {
|
||||
.name = "omap-mailbox",
|
||||
},
|
||||
|
|
|
@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
|||
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
|
||||
#endif
|
||||
|
||||
void __init omap1_usb_init(struct omap_usb_config *pdata)
|
||||
void __init omap1_usb_init(struct omap_usb_config *_pdata)
|
||||
{
|
||||
struct omap_usb_config *pdata;
|
||||
|
||||
pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
|
||||
if (!pdata)
|
||||
return;
|
||||
|
||||
pdata->usb0_init = omap1_usb0_init;
|
||||
pdata->usb1_init = omap1_usb1_init;
|
||||
pdata->usb2_init = omap1_usb2_init;
|
||||
|
|
|
@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
|
|||
.recalc_rate = &omap2_clksel_recalc,
|
||||
.get_parent = &omap2_clksel_find_parent_index,
|
||||
.set_parent = &omap2_clksel_set_parent,
|
||||
.enable = &omap2_clkops_enable_clkdm,
|
||||
.disable = &omap2_clkops_disable_clkdm,
|
||||
};
|
||||
|
||||
static struct clk emu_src_ck;
|
||||
|
|
|
@ -744,7 +744,7 @@ static int gpmc_setup_irq(void)
|
|||
return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
|
||||
}
|
||||
|
||||
static __devexit int gpmc_free_irq(void)
|
||||
static int gpmc_free_irq(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -762,7 +762,7 @@ static __devexit int gpmc_free_irq(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __devexit gpmc_mem_exit(void)
|
||||
static void gpmc_mem_exit(void)
|
||||
{
|
||||
int cs;
|
||||
|
||||
|
@ -774,7 +774,7 @@ static void __devexit gpmc_mem_exit(void)
|
|||
|
||||
}
|
||||
|
||||
static int __devinit gpmc_mem_init(void)
|
||||
static int gpmc_mem_init(void)
|
||||
{
|
||||
int cs, rc;
|
||||
unsigned long boot_rom_space = 0;
|
||||
|
@ -1121,7 +1121,7 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static __devinit int gpmc_probe(struct platform_device *pdev)
|
||||
static int gpmc_probe(struct platform_device *pdev)
|
||||
{
|
||||
int rc;
|
||||
u32 l;
|
||||
|
@ -1177,7 +1177,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static __devexit int gpmc_remove(struct platform_device *pdev)
|
||||
static int gpmc_remove(struct platform_device *pdev)
|
||||
{
|
||||
gpmc_free_irq();
|
||||
gpmc_mem_exit();
|
||||
|
@ -1187,7 +1187,7 @@ static __devexit int gpmc_remove(struct platform_device *pdev)
|
|||
|
||||
static struct platform_driver gpmc_driver = {
|
||||
.probe = gpmc_probe,
|
||||
.remove = __devexit_p(gpmc_remove),
|
||||
.remove = gpmc_remove,
|
||||
.driver = {
|
||||
.name = DEVICE_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
|
|
|
@ -342,7 +342,7 @@ struct omap_mbox mbox_2_info = {
|
|||
struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL };
|
||||
#endif
|
||||
|
||||
static int __devinit omap2_mbox_probe(struct platform_device *pdev)
|
||||
static int omap2_mbox_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem;
|
||||
int ret;
|
||||
|
@ -395,7 +395,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit omap2_mbox_remove(struct platform_device *pdev)
|
||||
static int omap2_mbox_remove(struct platform_device *pdev)
|
||||
{
|
||||
omap_mbox_unregister();
|
||||
iounmap(mbox_base);
|
||||
|
@ -404,7 +404,7 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev)
|
|||
|
||||
static struct platform_driver omap2_mbox_driver = {
|
||||
.probe = omap2_mbox_probe,
|
||||
.remove = __devexit_p(omap2_mbox_remove),
|
||||
.remove = omap2_mbox_remove,
|
||||
.driver = {
|
||||
.name = "omap-mailbox",
|
||||
},
|
||||
|
|
|
@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
|
|||
{ .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
|
||||
{ .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
|
||||
{ .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
|
||||
{ .irq = -1 + OMAP_INTC_START, },
|
||||
{ .irq = -1, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod am33xx_usbss_hwmod = {
|
||||
|
@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
|
|||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
|
||||
static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x4A101000,
|
||||
.pa_end = 0x4A101000 + SZ_256 - 1,
|
||||
|
@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
|
|||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
|
||||
static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
|
||||
.master = &am33xx_cpgmac0_hwmod,
|
||||
.slave = &am33xx_mdio_hwmod,
|
||||
.addr = am33xx_mdio_addr_space,
|
||||
|
|
|
@ -27,6 +27,14 @@
|
|||
#include "cm2xxx_3xxx.h"
|
||||
#include "prm-regbits-24xx.h"
|
||||
|
||||
/*
|
||||
* OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
|
||||
* these are reversed from the bits used on OMAP3+
|
||||
*/
|
||||
#define OMAP24XX_PWRDM_POWER_ON 0x0
|
||||
#define OMAP24XX_PWRDM_POWER_RET 0x1
|
||||
#define OMAP24XX_PWRDM_POWER_OFF 0x3
|
||||
|
||||
/*
|
||||
* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
|
||||
* hardware register (which are specific to the OMAP2xxx SoCs) to
|
||||
|
@ -67,6 +75,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
|
|||
return r;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
|
||||
* @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
|
||||
*
|
||||
* Return the common power state bits corresponding to the OMAP2xxx
|
||||
* hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
|
||||
*/
|
||||
static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
|
||||
{
|
||||
u8 pwrst;
|
||||
|
||||
switch (omap2xxx_pwrst) {
|
||||
case OMAP24XX_PWRDM_POWER_OFF:
|
||||
pwrst = PWRDM_POWER_OFF;
|
||||
break;
|
||||
case OMAP24XX_PWRDM_POWER_RET:
|
||||
pwrst = PWRDM_POWER_RET;
|
||||
break;
|
||||
case OMAP24XX_PWRDM_POWER_ON:
|
||||
pwrst = PWRDM_POWER_ON;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return pwrst;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
|
||||
*
|
||||
|
@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
||||
{
|
||||
u8 omap24xx_pwrst;
|
||||
|
||||
switch (pwrst) {
|
||||
case PWRDM_POWER_OFF:
|
||||
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
|
||||
break;
|
||||
case PWRDM_POWER_RET:
|
||||
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
|
||||
break;
|
||||
case PWRDM_POWER_ON:
|
||||
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
|
||||
(omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
|
||||
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
u8 omap2xxx_pwrst;
|
||||
|
||||
omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
||||
OMAP2_PM_PWSTCTRL,
|
||||
OMAP_POWERSTATE_MASK);
|
||||
|
||||
return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
|
||||
}
|
||||
|
||||
static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
u8 omap2xxx_pwrst;
|
||||
|
||||
omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
||||
OMAP2_PM_PWSTST,
|
||||
OMAP_POWERSTATEST_MASK);
|
||||
|
||||
return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
|
||||
}
|
||||
|
||||
struct pwrdm_ops omap2_pwrdm_operations = {
|
||||
.pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
|
||||
.pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
|
||||
.pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
|
||||
.pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
|
||||
.pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
|
||||
.pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
|
||||
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
|
||||
.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
|
||||
.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
|
||||
|
|
|
@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
|
|||
/* Powerdomain low-level functions */
|
||||
|
||||
/* Common functions across OMAP2 and OMAP3 */
|
||||
int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
||||
{
|
||||
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
|
||||
(pwrst << OMAP_POWERSTATE_SHIFT),
|
||||
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
||||
OMAP2_PM_PWSTCTRL,
|
||||
OMAP_POWERSTATE_MASK);
|
||||
}
|
||||
|
||||
int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
||||
OMAP2_PM_PWSTST,
|
||||
OMAP_POWERSTATEST_MASK);
|
||||
}
|
||||
|
||||
int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
|
||||
u8 pwrst)
|
||||
{
|
||||
|
|
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