ARM: memset: clean up unwind annotations
The memset implementation carves up the code in different sections, each covered with their own unwind info. In this case, it is done in a way similar to how the compiler might do it, to disambiguate between parts where the return address is in LR and the SP is unmodified, and parts where a stack frame is live, and the unwinder needs to know the size of the stack frame and the location of the return address within it. Only the placement of the unwind directives is slightly odd: the stack pushes are placed in the wrong sections, which may confuse the unwinder when attempting to unwind with PC pointing at the stack push in question. So let's fix this up, by reordering the directives and instructions as appropriate. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Keith Packard <keithpac@amazon.com> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
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@ -28,16 +28,16 @@ UNWIND( .fnstart )
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mov r3, r1
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7: cmp r2, #16
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blt 4f
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UNWIND( .fnend )
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#if ! CALGN(1)+0
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/*
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* We need 2 extra registers for this loop - use r8 and the LR
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*/
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stmfd sp!, {r8, lr}
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UNWIND( .fnend )
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UNWIND( .fnstart )
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UNWIND( .save {r8, lr} )
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stmfd sp!, {r8, lr}
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mov r8, r1
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mov lr, r3
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@ -66,10 +66,9 @@ UNWIND( .fnend )
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* whole cache lines at once.
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*/
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stmfd sp!, {r4-r8, lr}
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UNWIND( .fnend )
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UNWIND( .fnstart )
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UNWIND( .save {r4-r8, lr} )
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stmfd sp!, {r4-r8, lr}
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mov r4, r1
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mov r5, r3
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mov r6, r1
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