ASoC: Davinci: Fix FS polarity for I2S format

Commit 75d9ac4 ("ASoC: Allow DAI formats to be specified in the dai_link")
changed DAI format flag values and we cannot simply invert anymore e.g.
frame-sync with ^= SND_SOC_DAIFMT_NB_IF (which was anyway misuse) as there
is no anymore fixed bit position for bit-clock or frame-sync inversion.

Fix this by relying only on DAI format flag values passed to us and by not
making any assumption on individual bit positions

Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Cc: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Jarkko Nikula 2011-09-30 10:55:33 +03:00 коммит произвёл Mark Brown
Родитель 00e982a6a3
Коммит ad51f76544
1 изменённых файлов: 4 добавлений и 1 удалений

Просмотреть файл

@ -265,6 +265,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
unsigned int pcr; unsigned int pcr;
unsigned int srgr; unsigned int srgr;
bool inv_fs = false;
/* Attention srgr is updated by hw_params! */ /* Attention srgr is updated by hw_params! */
srgr = DAVINCI_MCBSP_SRGR_FSGM | srgr = DAVINCI_MCBSP_SRGR_FSGM |
DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) | DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
@ -330,7 +331,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
* more empty bit clock slots between channels as the sample * more empty bit clock slots between channels as the sample
* rate is lowered. * rate is lowered.
*/ */
fmt ^= SND_SOC_DAIFMT_NB_IF; inv_fs = true;
case SND_SOC_DAIFMT_DSP_A: case SND_SOC_DAIFMT_DSP_A:
dev->mode = MOD_DSP_A; dev->mode = MOD_DSP_A;
break; break;
@ -394,6 +395,8 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
default: default:
return -EINVAL; return -EINVAL;
} }
if (inv_fs == true)
pcr ^= (DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr); davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
dev->pcr = pcr; dev->pcr = pcr;
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, pcr); davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, pcr);