staging:iio: Use spi_sync_transfer()
Use the new spi_sync_transfer() helper function instead of open-coding it. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Родитель
14543a00fc
Коммит
ad6c46b0c7
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@ -53,7 +53,6 @@ int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev,
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u8 reg_address, u8 *val)
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{
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struct lis3l02dq_state *st = iio_priv(indio_dev);
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struct spi_message msg;
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int ret;
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struct spi_transfer xfer = {
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.tx_buf = st->tx,
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@ -66,9 +65,7 @@ int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev,
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st->tx[0] = LIS3L02DQ_READ_REG(reg_address);
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st->tx[1] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, &xfer, 1);
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*val = st->rx[1];
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mutex_unlock(&st->buf_lock);
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@ -109,7 +106,6 @@ static int lis3l02dq_spi_write_reg_s16(struct iio_dev *indio_dev,
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s16 value)
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{
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int ret;
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struct spi_message msg;
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struct lis3l02dq_state *st = iio_priv(indio_dev);
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struct spi_transfer xfers[] = { {
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.tx_buf = st->tx,
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@ -129,10 +125,7 @@ static int lis3l02dq_spi_write_reg_s16(struct iio_dev *indio_dev,
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st->tx[2] = LIS3L02DQ_WRITE_REG(lower_reg_address + 1);
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st->tx[3] = (value >> 8) & 0xFF;
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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mutex_unlock(&st->buf_lock);
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return ret;
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@ -143,8 +136,6 @@ static int lis3l02dq_read_reg_s16(struct iio_dev *indio_dev,
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int *val)
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{
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struct lis3l02dq_state *st = iio_priv(indio_dev);
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struct spi_message msg;
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int ret;
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s16 tempval;
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struct spi_transfer xfers[] = { {
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@ -167,10 +158,7 @@ static int lis3l02dq_read_reg_s16(struct iio_dev *indio_dev,
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st->tx[2] = LIS3L02DQ_READ_REG(lower_reg_address + 1);
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st->tx[3] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 16 bit register");
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goto error_ret;
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@ -90,7 +90,6 @@ int sca3000_read_data_short(struct sca3000_state *st,
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uint8_t reg_address_high,
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int len)
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{
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struct spi_message msg;
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struct spi_transfer xfer[2] = {
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{
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.len = 1,
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@ -101,11 +100,8 @@ int sca3000_read_data_short(struct sca3000_state *st,
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}
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};
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st->tx[0] = SCA3000_READ_REG(reg_address_high);
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spi_message_init(&msg);
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spi_message_add_tail(&xfer[0], &msg);
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spi_message_add_tail(&xfer[1], &msg);
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return spi_sync(st->us, &msg);
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return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
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}
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/**
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@ -133,7 +129,6 @@ static int sca3000_reg_lock_on(struct sca3000_state *st)
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**/
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static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
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{
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struct spi_message msg;
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struct spi_transfer xfer[3] = {
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{
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.len = 2,
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@ -154,12 +149,8 @@ static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
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st->tx[3] = 0x50;
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st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK);
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st->tx[5] = 0xA0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer[0], &msg);
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spi_message_add_tail(&xfer[1], &msg);
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spi_message_add_tail(&xfer[2], &msg);
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return spi_sync(st->us, &msg);
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return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
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}
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/**
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@ -39,7 +39,6 @@ static int sca3000_read_data(struct sca3000_state *st,
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int len)
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{
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int ret;
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struct spi_message msg;
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struct spi_transfer xfer[2] = {
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{
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.len = 1,
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@ -55,10 +54,7 @@ static int sca3000_read_data(struct sca3000_state *st,
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}
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xfer[1].rx_buf = *rx_p;
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st->tx[0] = SCA3000_READ_REG(reg_address_high);
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spi_message_init(&msg);
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spi_message_add_tail(&xfer[0], &msg);
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spi_message_add_tail(&xfer[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
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if (ret) {
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dev_err(get_device(&st->us->dev), "problem reading register");
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goto error_free_rx;
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@ -199,12 +199,8 @@ static int __ad7280_read32(struct spi_device *spi, unsigned *val)
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.rx_buf = &rx_buf,
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.len = 4,
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};
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struct spi_message m;
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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ret = spi_sync(spi, &m);
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ret = spi_sync_transfer(spi, &t, 1);
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if (ret)
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return ret;
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@ -44,7 +44,6 @@ static ssize_t ad5930_set_parameter(struct device *dev,
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const char *buf,
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size_t len)
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{
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struct spi_message msg;
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struct spi_transfer xfer;
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int ret;
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struct ad5903_config *config = (struct ad5903_config *)buf;
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@ -64,9 +63,7 @@ static ssize_t ad5930_set_parameter(struct device *dev,
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xfer.tx_buf = config;
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mutex_lock(&st->lock);
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->sdev, &msg);
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ret = spi_sync_transfer(st->sdev, &xfer, 1);
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if (ret)
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goto error_ret;
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error_ret:
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@ -39,7 +39,6 @@ static ssize_t ad9850_set_parameter(struct device *dev,
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const char *buf,
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size_t len)
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{
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struct spi_message msg;
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struct spi_transfer xfer;
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int ret;
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struct ad9850_config *config = (struct ad9850_config *)buf;
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@ -50,9 +49,7 @@ static ssize_t ad9850_set_parameter(struct device *dev,
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xfer.tx_buf = config;
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mutex_lock(&st->lock);
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->sdev, &msg);
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ret = spi_sync_transfer(st->sdev, &xfer, 1);
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if (ret)
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goto error_ret;
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error_ret:
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@ -183,7 +183,6 @@ static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9852_set_parameter, 0);
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static void ad9852_init(struct ad9852_state *st)
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{
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struct spi_message msg;
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struct spi_transfer xfer;
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int ret;
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u8 config[5];
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@ -199,9 +198,7 @@ static void ad9852_init(struct ad9852_state *st)
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xfer.len = 5;
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xfer.tx_buf = &config;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->sdev, &msg);
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ret = spi_sync_transfer(st->sdev, &xfer, 1);
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if (ret)
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goto error_ret;
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@ -103,7 +103,6 @@ static int ade7753_spi_read_reg_24(struct device *dev,
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u8 reg_address,
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u32 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7753_state *st = iio_priv(indio_dev);
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int ret;
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@ -122,10 +121,7 @@ static int ade7753_spi_read_reg_24(struct device *dev,
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADE7753_READ_REG(reg_address);
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
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reg_address);
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@ -103,7 +103,6 @@ static int ade7754_spi_read_reg_24(struct device *dev,
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u8 reg_address,
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u32 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7754_state *st = iio_priv(indio_dev);
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int ret;
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@ -122,9 +121,7 @@ static int ade7754_spi_read_reg_24(struct device *dev,
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st->tx[2] = 0;
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st->tx[3] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
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reg_address);
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@ -47,7 +47,6 @@ static int ade7758_spi_write_reg_16(struct device *dev,
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u16 value)
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{
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int ret;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7758_state *st = iio_priv(indio_dev);
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struct spi_transfer xfers[] = {
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@ -63,9 +62,7 @@ static int ade7758_spi_write_reg_16(struct device *dev,
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st->tx[1] = (value >> 8) & 0xFF;
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st->tx[2] = value & 0xFF;
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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mutex_unlock(&st->buf_lock);
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return ret;
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@ -76,7 +73,6 @@ static int ade7758_spi_write_reg_24(struct device *dev,
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u32 value)
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{
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int ret;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7758_state *st = iio_priv(indio_dev);
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struct spi_transfer xfers[] = {
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@ -93,9 +89,7 @@ static int ade7758_spi_write_reg_24(struct device *dev,
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st->tx[2] = (value >> 8) & 0xFF;
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st->tx[3] = value & 0xFF;
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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mutex_unlock(&st->buf_lock);
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return ret;
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@ -105,7 +99,6 @@ int ade7758_spi_read_reg_8(struct device *dev,
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u8 reg_address,
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u8 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7758_state *st = iio_priv(indio_dev);
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int ret;
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@ -128,10 +121,7 @@ int ade7758_spi_read_reg_8(struct device *dev,
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st->tx[0] = ADE7758_READ_REG(reg_address);
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st->tx[1] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
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reg_address);
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@ -148,7 +138,6 @@ static int ade7758_spi_read_reg_16(struct device *dev,
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u8 reg_address,
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u16 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7758_state *st = iio_priv(indio_dev);
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int ret;
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@ -173,10 +162,7 @@ static int ade7758_spi_read_reg_16(struct device *dev,
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st->tx[1] = 0;
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st->tx[2] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
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reg_address);
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@ -194,7 +180,6 @@ static int ade7758_spi_read_reg_24(struct device *dev,
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u8 reg_address,
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u32 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7758_state *st = iio_priv(indio_dev);
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int ret;
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@ -219,10 +204,7 @@ static int ade7758_spi_read_reg_24(struct device *dev,
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st->tx[2] = 0;
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st->tx[3] = 0;
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
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reg_address);
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@ -103,7 +103,6 @@ static int ade7759_spi_read_reg_40(struct device *dev,
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u8 reg_address,
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u64 *val)
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{
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7759_state *st = iio_priv(indio_dev);
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int ret;
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@ -120,9 +119,7 @@ static int ade7759_spi_read_reg_40(struct device *dev,
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st->tx[0] = ADE7759_READ_REG(reg_address);
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memset(&st->tx[1], 0 , 5);
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 40 bit register 0x%02X",
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reg_address);
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|
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@ -20,7 +20,6 @@ static int ade7854_spi_write_reg_8(struct device *dev,
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u8 value)
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{
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int ret;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7854_state *st = iio_priv(indio_dev);
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struct spi_transfer xfer = {
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@ -35,9 +34,7 @@ static int ade7854_spi_write_reg_8(struct device *dev,
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st->tx[2] = reg_address & 0xFF;
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st->tx[3] = value & 0xFF;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->spi, &msg);
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ret = spi_sync_transfer(st->spi, &xfer, 1);
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mutex_unlock(&st->buf_lock);
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return ret;
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@ -48,7 +45,6 @@ static int ade7854_spi_write_reg_16(struct device *dev,
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u16 value)
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{
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int ret;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct ade7854_state *st = iio_priv(indio_dev);
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struct spi_transfer xfer = {
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@ -64,9 +60,7 @@ static int ade7854_spi_write_reg_16(struct device *dev,
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st->tx[3] = (value >> 8) & 0xFF;
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st->tx[4] = value & 0xFF;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, &xfer, 1);
|
||||
mutex_unlock(&st->buf_lock);
|
||||
|
||||
return ret;
|
||||
|
@ -77,7 +71,6 @@ static int ade7854_spi_write_reg_24(struct device *dev,
|
|||
u32 value)
|
||||
{
|
||||
int ret;
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
struct spi_transfer xfer = {
|
||||
|
@ -94,9 +87,7 @@ static int ade7854_spi_write_reg_24(struct device *dev,
|
|||
st->tx[4] = (value >> 8) & 0xFF;
|
||||
st->tx[5] = value & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfer, &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, &xfer, 1);
|
||||
mutex_unlock(&st->buf_lock);
|
||||
|
||||
return ret;
|
||||
|
@ -107,7 +98,6 @@ static int ade7854_spi_write_reg_32(struct device *dev,
|
|||
u32 value)
|
||||
{
|
||||
int ret;
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
struct spi_transfer xfer = {
|
||||
|
@ -125,9 +115,7 @@ static int ade7854_spi_write_reg_32(struct device *dev,
|
|||
st->tx[5] = (value >> 8) & 0xFF;
|
||||
st->tx[6] = value & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfer, &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, &xfer, 1);
|
||||
mutex_unlock(&st->buf_lock);
|
||||
|
||||
return ret;
|
||||
|
@ -137,7 +125,6 @@ static int ade7854_spi_read_reg_8(struct device *dev,
|
|||
u16 reg_address,
|
||||
u8 *val)
|
||||
{
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
@ -159,10 +146,7 @@ static int ade7854_spi_read_reg_8(struct device *dev,
|
|||
st->tx[1] = (reg_address >> 8) & 0xFF;
|
||||
st->tx[2] = reg_address & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfers[0], &msg);
|
||||
spi_message_add_tail(&xfers[1], &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
|
||||
if (ret) {
|
||||
dev_err(&st->spi->dev, "problem when reading 8 bit register 0x%02X",
|
||||
reg_address);
|
||||
|
@ -179,7 +163,6 @@ static int ade7854_spi_read_reg_16(struct device *dev,
|
|||
u16 reg_address,
|
||||
u16 *val)
|
||||
{
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
@ -200,10 +183,7 @@ static int ade7854_spi_read_reg_16(struct device *dev,
|
|||
st->tx[1] = (reg_address >> 8) & 0xFF;
|
||||
st->tx[2] = reg_address & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfers[0], &msg);
|
||||
spi_message_add_tail(&xfers[1], &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
|
||||
if (ret) {
|
||||
dev_err(&st->spi->dev, "problem when reading 16 bit register 0x%02X",
|
||||
reg_address);
|
||||
|
@ -220,7 +200,6 @@ static int ade7854_spi_read_reg_24(struct device *dev,
|
|||
u16 reg_address,
|
||||
u32 *val)
|
||||
{
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
@ -242,10 +221,7 @@ static int ade7854_spi_read_reg_24(struct device *dev,
|
|||
st->tx[1] = (reg_address >> 8) & 0xFF;
|
||||
st->tx[2] = reg_address & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfers[0], &msg);
|
||||
spi_message_add_tail(&xfers[1], &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
|
||||
if (ret) {
|
||||
dev_err(&st->spi->dev, "problem when reading 24 bit register 0x%02X",
|
||||
reg_address);
|
||||
|
@ -262,7 +238,6 @@ static int ade7854_spi_read_reg_32(struct device *dev,
|
|||
u16 reg_address,
|
||||
u32 *val)
|
||||
{
|
||||
struct spi_message msg;
|
||||
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
|
||||
struct ade7854_state *st = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
@ -284,10 +259,7 @@ static int ade7854_spi_read_reg_32(struct device *dev,
|
|||
st->tx[1] = (reg_address >> 8) & 0xFF;
|
||||
st->tx[2] = reg_address & 0xFF;
|
||||
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfers[0], &msg);
|
||||
spi_message_add_tail(&xfers[1], &msg);
|
||||
ret = spi_sync(st->spi, &msg);
|
||||
ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
|
||||
if (ret) {
|
||||
dev_err(&st->spi->dev, "problem when reading 32 bit register 0x%02X",
|
||||
reg_address);
|
||||
|
|
|
@ -130,15 +130,12 @@ static int ad2s1210_config_read(struct ad2s1210_state *st,
|
|||
.rx_buf = st->rx,
|
||||
.tx_buf = st->tx,
|
||||
};
|
||||
struct spi_message msg;
|
||||
int ret = 0;
|
||||
|
||||
ad2s1210_set_mode(MOD_CONFIG, st);
|
||||
spi_message_init(&msg);
|
||||
spi_message_add_tail(&xfer, &msg);
|
||||
st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
|
||||
st->tx[1] = AD2S1210_REG_FAULT;
|
||||
ret = spi_sync(st->sdev, &msg);
|
||||
ret = spi_sync_transfer(st->sdev, &xfer, 1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
st->old_data = true;
|
||||
|
|
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