ARM: 5634/1: Add static setting cpu frequence for w90p910 platform
Add static setting cpu frequence for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
wanzongshun
Russell King
Родитель
897bd6a363
Коммит
ae45b1c618
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@ -5,7 +5,7 @@
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# Object file lists.
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obj-y := irq.o time.o mfp-w90p910.o gpio.o clock.o
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obj-y += clksel.o
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# W90X900 CPU support files
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obj-$(CONFIG_CPU_W90P910) += w90p910.o
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@ -0,0 +1,91 @@
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/*
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* linux/arch/arm/mach-w90x900/clksel.c
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation;version 2 of the License.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/regs-clock.h>
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#define PLL0 0x00
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#define PLL1 0x01
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#define OTHER 0x02
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#define EXT 0x03
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#define MSOFFSET 0x0C
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#define ATAOFFSET 0x0a
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#define LCDOFFSET 0x06
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#define AUDOFFSET 0x04
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#define CPUOFFSET 0x00
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static DEFINE_MUTEX(clksel_sem);
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static void clock_source_select(const char *dev_id, unsigned int clkval)
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{
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unsigned int clksel, offset;
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clksel = __raw_readl(REG_CLKSEL);
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if (strcmp(dev_id, "w90p910-ms") == 0)
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offset = MSOFFSET;
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else if (strcmp(dev_id, "w90p910-atapi") == 0)
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offset = ATAOFFSET;
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else if (strcmp(dev_id, "w90p910-lcd") == 0)
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offset = LCDOFFSET;
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else if (strcmp(dev_id, "w90p910-audio") == 0)
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offset = AUDOFFSET;
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else
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offset = CPUOFFSET;
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clksel &= ~(0x03 << offset);
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clksel |= (clkval << offset);
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__raw_writel(clksel, REG_CLKSEL);
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}
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void w90p910_clock_source(struct device *dev, unsigned char *src)
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{
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unsigned int clkval;
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const char *dev_id;
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BUG_ON(!src);
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clkval = 0;
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mutex_lock(&clksel_sem);
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if (dev)
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dev_id = dev_name(dev);
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else
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dev_id = "cpufreq";
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if (strcmp(src, "pll0") == 0)
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clkval = PLL0;
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else if (strcmp(src, "pll1") == 0)
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clkval = PLL1;
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else if (strcmp(src, "ext") == 0)
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clkval = EXT;
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else if (strcmp(src, "oth") == 0)
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clkval = OTHER;
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clock_source_select(dev_id, clkval);
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mutex_unlock(&clksel_sem);
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}
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EXPORT_SYMBOL(w90p910_clock_source);
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@ -45,6 +45,7 @@ extern void w90p910_init_clocks(void);
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extern void w90p910_map_io(struct map_desc *mach_desc, int size);
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extern struct platform_device w90p910_serial_device;
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extern struct sys_timer w90x900_timer;
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extern void w90p910_clock_source(struct device *dev, unsigned char *src);
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#define W90X900_8250PORT(name) \
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{ \
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@ -28,4 +28,26 @@
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#define REG_CLKEN1 (CLK_BA + 0x24)
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#define REG_CLKDIV1 (CLK_BA + 0x28)
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/* Define PLL freq setting */
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#define PLL_DISABLE 0x12B63
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#define PLL_66MHZ 0x2B63
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#define PLL_100MHZ 0x4F64
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#define PLL_120MHZ 0x4F63
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#define PLL_166MHZ 0x4124
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#define PLL_200MHZ 0x4F24
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/* Define AHB:CPUFREQ ratio */
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#define AHB_CPUCLK_1_1 0x00
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#define AHB_CPUCLK_1_2 0x01
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#define AHB_CPUCLK_1_4 0x02
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#define AHB_CPUCLK_1_8 0x03
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/* Define APB:AHB ratio */
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#define APB_AHB_1_2 0x01
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#define APB_AHB_1_4 0x02
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#define APB_AHB_1_8 0x03
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/* Define clock skew */
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#define DEFAULTSKEW 0x48
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#endif /* __ASM_ARCH_REGS_CLOCK_H */
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@ -0,0 +1,33 @@
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/*
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* arch/arm/mach-w90x900/include/mach/regs-ebi.h
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*
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* Copyright (c) 2009 Nuvoton technology corporation.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation;version 2 of the License.
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*
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*/
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#ifndef __ASM_ARCH_REGS_EBI_H
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#define __ASM_ARCH_REGS_EBI_H
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/* EBI Control Registers */
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#define EBI_BA W90X900_VA_EBI
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#define REG_EBICON (EBI_BA + 0x00)
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#define REG_ROMCON (EBI_BA + 0x04)
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#define REG_SDCONF0 (EBI_BA + 0x08)
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#define REG_SDCONF1 (EBI_BA + 0x0C)
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#define REG_SDTIME0 (EBI_BA + 0x10)
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#define REG_SDTIME1 (EBI_BA + 0x14)
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#define REG_EXT0CON (EBI_BA + 0x18)
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#define REG_EXT1CON (EBI_BA + 0x1C)
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#define REG_EXT2CON (EBI_BA + 0x20)
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#define REG_EXT3CON (EBI_BA + 0x24)
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#define REG_EXT4CON (EBI_BA + 0x28)
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#define REG_CKSKEW (EBI_BA + 0x2C)
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#endif /* __ASM_ARCH_REGS_EBI_H */
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@ -24,6 +24,7 @@
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/serial_8250.h>
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#include <linux/delay.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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@ -32,6 +33,8 @@
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#include <mach/hardware.h>
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#include <mach/regs-serial.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-ebi.h>
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#include "cpu.h"
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#include "clock.h"
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@ -123,6 +126,83 @@ void __init w90p910_map_io(struct map_desc *mach_desc, int mach_size)
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printk(KERN_ERR "CPU type 0x%08lx is not W90P910\n", idcode);
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}
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/*Set W90P910 cpu frequence*/
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static int __init w90p910_set_clkval(unsigned int cpufreq)
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{
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unsigned int pllclk, ahbclk, apbclk, val;
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pllclk = 0;
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ahbclk = 0;
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apbclk = 0;
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switch (cpufreq) {
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case 66:
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pllclk = PLL_66MHZ;
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ahbclk = AHB_CPUCLK_1_1;
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apbclk = APB_AHB_1_2;
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break;
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case 100:
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pllclk = PLL_100MHZ;
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ahbclk = AHB_CPUCLK_1_1;
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apbclk = APB_AHB_1_2;
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break;
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case 120:
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pllclk = PLL_120MHZ;
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ahbclk = AHB_CPUCLK_1_2;
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apbclk = APB_AHB_1_2;
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break;
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case 166:
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pllclk = PLL_166MHZ;
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ahbclk = AHB_CPUCLK_1_2;
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apbclk = APB_AHB_1_2;
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break;
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case 200:
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pllclk = PLL_200MHZ;
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ahbclk = AHB_CPUCLK_1_2;
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apbclk = APB_AHB_1_2;
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break;
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}
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__raw_writel(pllclk, REG_PLLCON0);
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val = __raw_readl(REG_CLKDIV);
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val &= ~(0x03 << 24 | 0x03 << 26);
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val |= (ahbclk << 24 | apbclk << 26);
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__raw_writel(val, REG_CLKDIV);
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return 0;
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}
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static int __init w90p910_set_cpufreq(char *str)
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{
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unsigned long cpufreq, val;
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if (!*str)
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return 0;
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strict_strtoul(str, 0, &cpufreq);
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w90p910_clock_source(NULL, "ext");
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w90p910_set_clkval(cpufreq);
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mdelay(1);
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val = __raw_readl(REG_CKSKEW);
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val &= ~0xff;
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val |= DEFAULTSKEW;
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__raw_writel(val, REG_CKSKEW);
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w90p910_clock_source(NULL, "pll0");
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return 1;
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}
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__setup("cpufreq=", w90p910_set_cpufreq);
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/*Init W90P910 clock*/
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void __init w90p910_init_clocks(void)
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