Blackfin: update anomaly lists
Add some recently documented anomalies (473, 474, 475, 477). Also stick a "do not edit" notice in here so people know these are copies of some master version. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
Родитель
7bae2c4898
Коммит
af5d7fc7e4
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf518/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -70,6 +74,10 @@
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#define ANOMALY_05000461 (1)
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/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
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#define ANOMALY_05000462 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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@ -133,5 +141,7 @@
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#define ANOMALY_05000450 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#endif
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@ -1,14 +1,18 @@
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/*
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* File: include/asm-blackfin/mach-bf527/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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* - Revision D, 08/14/2009; ADSP-BF526 Blackfin Processor Anomaly List
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* - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List
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* - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List
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*/
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#ifndef _MACH_ANOMALY_H_
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@ -200,6 +204,10 @@
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#define ANOMALY_05000467 (1)
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/* PLL Latches Incorrect Settings During Reset */
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#define ANOMALY_05000469 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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@ -250,5 +258,7 @@
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#endif
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf533/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -202,6 +206,10 @@
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* These anomalies have been "phased" out of analog.com anomaly sheets and are
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* here to show running on older silicon just isn't feasible.
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@ -349,5 +357,7 @@
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#define ANOMALY_05000450 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#endif
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf537/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -156,6 +160,10 @@
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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@ -202,5 +210,7 @@
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#define ANOMALY_05000450 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#endif
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf538/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -128,6 +132,10 @@
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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@ -176,5 +184,7 @@
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#define ANOMALY_05000450 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#endif
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf548/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -24,6 +28,8 @@
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#define ANOMALY_05000119 (1)
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/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
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#define ANOMALY_05000122 (1)
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/* Data Corruption with Cached External Memory and Non-Cached On-Chip L2 Memory */
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#define ANOMALY_05000220 (1)
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/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
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#define ANOMALY_05000245 (1)
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/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
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@ -200,6 +206,14 @@
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#define ANOMALY_05000466 (1)
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/* Possible RX data corruption when control & data EP FIFOs are accessed via the core */
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#define ANOMALY_05000467 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* Access to DDR-SDRAM causes system hang under certain PLL/VR settings */
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#define ANOMALY_05000474 (1)
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/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
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#define ANOMALY_05000475 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000099 (0)
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@ -215,7 +229,6 @@
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#define ANOMALY_05000198 (0)
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#define ANOMALY_05000202 (0)
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#define ANOMALY_05000215 (0)
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#define ANOMALY_05000220 (0)
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#define ANOMALY_05000227 (0)
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#define ANOMALY_05000230 (0)
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#define ANOMALY_05000231 (0)
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@ -1,9 +1,13 @@
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/*
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* File: include/asm-blackfin/mach-bf561/anomaly.h
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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* DO NOT EDIT THIS FILE
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* This file is under version control at
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* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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*
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* Copyright (C) 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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/* This file should be up to date with:
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@ -213,7 +217,11 @@
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/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
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#define ANOMALY_05000278 (__SILICON_REVISION__ < 5)
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/* False Hardware Error Exception when ISR Context Is Not Restored */
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#define ANOMALY_05000281 (__SILICON_REVISION__ < 5)
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/* Temporarily walk around for bug 5423 till this issue is confirmed by
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* official anomaly document. It looks 05000281 still exists on bf561
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* v0.5.
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*/
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#define ANOMALY_05000281 (__SILICON_REVISION__ <= 5)
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/* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */
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#define ANOMALY_05000283 (1)
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/* Reads Will Receive Incorrect Data under Certain Conditions */
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@ -280,6 +288,12 @@
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
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#define ANOMALY_05000475 (__SILICON_REVISION__ < 4)
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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/* Anomalies that don't exist on this proc */
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#define ANOMALY_05000119 (0)
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@ -304,5 +318,6 @@
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#define ANOMALY_05000450 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#endif
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