drm-misc-next for 5.4:
UAPI Changes:
- HDCP: Add a Content protection type property
Cross-subsystem Changes:
Core Changes:
- Continue to rework the include dependencies
- fb: Remove the unused drm_gem_fbdev_fb_create function
- drm-dp-helper: Make the link rate calculation more tolerant to
non-explicitly defined, yet supported, rates
- fb-helper: Map DRM client buffer only when required, and instanciate a
shadow buffer when the device has a dirty function or says so
- connector: Add a helper to link the DDC adapter used by that connector to
the userspace
- vblank: Switch from DRM_WAIT_ON to wait_event_interruptible_timeout
- dma-buf: Fix a stack corruption
- ttm: Embed a drm_gem_object struct to make ttm_buffer_object a
superclass of GEM, and convert drivers to use it.
- hdcp: Improvements to report the content protection type to the
userspace
Driver Changes:
- Remove drm_gem_prime_import/export from being defined in the drivers
- Drop DRM_AUTH usage from drivers
- Continue to drop drmP.h
- Convert drivers to the connector ddc helper
- ingenic: Add support for more panel-related cases
- komeda: Support for dual-link
- lima: Reduce logging
- mpag200: Fix the cursor support
- panfrost: Export GPU features register to userspace through an ioctl
- pl111: Remove the CLD pads wiring support from the DT
- rockchip: Rework to use DRM PSR helpers, fix a bug in the VOP_WIN_GET
macro
- sun4i: Improve support for color encoding and range
- tinydrm: Rework SPI support, improve MIPI-DBI support, move to drm/tiny
- vkms: Rework of the CRC tracking
- bridges:
- sii902x: Add support for audio graph card
- tc358767: Rework AUX data handling code
- ti-sn65dsi86: Add Debugfs and proper DSI mode flags support
- panels
- Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech
COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191,
Boe Himax8279d, Sharp LD-D5116Z01B
- Conversion of the device tree bindings to the YAML description
- jh057n00900: Rework the enable / disable path
- fbdev:
- ssd1307fb: Support more devices based on that controller
-----BEGIN PGP SIGNATURE-----
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xQ4lAQDK2ijx29YHeZspbOwP4Nwq95DFs1uQcSm5GvbRt1JSowD9EwkLeNfkPkel
Xv1Ts/Frgq7ckH2e2zkLPyCOFCHd0wA=
=rIUl
-----END PGP SIGNATURE-----
Merge tag 'drm-misc-next-2019-08-08' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 5.4:
UAPI Changes:
- HDCP: Add a Content protection type property
Cross-subsystem Changes:
Core Changes:
- Continue to rework the include dependencies
- fb: Remove the unused drm_gem_fbdev_fb_create function
- drm-dp-helper: Make the link rate calculation more tolerant to
non-explicitly defined, yet supported, rates
- fb-helper: Map DRM client buffer only when required, and instanciate a
shadow buffer when the device has a dirty function or says so
- connector: Add a helper to link the DDC adapter used by that connector to
the userspace
- vblank: Switch from DRM_WAIT_ON to wait_event_interruptible_timeout
- dma-buf: Fix a stack corruption
- ttm: Embed a drm_gem_object struct to make ttm_buffer_object a
superclass of GEM, and convert drivers to use it.
- hdcp: Improvements to report the content protection type to the
userspace
Driver Changes:
- Remove drm_gem_prime_import/export from being defined in the drivers
- Drop DRM_AUTH usage from drivers
- Continue to drop drmP.h
- Convert drivers to the connector ddc helper
- ingenic: Add support for more panel-related cases
- komeda: Support for dual-link
- lima: Reduce logging
- mpag200: Fix the cursor support
- panfrost: Export GPU features register to userspace through an ioctl
- pl111: Remove the CLD pads wiring support from the DT
- rockchip: Rework to use DRM PSR helpers, fix a bug in the VOP_WIN_GET
macro
- sun4i: Improve support for color encoding and range
- tinydrm: Rework SPI support, improve MIPI-DBI support, move to drm/tiny
- vkms: Rework of the CRC tracking
- bridges:
- sii902x: Add support for audio graph card
- tc358767: Rework AUX data handling code
- ti-sn65dsi86: Add Debugfs and proper DSI mode flags support
- panels
- Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech
COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191,
Boe Himax8279d, Sharp LD-D5116Z01B
- Conversion of the device tree bindings to the YAML description
- jh057n00900: Rework the enable / disable path
- fbdev:
- ssd1307fb: Support more devices based on that controller
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190808121423.xzpedzkpyecvsiy4@flea
This commit is contained in:
Dave Airlie
Коммит
b0383c0653
|
|
@ -39,9 +39,11 @@ Required sub-nodes:
|
|||
|
||||
- port: describes LCD panel signals, following the common binding
|
||||
for video transmitter interfaces; see
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt;
|
||||
when it is a TFT panel, the port's endpoint must define the
|
||||
following property:
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
|
||||
Deprecated properties:
|
||||
The port's endbpoint subnode had this, now deprecated property
|
||||
in the past. Drivers should be able to survive without it:
|
||||
|
||||
- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
|
||||
defining the way CLD pads are wired up; first value
|
||||
|
|
@ -80,7 +82,6 @@ Example:
|
|||
port {
|
||||
clcd_pads: endpoint {
|
||||
remote-endpoint = <&clcd_panel>;
|
||||
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -26,9 +26,8 @@ Optional properties:
|
|||
- clocks: phandle and clock specifier for each clock listed in
|
||||
the clock-names property
|
||||
- clock-names: "mclk"
|
||||
Describes SII902x MCLK input. MCLK is used to produce
|
||||
HDMI audio CTS values. This property is required if
|
||||
"#sound-dai-cells"-property is present. This property follows
|
||||
Describes SII902x MCLK input. MCLK can be used to produce
|
||||
HDMI audio CTS values. This property follows
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
consumer binding.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,26 +0,0 @@
|
|||
Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "ampire,am-480272h3tmqw-t01h"
|
||||
|
||||
Optional properties:
|
||||
- power-supply: regulator to provide the supply voltage
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Optional nodes:
|
||||
- Video port for RGB input.
|
||||
|
||||
Example:
|
||||
panel_rgb: panel-rgb {
|
||||
compatible = "ampire,am-480272h3tmqw-t01h";
|
||||
enable-gpios = <&gpioa 8 1>;
|
||||
port {
|
||||
panel_in_rgb: endpoint {
|
||||
remote-endpoint = <&controller_out_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/ampire,am-480272h3tmqw-t01h.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Yannick Fertre <yannick.fertre@st.com>
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
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const: ampire,am-480272h3tmqw-t01h
|
||||
|
||||
power-supply: true
|
||||
enable-gpios: true
|
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backlight: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
panel_rgb: panel {
|
||||
compatible = "ampire,am-480272h3tmqw-t01h";
|
||||
enable-gpios = <&gpioa 8 1>;
|
||||
port {
|
||||
panel_in_rgb: endpoint {
|
||||
remote-endpoint = <&controller_out_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -10,7 +10,7 @@ Required properties:
|
|||
- compatible: should be "arm,versatile-tft-panel"
|
||||
|
||||
Required subnodes:
|
||||
- port: see display/panel/panel-common.txt, graph.txt
|
||||
- port: see display/panel/panel-common.yaml, graph.txt
|
||||
|
||||
|
||||
Example:
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
Armadeus ST0700 Adapt. A Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT with
|
||||
an adapter board.
|
||||
|
||||
Required properties:
|
||||
- compatible: "armadeus,st0700-adapt"
|
||||
- power-supply: see panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- backlight: see panel-common.txt
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/armadeus,st0700-adapt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Armadeus ST0700 Adapter
|
||||
|
||||
description:
|
||||
A Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT with an adapter board.
|
||||
|
||||
maintainers:
|
||||
- '"Sébastien Szymanski" <sebastien.szymanski@armadeus.com>'
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: armadeus,st0700-adapt
|
||||
|
||||
power-supply: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
...
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
Banana Pi 7" (S070WV20-CT16) TFT LCD Panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "bananapi,s070wv20-ct16"
|
||||
- power-supply: see ./panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: see ./simple-panel.txt
|
||||
- backlight: see ./simple-panel.txt
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in ./simple-panel.txt.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/bananapi,s070wv20-ct16.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Banana Pi 7" (S070WV20-CT16) TFT LCD Panel
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: bananapi,s070wv20-ct16
|
||||
|
||||
power-supply: true
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
Boe Himax8279d 1200x1920 TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "boe,himax8279d8p" and one of: "boe,himax8279d10p"
|
||||
- reg: DSI virtual channel of the peripheral
|
||||
- enable-gpios: panel enable gpio
|
||||
- pp33-gpios: a GPIO phandle for the 3.3v pin that provides the supply voltage
|
||||
- pp18-gpios: a GPIO phandle for the 1.8v pin that provides the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Example:
|
||||
|
||||
&mipi_dsi {
|
||||
panel {
|
||||
compatible = "boe,himax8279d8p", "boe,himax8279d10p";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
|
||||
pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
DLC Display Co. DLC0700YZG-1 7.0" WSVGA TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "dlc,dlc0700yzg-1"
|
||||
- power-supply: See simple-panel.txt
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: See panel-common.txt
|
||||
- enable-gpios: See simple-panel.txt
|
||||
- backlight: See simple-panel.txt
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/dlc,dlc0700yzg-1.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DLC Display Co. DLC0700YZG-1 7.0" WSVGA TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Philipp Zabel <p.zabel@pengutronix.de>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: dlc,dlc0700yzg-1
|
||||
|
||||
reset-gpios: true
|
||||
enable-gpios: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
...
|
||||
|
|
@ -40,7 +40,7 @@ simple-panel.txt
|
|||
| Identifier | compatbile | description |
|
||||
+=================+=====================+=====================================+
|
||||
| ETM0700G0DH6 | edt,etm070080dh6 | WVGA TFT Display with capacitive |
|
||||
| | | Touchscreen |
|
||||
| | edt,etm0700g0dh6 | Touchscreen |
|
||||
+-----------------+---------------------+-------------------------------------+
|
||||
| ETM0700G0BDH6 | edt,etm070080bdh6 | Same as ETM0700G0DH6 but with |
|
||||
| | | inverted pixel clock. |
|
||||
|
|
|
|||
|
|
@ -0,0 +1,12 @@
|
|||
GiantPlus 3.0" (320x240 pixels) 24-bit TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "giantplus,gpm940b0"
|
||||
- power-supply: as specified in the base binding
|
||||
|
||||
Optional properties:
|
||||
- backlight: as specified in the base binding
|
||||
- enable-gpios: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "innolux,ee101ia-01d"
|
||||
|
||||
This binding is compatible with the lvds-panel binding, which is specified
|
||||
in panel-lvds.txt in this directory.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/innolux,ee101ia-01d.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel
|
||||
|
||||
maintainers:
|
||||
- Heiko Stuebner <heiko.stuebner@bq.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: lvds.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: innolux,ee101ia-01d
|
||||
- {} # panel-lvds, but not listed here to avoid false select
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
width-mm: true
|
||||
height-mm: true
|
||||
panel-timing: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
...
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "kingdisplay,kd035g6-54nt"
|
||||
- power-supply: See panel-common.txt
|
||||
- reset-gpios: See panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- backlight: see panel-common.txt
|
||||
|
||||
The generic bindings for the SPI slaves documented in [1] also apply.
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [2]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
[2]: Documentation/devicetree/bindings/graph.txt
|
||||
|
||||
Example:
|
||||
|
||||
&spi {
|
||||
panel@0 {
|
||||
compatible = "kingdisplay,kd035g6-54nt";
|
||||
reg = <0>;
|
||||
|
||||
spi-max-frequency = <3125000>;
|
||||
spi-3wire;
|
||||
spi-cs-high;
|
||||
|
||||
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
|
||||
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&ldo6>;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&panel_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,107 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/lvds.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
description: |+
|
||||
LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
|
||||
incompatible data link layers have been used over time to transmit image data
|
||||
to LVDS panels. This bindings supports display panels compatible with the
|
||||
following specifications.
|
||||
|
||||
[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
|
||||
1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
|
||||
[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
|
||||
Semiconductor
|
||||
[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
|
||||
Electronics Standards Association (VESA)
|
||||
|
||||
Device compatible with those specifications have been marketed under the
|
||||
FPD-Link and FlatLink brands.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: panel-lvds
|
||||
description:
|
||||
Shall contain "panel-lvds" in addition to a mandatory panel-specific
|
||||
compatible string defined in individual panel bindings. The "panel-lvds"
|
||||
value shall never be used on its own.
|
||||
|
||||
data-mapping:
|
||||
enum:
|
||||
- jeida-18
|
||||
- jeida-24
|
||||
- vesa-24
|
||||
description: |
|
||||
The color signals mapping order.
|
||||
|
||||
LVDS data mappings are defined as follows.
|
||||
|
||||
- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
|
||||
[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
|
||||
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
|
||||
|
||||
- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
|
||||
specifications. Data are transferred as follows on 4 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
|
||||
DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
|
||||
DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
|
||||
|
||||
- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
|
||||
Data are transferred as follows on 4 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
|
||||
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
|
||||
DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
|
||||
|
||||
Control signals are mapped as follows.
|
||||
|
||||
CTL0: HSync
|
||||
CTL1: VSync
|
||||
CTL2: Data Enable
|
||||
CTL3: 0
|
||||
|
||||
data-mirror:
|
||||
type: boolean
|
||||
description:
|
||||
If set, reverse the bit order described in the data mappings below on all
|
||||
data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- data-mapping
|
||||
- width-mm
|
||||
- height-mm
|
||||
- panel-timing
|
||||
- port
|
||||
|
||||
...
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
Mitsubishi AA204XD12 LVDS Display Panel
|
||||
=======================================
|
||||
|
||||
The AA104XD12 is a 10.4" XGA TFT-LCD display panel.
|
||||
|
||||
These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt
|
||||
with the following device-specific properties.
|
||||
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Shall contain "mitsubishi,aa121td01" and "panel-lvds", in that
|
||||
order.
|
||||
- vcc-supply: Reference to the regulator powering the panel VCC pins.
|
||||
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
panel {
|
||||
compatible = "mitsubishi,aa104xd12", "panel-lvds";
|
||||
vcc-supply = <&vcc_3v3>;
|
||||
|
||||
width-mm = <210>;
|
||||
height-mm = <158>;
|
||||
|
||||
data-mapping = "jeida-24";
|
||||
|
||||
panel-timing {
|
||||
/* 1024x768 @65Hz */
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hsync-len = <136>;
|
||||
hfront-porch = <20>;
|
||||
hback-porch = <160>;
|
||||
vfront-porch = <3>;
|
||||
vback-porch = <29>;
|
||||
vsync-len = <6>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/mitsubishi,aa104xd12.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mitsubishi AA104XD12 10.4" XGA LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: lvds.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: mitsubishi,aa104xd12
|
||||
- {} # panel-lvds, but not listed here to avoid false select
|
||||
|
||||
vcc-supply:
|
||||
description: Reference to the regulator powering the panel VCC pins.
|
||||
|
||||
data-mapping:
|
||||
const: jeida-24
|
||||
|
||||
width-mm:
|
||||
const: 210
|
||||
|
||||
height-mm:
|
||||
const: 158
|
||||
|
||||
panel-timing: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vcc-supply
|
||||
|
||||
examples:
|
||||
- |+
|
||||
|
||||
panel {
|
||||
compatible = "mitsubishi,aa104xd12", "panel-lvds";
|
||||
vcc-supply = <&vcc_3v3>;
|
||||
|
||||
width-mm = <210>;
|
||||
height-mm = <158>;
|
||||
|
||||
data-mapping = "jeida-24";
|
||||
|
||||
panel-timing {
|
||||
/* 1024x768 @65Hz */
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hsync-len = <136>;
|
||||
hfront-porch = <20>;
|
||||
hback-porch = <160>;
|
||||
vfront-porch = <3>;
|
||||
vback-porch = <29>;
|
||||
vsync-len = <6>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
Mitsubishi AA121TD01 LVDS Display Panel
|
||||
=======================================
|
||||
|
||||
The AA121TD01 is a 12.1" WXGA TFT-LCD display panel.
|
||||
|
||||
These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt
|
||||
with the following device-specific properties.
|
||||
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Shall contain "mitsubishi,aa121td01" and "panel-lvds", in that
|
||||
order.
|
||||
- vcc-supply: Reference to the regulator powering the panel VCC pins.
|
||||
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
panel {
|
||||
compatible = "mitsubishi,aa121td01", "panel-lvds";
|
||||
vcc-supply = <&vcc_3v3>;
|
||||
|
||||
width-mm = <261>;
|
||||
height-mm = <163>;
|
||||
|
||||
data-mapping = "jeida-24";
|
||||
|
||||
panel-timing {
|
||||
/* 1280x800 @60Hz */
|
||||
clock-frequency = <71000000>;
|
||||
hactive = <1280>;
|
||||
vactive = <800>;
|
||||
hsync-len = <70>;
|
||||
hfront-porch = <20>;
|
||||
hback-porch = <70>;
|
||||
vsync-len = <5>;
|
||||
vfront-porch = <3>;
|
||||
vback-porch = <15>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/mitsubishi,aa121td01.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mitsubishi AA121TD01 12.1" WXGA LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: lvds.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: mitsubishi,aa121td01
|
||||
- {} # panel-lvds, but not listed here to avoid false select
|
||||
|
||||
vcc-supply:
|
||||
description: Reference to the regulator powering the panel VCC pins.
|
||||
|
||||
data-mapping:
|
||||
const: jeida-24
|
||||
|
||||
width-mm:
|
||||
const: 261
|
||||
|
||||
height-mm:
|
||||
const: 163
|
||||
|
||||
panel-timing: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vcc-supply
|
||||
|
||||
examples:
|
||||
- |+
|
||||
panel {
|
||||
compatible = "mitsubishi,aa121td01", "panel-lvds";
|
||||
vcc-supply = <&vcc_3v3>;
|
||||
|
||||
width-mm = <261>;
|
||||
height-mm = <163>;
|
||||
|
||||
data-mapping = "jeida-24";
|
||||
|
||||
panel-timing {
|
||||
/* 1280x800 @60Hz */
|
||||
clock-frequency = <71000000>;
|
||||
hactive = <1280>;
|
||||
vactive = <800>;
|
||||
hsync-len = <70>;
|
||||
hfront-porch = <20>;
|
||||
hback-porch = <70>;
|
||||
vsync-len = <5>;
|
||||
vfront-porch = <3>;
|
||||
vback-porch = <15>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
OrtusTech COM37H3M05DTC Blanview 3.7" VGA portrait TFT-LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "ortustech,com37h3m05dtc"
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
OrtusTech COM37H3M99DTC Blanview 3.7" VGA portrait TFT-LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "ortustech,com37h3m99dtc"
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -1,101 +0,0 @@
|
|||
Common Properties for Display Panel
|
||||
===================================
|
||||
|
||||
This document defines device tree properties common to several classes of
|
||||
display panels. It doesn't constitue a device tree binding specification by
|
||||
itself but is meant to be referenced by device tree bindings.
|
||||
|
||||
When referenced from panel device tree bindings the properties defined in this
|
||||
document are defined as follows. The panel device tree bindings are
|
||||
responsible for defining whether each property is required or optional.
|
||||
|
||||
|
||||
Descriptive Properties
|
||||
----------------------
|
||||
|
||||
- width-mm,
|
||||
- height-mm: The width-mm and height-mm specify the width and height of the
|
||||
physical area where images are displayed. These properties are expressed in
|
||||
millimeters and rounded to the closest unit.
|
||||
|
||||
- label: The label property specifies a symbolic name for the panel as a
|
||||
string suitable for use by humans. It typically contains a name inscribed on
|
||||
the system (e.g. as an affixed label) or specified in the system's
|
||||
documentation (e.g. in the user's manual).
|
||||
|
||||
If no such name exists, and unless the property is mandatory according to
|
||||
device tree bindings, it shall rather be omitted than constructed of
|
||||
non-descriptive information. For instance an LCD panel in a system that
|
||||
contains a single panel shall not be labelled "LCD" if that name is not
|
||||
inscribed on the system or used in a descriptive fashion in system
|
||||
documentation.
|
||||
|
||||
|
||||
Display Timings
|
||||
---------------
|
||||
|
||||
- panel-timing: Most display panels are restricted to a single resolution and
|
||||
require specific display timings. The panel-timing subnode expresses those
|
||||
timings as specified in the timing subnode section of the display timing
|
||||
bindings defined in
|
||||
Documentation/devicetree/bindings/display/panel/display-timing.txt.
|
||||
|
||||
|
||||
Connectivity
|
||||
------------
|
||||
|
||||
- ports: Panels receive video data through one or multiple connections. While
|
||||
the nature of those connections is specific to the panel type, the
|
||||
connectivity is expressed in a standard fashion using ports as specified in
|
||||
the device graph bindings defined in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
- ddc-i2c-bus: Some panels expose EDID information through an I2C-compatible
|
||||
bus such as DDC2 or E-DDC. For such panels the ddc-i2c-bus contains a
|
||||
phandle to the system I2C controller connected to that bus.
|
||||
|
||||
|
||||
Control I/Os
|
||||
------------
|
||||
|
||||
Many display panels can be controlled through pins driven by GPIOs. The nature
|
||||
and timing of those control signals are device-specific and left for panel
|
||||
device tree bindings to specify. The following GPIO specifiers can however be
|
||||
used for panels that implement compatible control signals.
|
||||
|
||||
- enable-gpios: Specifier for a GPIO connected to the panel enable control
|
||||
signal. The enable signal is active high and enables operation of the panel.
|
||||
This property can also be used for panels implementing an active low power
|
||||
down signal, which is a negated version of the enable signal. Active low
|
||||
enable signals (or active high power down signals) can be supported by
|
||||
inverting the GPIO specifier polarity flag.
|
||||
|
||||
Note that the enable signal control panel operation only and must not be
|
||||
confused with a backlight enable signal.
|
||||
|
||||
- reset-gpios: Specifier for a GPIO coonnected to the panel reset control
|
||||
signal. The reset signal is active low and resets the panel internal logic
|
||||
while active. Active high reset signals can be supported by inverting the
|
||||
GPIO specifier polarity flag.
|
||||
|
||||
Power
|
||||
-----
|
||||
|
||||
- power-supply: display panels require power to be supplied. While several
|
||||
panels need more than one power supply with panel-specific constraints
|
||||
governing the order and timings of the power supplies, in many cases a single
|
||||
power supply is sufficient, either because the panel has a single power rail,
|
||||
or because all its power rails can be driven by the same supply. In that case
|
||||
the power-supply property specifies the supply powering the panel as a phandle
|
||||
to a regulator.
|
||||
|
||||
Backlight
|
||||
---------
|
||||
|
||||
Most display panels include a backlight. Some of them also include a backlight
|
||||
controller exposed through a control bus such as I2C or DSI. Others expose
|
||||
backlight control through GPIO, PWM or other signals connected to an external
|
||||
backlight controller.
|
||||
|
||||
- backlight: For panels whose backlight is controlled by an external backlight
|
||||
controller, this property contains a phandle that references the controller.
|
||||
|
|
@ -0,0 +1,149 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Common Properties for Display Panels
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
|
||||
description: |
|
||||
This document defines device tree properties common to several classes of
|
||||
display panels. It doesn't constitue a device tree binding specification by
|
||||
itself but is meant to be referenced by device tree bindings.
|
||||
|
||||
When referenced from panel device tree bindings the properties defined in this
|
||||
document are defined as follows. The panel device tree bindings are
|
||||
responsible for defining whether each property is required or optional.
|
||||
|
||||
properties:
|
||||
# Descriptive Properties
|
||||
width-mm:
|
||||
description:
|
||||
Specifies the width of the physical area where images are displayed. This
|
||||
property is expressed in millimeters and rounded to the closest unit.
|
||||
|
||||
height-mm:
|
||||
description:
|
||||
Specifies the height of the physical area where images are displayed. This
|
||||
property is expressed in millimeters and rounded to the closest unit.
|
||||
|
||||
label:
|
||||
description: |
|
||||
The label property specifies a symbolic name for the panel as a
|
||||
string suitable for use by humans. It typically contains a name inscribed
|
||||
on the system (e.g. as an affixed label) or specified in the system's
|
||||
documentation (e.g. in the user's manual).
|
||||
|
||||
If no such name exists, and unless the property is mandatory according to
|
||||
device tree bindings, it shall rather be omitted than constructed of
|
||||
non-descriptive information. For instance an LCD panel in a system that
|
||||
contains a single panel shall not be labelled "LCD" if that name is not
|
||||
inscribed on the system or used in a descriptive fashion in system
|
||||
documentation.
|
||||
|
||||
rotation:
|
||||
description:
|
||||
Display rotation in degrees counter clockwise (0,90,180,270)
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
- enum: [ 0, 90, 180, 270 ]
|
||||
|
||||
# Display Timings
|
||||
panel-timing:
|
||||
type: object
|
||||
description:
|
||||
Most display panels are restricted to a single resolution and
|
||||
require specific display timings. The panel-timing subnode expresses those
|
||||
timings as specified in the timing subnode section of the display timing
|
||||
bindings defined in
|
||||
Documentation/devicetree/bindings/display/panel/display-timing.txt.
|
||||
|
||||
# Connectivity
|
||||
port:
|
||||
type: object
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Panels receive video data through one or multiple connections. While
|
||||
the nature of those connections is specific to the panel type, the
|
||||
connectivity is expressed in a standard fashion using ports as specified
|
||||
in the device graph bindings defined in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
ddc-i2c-bus:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Some panels expose EDID information through an I2C-compatible
|
||||
bus such as DDC2 or E-DDC. For such panels the ddc-i2c-bus contains a
|
||||
phandle to the system I2C controller connected to that bus.
|
||||
|
||||
no-hpd:
|
||||
type: boolean
|
||||
description:
|
||||
This panel is supposed to communicate that it's ready via HPD
|
||||
(hot plug detect) signal, but the signal isn't hooked up so we should
|
||||
hardcode the max delay from the panel spec when powering up the panel.
|
||||
|
||||
# Control I/Os
|
||||
|
||||
# Many display panels can be controlled through pins driven by GPIOs. The nature
|
||||
# and timing of those control signals are device-specific and left for panel
|
||||
# device tree bindings to specify. The following GPIO specifiers can however be
|
||||
# used for panels that implement compatible control signals.
|
||||
|
||||
enable-gpios:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Specifier for a GPIO connected to the panel enable control signal. The
|
||||
enable signal is active high and enables operation of the panel. This
|
||||
property can also be used for panels implementing an active low power down
|
||||
signal, which is a negated version of the enable signal. Active low enable
|
||||
signals (or active high power down signals) can be supported by inverting
|
||||
the GPIO specifier polarity flag.
|
||||
|
||||
Note that the enable signal control panel operation only and must not be
|
||||
confused with a backlight enable signal.
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
Specifier for a GPIO connected to the panel reset control signal.
|
||||
The reset signal is active low and resets the panel internal logic
|
||||
while active. Active high reset signals can be supported by inverting the
|
||||
GPIO specifier polarity flag.
|
||||
|
||||
# Power
|
||||
power-supply:
|
||||
description:
|
||||
Display panels require power to be supplied. While several panels need
|
||||
more than one power supply with panel-specific constraints governing the
|
||||
order and timings of the power supplies, in many cases a single power
|
||||
supply is sufficient, either because the panel has a single power rail, or
|
||||
because all its power rails can be driven by the same supply. In that case
|
||||
the power-supply property specifies the supply powering the panel as a
|
||||
phandle to a regulator.
|
||||
|
||||
# Backlight
|
||||
|
||||
# Most display panels include a backlight. Some of them also include a backlight
|
||||
# controller exposed through a control bus such as I2C or DSI. Others expose
|
||||
# backlight control through GPIO, PWM or other signals connected to an external
|
||||
# backlight controller.
|
||||
|
||||
backlight:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
For panels whose backlight is controlled by an external backlight
|
||||
controller, this property contains a phandle that references the
|
||||
controller.
|
||||
|
||||
dependencies:
|
||||
width-mm: [ height-mm ]
|
||||
height-mm: [ width-mm ]
|
||||
|
||||
...
|
||||
|
|
@ -1,121 +0,0 @@
|
|||
LVDS Display Panel
|
||||
==================
|
||||
|
||||
LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
|
||||
incompatible data link layers have been used over time to transmit image data
|
||||
to LVDS panels. This bindings supports display panels compatible with the
|
||||
following specifications.
|
||||
|
||||
[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
|
||||
1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
|
||||
[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
|
||||
Semiconductor
|
||||
[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
|
||||
Electronics Standards Association (VESA)
|
||||
|
||||
Device compatible with those specifications have been marketed under the
|
||||
FPD-Link and FlatLink brands.
|
||||
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Shall contain "panel-lvds" in addition to a mandatory
|
||||
panel-specific compatible string defined in individual panel bindings. The
|
||||
"panel-lvds" value shall never be used on its own.
|
||||
- width-mm: See panel-common.txt.
|
||||
- height-mm: See panel-common.txt.
|
||||
- data-mapping: The color signals mapping order, "jeida-18", "jeida-24"
|
||||
or "vesa-24".
|
||||
|
||||
Optional properties:
|
||||
|
||||
- label: See panel-common.txt.
|
||||
- gpios: See panel-common.txt.
|
||||
- backlight: See panel-common.txt.
|
||||
- power-supply: See panel-common.txt.
|
||||
- data-mirror: If set, reverse the bit order described in the data mappings
|
||||
below on all data lanes, transmitting bits for slots 6 to 0 instead of
|
||||
0 to 6.
|
||||
|
||||
Required nodes:
|
||||
|
||||
- panel-timing: See panel-common.txt.
|
||||
- ports: See panel-common.txt. These bindings require a single port subnode
|
||||
corresponding to the panel LVDS input.
|
||||
|
||||
|
||||
LVDS data mappings are defined as follows.
|
||||
|
||||
- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and
|
||||
[VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
|
||||
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
|
||||
|
||||
- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
|
||||
specifications. Data are transferred as follows on 4 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__><
|
||||
DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__><
|
||||
DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
|
||||
|
||||
- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
|
||||
Data are transferred as follows on 4 LVDS lanes.
|
||||
|
||||
Slot 0 1 2 3 4 5 6
|
||||
________________ _________________
|
||||
Clock \_______________________/
|
||||
______ ______ ______ ______ ______ ______ ______
|
||||
DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__><
|
||||
DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__><
|
||||
DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__><
|
||||
DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
|
||||
|
||||
Control signals are mapped as follows.
|
||||
|
||||
CTL0: HSync
|
||||
CTL1: VSync
|
||||
CTL2: Data Enable
|
||||
CTL3: 0
|
||||
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
panel {
|
||||
compatible = "mitsubishi,aa121td01", "panel-lvds";
|
||||
|
||||
width-mm = <261>;
|
||||
height-mm = <163>;
|
||||
|
||||
data-mapping = "jeida-24";
|
||||
|
||||
panel-timing {
|
||||
/* 1280x800 @60Hz */
|
||||
clock-frequency = <71000000>;
|
||||
hactive = <1280>;
|
||||
vactive = <800>;
|
||||
hsync-len = <70>;
|
||||
hfront-porch = <20>;
|
||||
hback-porch = <70>;
|
||||
vsync-len = <5>;
|
||||
vfront-porch = <3>;
|
||||
vback-porch = <15>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,4 +0,0 @@
|
|||
Common display properties
|
||||
-------------------------
|
||||
|
||||
- rotation: Display rotation in degrees counter clockwise (0,90,180,270)
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
PDA 91-00156-A0 5.0" WVGA TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "pda,91-00156-a0"
|
||||
- power-supply: this panel requires a single power supply. A phandle to a
|
||||
regulator needs to be specified here. Compatible with panel-common binding which
|
||||
is specified in the panel-common.txt in this directory.
|
||||
- backlight: this panel's backlight is controlled by an external backlight
|
||||
controller. A phandle to this controller needs to be specified here.
|
||||
Compatible with panel-common binding which is specified in the panel-common.txt
|
||||
in this directory.
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/pda,91-00156-a0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: PDA 91-00156-A0 5.0" WVGA TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Cristian Birsan <cristian.birsan@microchip.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: pda,91-00156-a0
|
||||
|
||||
power-supply: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
- backlight
|
||||
|
||||
...
|
||||
|
|
@ -1,49 +0,0 @@
|
|||
This binding covers the official 7" (800x480) Raspberry Pi touchscreen
|
||||
panel.
|
||||
|
||||
This DSI panel contains:
|
||||
|
||||
- TC358762 DSI->DPI bridge
|
||||
- Atmel microcontroller on I2C for power sequencing the DSI bridge and
|
||||
controlling backlight
|
||||
- Touchscreen controller on I2C for touch input
|
||||
|
||||
and this binding covers the DSI display parts but not its touch input.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "raspberrypi,7inch-touchscreen-panel"
|
||||
- reg: Must be "45"
|
||||
- port: See panel-common.txt
|
||||
|
||||
Example:
|
||||
|
||||
dsi1: dsi@7e700000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
<...>
|
||||
|
||||
port {
|
||||
dsi_out_port: endpoint {
|
||||
remote-endpoint = <&panel_dsi_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c_dsi: i2c {
|
||||
compatible = "i2c-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpios = <&gpio 28 0
|
||||
&gpio 29 0>;
|
||||
|
||||
lcd@45 {
|
||||
compatible = "raspberrypi,7inch-touchscreen-panel";
|
||||
reg = <0x45>;
|
||||
|
||||
port {
|
||||
panel_dsi_port: endpoint {
|
||||
remote-endpoint = <&dsi_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/raspberrypi,7inch-touchscreen.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: The official 7" (800x480) Raspberry Pi touchscreen
|
||||
|
||||
maintainers:
|
||||
- Eric Anholt <eric@anholt.net>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
description: |+
|
||||
This DSI panel contains:
|
||||
|
||||
- TC358762 DSI->DPI bridge
|
||||
- Atmel microcontroller on I2C for power sequencing the DSI bridge and
|
||||
controlling backlight
|
||||
- Touchscreen controller on I2C for touch input
|
||||
|
||||
and this binding covers the DSI display parts but not its touch input.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: raspberrypi,7inch-touchscreen-panel
|
||||
|
||||
reg:
|
||||
const: 0x45
|
||||
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |+
|
||||
dsi1: dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port {
|
||||
dsi_out_port: endpoint {
|
||||
remote-endpoint = <&panel_dsi_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c_dsi: i2c {
|
||||
compatible = "i2c-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
scl-gpios = <&gpio 28 0>;
|
||||
sda-gpios = <&gpio 29 0>;
|
||||
|
||||
lcd@45 {
|
||||
compatible = "raspberrypi,7inch-touchscreen-panel";
|
||||
reg = <0x45>;
|
||||
|
||||
port {
|
||||
panel_dsi_port: endpoint {
|
||||
remote-endpoint = <&dsi_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
|
||||
|
||||
Required properties:
|
||||
- compatible: "raydium,rm67191"
|
||||
- reg: virtual channel for MIPI-DSI protocol
|
||||
must be <0>
|
||||
- dsi-lanes: number of DSI lanes to be used
|
||||
must be <3> or <4>
|
||||
- port: input port node with endpoint definition as
|
||||
defined in Documentation/devicetree/bindings/graph.txt;
|
||||
the input port should be connected to a MIPI-DSI device
|
||||
driver
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: a GPIO spec for the RST_B GPIO pin
|
||||
- v3p3-supply: phandle to 3.3V regulator that powers the VDD_3V3 pin
|
||||
- v1p8-supply: phandle to 1.8V regulator that powers the VDD_1V8 pin
|
||||
- width-mm: see panel-common.txt
|
||||
- height-mm: see panel-common.txt
|
||||
- video-mode: 0 - burst-mode
|
||||
1 - non-burst with sync event
|
||||
2 - non-burst with sync pulse
|
||||
|
||||
Example:
|
||||
|
||||
panel@0 {
|
||||
compatible = "raydium,rm67191";
|
||||
reg = <0>;
|
||||
pinctrl-0 = <&pinctrl_mipi_dsi_0_1_en>;
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
dsi-lanes = <4>;
|
||||
width-mm = <68>;
|
||||
height-mm = <121>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&mipi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -5,6 +5,9 @@ Required properties:
|
|||
- reg: DSI virtual channel of the peripheral
|
||||
- reset-gpios: panel reset gpio
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- vcc-supply: phandle of the regulator that provides the vcc supply voltage.
|
||||
- iovcc-supply: phandle of the regulator that provides the iovcc supply
|
||||
voltage.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
@ -14,5 +17,7 @@ Example:
|
|||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
|
||||
vcc-supply = <®_2v8_p>;
|
||||
iovcc-supply = <®_1v8_p>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,41 +0,0 @@
|
|||
Solomon Goldentek Display GKTW70SDAE4SE LVDS Display Panel
|
||||
==========================================================
|
||||
|
||||
The GKTW70SDAE4SE is a 7" WVGA TFT-LCD display panel.
|
||||
|
||||
These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt
|
||||
with the following device-specific properties.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Shall contain "sgd,gktw70sdae4se" and "panel-lvds", in that order.
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
panel {
|
||||
compatible = "sgd,gktw70sdae4se", "panel-lvds";
|
||||
|
||||
width-mm = <153>;
|
||||
height-mm = <86>;
|
||||
|
||||
data-mapping = "jeida-18";
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <32000000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hback-porch = <39>;
|
||||
hfront-porch = <39>;
|
||||
vback-porch = <29>;
|
||||
vfront-porch = <13>;
|
||||
hsync-len = <47>;
|
||||
vsync-len = <2>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sgd,gktw70sdae4se.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: lvds.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: sgd,gktw70sdae4se
|
||||
- {} # panel-lvds, but not listed here to avoid false select
|
||||
|
||||
data-mapping:
|
||||
const: jeida-18
|
||||
|
||||
width-mm:
|
||||
const: 153
|
||||
|
||||
height-mm:
|
||||
const: 86
|
||||
|
||||
panel-timing: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |+
|
||||
panel {
|
||||
compatible = "sgd,gktw70sdae4se", "panel-lvds";
|
||||
|
||||
width-mm = <153>;
|
||||
height-mm = <86>;
|
||||
|
||||
data-mapping = "jeida-18";
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <32000000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hback-porch = <39>;
|
||||
hfront-porch = <39>;
|
||||
vback-porch = <29>;
|
||||
vfront-porch = <13>;
|
||||
hsync-len = <47>;
|
||||
vsync-len = <2>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds_encoder>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
Sharp LD-D5116Z01B 12.3" WUXGA+ eDP panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sharp,ld-d5116z01b"
|
||||
- power-supply: regulator to provide the VCC supply voltage (3.3 volts)
|
||||
|
||||
This binding is compatible with the simple-panel binding.
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [1]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
|
||||
Example:
|
||||
|
||||
panel: panel {
|
||||
compatible = "sharp,ld-d5116z01b";
|
||||
power-supply = <&vlcd_3v3>;
|
||||
|
||||
port {
|
||||
panel_ep: endpoint {
|
||||
remote-endpoint = <&bridge_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
Sharp LQ070Y3DG3B 7.0" WVGA landscape TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sharp,lq070y3dg3b"
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
Sharp 2.0" (240x160 pixels) 16-bit TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sharp,ls020b1dd01d"
|
||||
- power-supply: as specified in the base binding
|
||||
|
||||
Optional properties:
|
||||
- backlight: as specified in the base binding
|
||||
- enable-gpios: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -1,28 +1 @@
|
|||
Simple display panel
|
||||
====================
|
||||
|
||||
panel node
|
||||
----------
|
||||
|
||||
Required properties:
|
||||
- power-supply: See panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- no-hpd: This panel is supposed to communicate that it's ready via HPD
|
||||
(hot plug detect) signal, but the signal isn't hooked up so we should
|
||||
hardcode the max delay from the panel spec when powering up the panel.
|
||||
|
||||
Example:
|
||||
|
||||
panel: panel {
|
||||
compatible = "cptt,claa101wb01";
|
||||
ddc-i2c-bus = <&panelddc>;
|
||||
|
||||
power-supply = <&vdd_pnl_reg>;
|
||||
enable-gpios = <&gpio 90 0>;
|
||||
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
See panel-common.yaml in this directory.
|
||||
|
|
|
|||
|
|
@ -1,15 +0,0 @@
|
|||
TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with
|
||||
resistive touch
|
||||
|
||||
The panel is found on TI AM335x-evm.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "tfc,s9700rtwv43tr-01b"
|
||||
- power-supply: See panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel, if there is one
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/tfc,s9700rtwv43tr-01b.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with resistive touch
|
||||
|
||||
maintainers:
|
||||
- Jyri Sarha <jsarha@ti.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
description: |+
|
||||
The panel is found on TI AM335x-evm.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: tfc,s9700rtwv43tr-01b
|
||||
|
||||
enable-gpios: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
...
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
TPO TPG110 Panel
|
||||
================
|
||||
|
||||
This panel driver is a component that acts as an intermediary
|
||||
between an RGB output and a variety of panels. The panel
|
||||
driver is strapped up in electronics to the desired resolution
|
||||
and other properties, and has a control interface over 3WIRE
|
||||
SPI. By talking to the TPG110 over SPI, the strapped properties
|
||||
can be discovered and the hardware is therefore mostly
|
||||
self-describing.
|
||||
|
||||
+--------+
|
||||
SPI -> | TPO | -> physical display
|
||||
RGB -> | TPG110 |
|
||||
+--------+
|
||||
|
||||
If some electrical strap or alternate resolution is desired,
|
||||
this can be set up by taking software control of the display
|
||||
over the SPI interface. The interface can also adjust
|
||||
for properties of the display such as gamma correction and
|
||||
certain electrical driving levels.
|
||||
|
||||
The TPG110 does not know the physical dimensions of the panel
|
||||
connected, so this needs to be specified in the device tree.
|
||||
|
||||
It requires a GPIO line for control of its reset line.
|
||||
|
||||
The serial protocol has line names that resemble I2C but the
|
||||
protocol is not I2C but 3WIRE SPI.
|
||||
|
||||
Required properties:
|
||||
- compatible : one of:
|
||||
"ste,nomadik-nhk15-display", "tpo,tpg110"
|
||||
"tpo,tpg110"
|
||||
- grestb-gpios : panel reset GPIO
|
||||
- width-mm : see display/panel/panel-common.txt
|
||||
- height-mm : see display/panel/panel-common.txt
|
||||
|
||||
The device needs to be a child of an SPI bus, see
|
||||
spi/spi-bus.txt. The SPI child must set the following
|
||||
properties:
|
||||
- spi-3wire
|
||||
- spi-max-frequency = <3000000>;
|
||||
as these are characteristics of this device.
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in
|
||||
media/video-interfaces.txt. This node should describe panel's video bus.
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "tpo,tpg110";
|
||||
reg = <0>;
|
||||
spi-3wire;
|
||||
/* 320 ns min period ~= 3 MHz */
|
||||
spi-max-frequency = <3000000>;
|
||||
/* Width and height from data sheet */
|
||||
width-mm = <116>;
|
||||
height-mm = <87>;
|
||||
grestb-gpios = <&foo_gpio 5 GPIO_ACTIVE_LOW>;
|
||||
backlight = <&bl>;
|
||||
|
||||
port {
|
||||
nomadik_clcd_panel: endpoint {
|
||||
remote-endpoint = <&foo>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/tpo,tpg110.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TPO TPG110 Panel
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
description: |+
|
||||
This panel driver is a component that acts as an intermediary
|
||||
between an RGB output and a variety of panels. The panel
|
||||
driver is strapped up in electronics to the desired resolution
|
||||
and other properties, and has a control interface over 3WIRE
|
||||
SPI. By talking to the TPG110 over SPI, the strapped properties
|
||||
can be discovered and the hardware is therefore mostly
|
||||
self-describing.
|
||||
|
||||
+--------+
|
||||
SPI -> | TPO | -> physical display
|
||||
RGB -> | TPG110 |
|
||||
+--------+
|
||||
|
||||
If some electrical strap or alternate resolution is desired,
|
||||
this can be set up by taking software control of the display
|
||||
over the SPI interface. The interface can also adjust
|
||||
for properties of the display such as gamma correction and
|
||||
certain electrical driving levels.
|
||||
|
||||
The TPG110 does not know the physical dimensions of the panel
|
||||
connected, so this needs to be specified in the device tree.
|
||||
|
||||
It requires a GPIO line for control of its reset line.
|
||||
|
||||
The serial protocol has line names that resemble I2C but the
|
||||
protocol is not I2C but 3WIRE SPI.
|
||||
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- ste,nomadik-nhk15-display
|
||||
- const: tpo,tpg110
|
||||
- const: tpo,tpg110
|
||||
|
||||
reg: true
|
||||
|
||||
grestb-gpios:
|
||||
maxItems: 1
|
||||
description: panel reset GPIO
|
||||
|
||||
spi-3wire: true
|
||||
|
||||
spi-max-frequency:
|
||||
const: 3000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- grestb-gpios
|
||||
- width-mm
|
||||
- height-mm
|
||||
- spi-3wire
|
||||
- spi-max-frequency
|
||||
- port
|
||||
|
||||
examples:
|
||||
- |+
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "tpo,tpg110";
|
||||
reg = <0>;
|
||||
spi-3wire;
|
||||
/* 320 ns min period ~= 3 MHz */
|
||||
spi-max-frequency = <3000000>;
|
||||
/* Width and height from data sheet */
|
||||
width-mm = <116>;
|
||||
height-mm = <87>;
|
||||
grestb-gpios = <&foo_gpio 5 1>;
|
||||
backlight = <&bl>;
|
||||
|
||||
port {
|
||||
nomadik_clcd_panel: endpoint {
|
||||
remote-endpoint = <&foo>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -32,17 +32,6 @@ Their connections are modeled using the OF graph bindings specified in
|
|||
- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
|
||||
- video port 1 for either a panel or subsequent encoder
|
||||
|
||||
the lvds panel described by
|
||||
Documentation/devicetree/bindings/display/panel/simple-panel.txt
|
||||
|
||||
Panel required properties:
|
||||
- ports for remote LVDS output
|
||||
|
||||
Panel optional properties:
|
||||
- data-mapping: should be "vesa-24","jeida-24" or "jeida-18".
|
||||
This describes decribed by:
|
||||
Documentation/devicetree/bindings/display/panel/panel-lvds.txt
|
||||
|
||||
Example:
|
||||
|
||||
lvds_panel: lvds-panel {
|
||||
|
|
|
|||
|
|
@ -27,6 +27,15 @@ Optional properties:
|
|||
- solomon,prechargep2: Length of precharge period (phase 2) in clock cycles.
|
||||
This needs to be the higher, the higher the capacitance
|
||||
of the OLED's pixels is
|
||||
- solomon,dclk-div: Clock divisor 1 to 16
|
||||
- solomon,dclk-frq: Clock frequency 0 to 15, higher value means higher
|
||||
frequency
|
||||
- solomon,lookup-table: 8 bit value array of current drive pulse widths for
|
||||
BANK0, and colors A, B, and C. Each value in range
|
||||
of 31 to 63 for pulse widths of 32 to 64. Color D
|
||||
is always width 64.
|
||||
- solomon,area-color-enable: Display uses color mode
|
||||
- solomon,low-power. Display runs in low power mode
|
||||
|
||||
[0]: Documentation/devicetree/bindings/pwm/pwm.txt
|
||||
|
||||
|
|
@ -46,4 +55,5 @@ ssd1306: oled@3c {
|
|||
solomon,com-lrremap;
|
||||
solomon,com-invdir;
|
||||
solomon,com-offset = <32>;
|
||||
solomon,lookup-table = /bits/ 8 <0x3f 0x3f 0x3f 0x3f>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -11,7 +11,6 @@ GPU Driver Documentation
|
|||
meson
|
||||
pl111
|
||||
tegra
|
||||
tinydrm
|
||||
tve200
|
||||
v3d
|
||||
vc4
|
||||
|
|
|
|||
|
|
@ -263,6 +263,18 @@ the MST topology helpers easier to understand
|
|||
drm_dp_mst_topology_put_port
|
||||
drm_dp_mst_get_mstb_malloc drm_dp_mst_put_mstb_malloc
|
||||
|
||||
MIPI DBI Helper Functions Reference
|
||||
===================================
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_mipi_dbi.c
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: include/drm/drm_mipi_dbi.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_mipi_dbi.c
|
||||
:export:
|
||||
|
||||
MIPI DSI Helper Functions Reference
|
||||
===================================
|
||||
|
||||
|
|
|
|||
|
|
@ -433,43 +433,11 @@ PRIME is the cross device buffer sharing framework in drm, originally
|
|||
created for the OPTIMUS range of multi-gpu platforms. To userspace PRIME
|
||||
buffers are dma-buf based file descriptors.
|
||||
|
||||
Overview and Driver Interface
|
||||
-----------------------------
|
||||
Overview and Lifetime Rules
|
||||
---------------------------
|
||||
|
||||
Similar to GEM global names, PRIME file descriptors are also used to
|
||||
share buffer objects across processes. They offer additional security:
|
||||
as file descriptors must be explicitly sent over UNIX domain sockets to
|
||||
be shared between applications, they can't be guessed like the globally
|
||||
unique GEM names.
|
||||
|
||||
Drivers that support the PRIME API must set the DRIVER_PRIME bit in the
|
||||
struct :c:type:`struct drm_driver <drm_driver>`
|
||||
driver_features field, and implement the prime_handle_to_fd and
|
||||
prime_fd_to_handle operations.
|
||||
|
||||
int (\*prime_handle_to_fd)(struct drm_device \*dev, struct drm_file
|
||||
\*file_priv, uint32_t handle, uint32_t flags, int \*prime_fd); int
|
||||
(\*prime_fd_to_handle)(struct drm_device \*dev, struct drm_file
|
||||
\*file_priv, int prime_fd, uint32_t \*handle); Those two operations
|
||||
convert a handle to a PRIME file descriptor and vice versa. Drivers must
|
||||
use the kernel dma-buf buffer sharing framework to manage the PRIME file
|
||||
descriptors. Similar to the mode setting API PRIME is agnostic to the
|
||||
underlying buffer object manager, as long as handles are 32bit unsigned
|
||||
integers.
|
||||
|
||||
While non-GEM drivers must implement the operations themselves, GEM
|
||||
drivers must use the :c:func:`drm_gem_prime_handle_to_fd()` and
|
||||
:c:func:`drm_gem_prime_fd_to_handle()` helper functions. Those
|
||||
helpers rely on the driver gem_prime_export and gem_prime_import
|
||||
operations to create a dma-buf instance from a GEM object (dma-buf
|
||||
exporter role) and to create a GEM object from a dma-buf instance
|
||||
(dma-buf importer role).
|
||||
|
||||
struct dma_buf \* (\*gem_prime_export)(struct drm_device \*dev,
|
||||
struct drm_gem_object \*obj, int flags); struct drm_gem_object \*
|
||||
(\*gem_prime_import)(struct drm_device \*dev, struct dma_buf
|
||||
\*dma_buf); These two operations are mandatory for GEM drivers that
|
||||
support PRIME.
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_prime.c
|
||||
:doc: overview and lifetime rules
|
||||
|
||||
PRIME Helper Functions
|
||||
----------------------
|
||||
|
|
|
|||
|
|
@ -51,6 +51,22 @@ and "FIXME" where the interface could be cleaned up.
|
|||
|
||||
Also read the :ref:`guidelines for the kernel documentation at large <doc_guide>`.
|
||||
|
||||
Documentation Requirements for kAPI
|
||||
-----------------------------------
|
||||
|
||||
All kernel APIs exported to other modules must be documented, including their
|
||||
datastructures and at least a short introductory section explaining the overall
|
||||
concepts. Documentation should be put into the code itself as kerneldoc comments
|
||||
as much as reasonable.
|
||||
|
||||
Do not blindly document everything, but document only what's relevant for driver
|
||||
authors: Internal functions of drm.ko and definitely static functions should not
|
||||
have formal kerneldoc comments. Use normal C comments if you feel like a comment
|
||||
is warranted. You may use kerneldoc syntax in the comment, but it shall not
|
||||
start with a /** kerneldoc marker. Similar for data structures, annotate
|
||||
anything entirely private with ``/* private: */`` comments as per the
|
||||
documentation guide.
|
||||
|
||||
Getting Started
|
||||
===============
|
||||
|
||||
|
|
|
|||
|
|
@ -1,30 +0,0 @@
|
|||
============================
|
||||
drm/tinydrm Tiny DRM drivers
|
||||
============================
|
||||
|
||||
tinydrm is a collection of DRM drivers that are so small they can fit in a
|
||||
single source file.
|
||||
|
||||
Helpers
|
||||
=======
|
||||
|
||||
.. kernel-doc:: include/drm/tinydrm/tinydrm-helpers.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c
|
||||
:export:
|
||||
|
||||
MIPI DBI Compatible Controllers
|
||||
===============================
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/tinydrm/mipi-dbi.c
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: include/drm/tinydrm/mipi-dbi.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/tinydrm/mipi-dbi.c
|
||||
:export:
|
||||
|
|
@ -162,7 +162,7 @@ Clean up mmap forwarding
|
|||
|
||||
A lot of drivers forward gem mmap calls to dma-buf mmap for imported buffers.
|
||||
And also a lot of them forward dma-buf mmap to the gem mmap implementations.
|
||||
Would be great to refactor this all into a set of small common helpers.
|
||||
There's drm_gem_prime_mmap() for this now, but still needs to be rolled out.
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
|
|
@ -196,15 +196,6 @@ Might be good to also have some igt testcases for this.
|
|||
|
||||
Contact: Daniel Vetter, Noralf Tronnes
|
||||
|
||||
Remove the ->gem_prime_res_obj callback
|
||||
--------------------------------------------
|
||||
|
||||
The ->gem_prime_res_obj callback can be removed from drivers by using the
|
||||
reservation_object in the drm_gem_object. It may also be possible to use the
|
||||
generic drm_gem_reservation_object_wait helper for waiting for a bo.
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
idr_init_base()
|
||||
---------------
|
||||
|
||||
|
|
@ -215,22 +206,13 @@ efficient.
|
|||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Defaults for .gem_prime_import and export
|
||||
-----------------------------------------
|
||||
|
||||
Most drivers don't need to set drm_driver->gem_prime_import and
|
||||
->gem_prime_export now that drm_gem_prime_import() and drm_gem_prime_export()
|
||||
are the default.
|
||||
|
||||
struct drm_gem_object_funcs
|
||||
---------------------------
|
||||
|
||||
GEM objects can now have a function table instead of having the callbacks on the
|
||||
DRM driver struct. This is now the preferred way and drivers can be moved over.
|
||||
|
||||
DRM_GEM_CMA_VMAP_DRIVER_OPS, DRM_GEM_SHMEM_DRIVER_OPS already support this, but
|
||||
DRM_GEM_VRAM_DRIVER_PRIME does not yet and needs to be aligned with the previous
|
||||
two. We also need a 2nd version of the CMA define that doesn't require the
|
||||
We also need a 2nd version of the CMA define that doesn't require the
|
||||
vmapping to be present (different hook for prime importing). Plus this needs to
|
||||
be rolled out to all drivers using their own implementations, too.
|
||||
|
||||
|
|
@ -317,19 +299,6 @@ In the end no .c file should need to include ``drmP.h`` anymore.
|
|||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Add missing kerneldoc for exported functions
|
||||
--------------------------------------------
|
||||
|
||||
The DRM reference documentation is still lacking kerneldoc in a few areas. The
|
||||
task would be to clean up interfaces like moving functions around between
|
||||
files to better group them and improving the interfaces like dropping return
|
||||
values for functions that never fail. Then write kerneldoc for all exported
|
||||
functions and an overview section and integrate it all into the drm book.
|
||||
|
||||
See https://dri.freedesktop.org/docs/drm/ for what's there already.
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Make panic handling work
|
||||
------------------------
|
||||
|
||||
|
|
@ -393,6 +362,9 @@ There's a bunch of issues with it:
|
|||
this (together with the drm_minor->drm_device move) would allow us to remove
|
||||
debugfs_init.
|
||||
|
||||
- Drop the return code and error checking from all debugfs functions. Greg KH is
|
||||
working on this already.
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
KMS cleanups
|
||||
|
|
@ -440,39 +412,22 @@ fit the available time.
|
|||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Backlight Refactoring
|
||||
---------------------
|
||||
|
||||
Backlight drivers have a triple enable/disable state, which is a bit overkill.
|
||||
Plan to fix this:
|
||||
|
||||
1. Roll out backlight_enable() and backlight_disable() helpers everywhere. This
|
||||
has started already.
|
||||
2. In all, only look at one of the three status bits set by the above helpers.
|
||||
3. Remove the other two status bits.
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Driver Specific
|
||||
===============
|
||||
|
||||
tinydrm
|
||||
-------
|
||||
|
||||
Tinydrm is the helper driver for really simple fb drivers. The goal is to make
|
||||
those drivers as simple as possible, so lots of room for refactoring:
|
||||
|
||||
- backlight helpers, probably best to put them into a new drm_backlight.c.
|
||||
This is because drivers/video is de-facto unmaintained. We could also
|
||||
move drivers/video/backlight to drivers/gpu/backlight and take it all
|
||||
over within drm-misc, but that's more work. Backlight helpers require a fair
|
||||
bit of reworking and refactoring. A simple example is the enabling of a backlight.
|
||||
Tinydrm has helpers for this. It would be good if other drivers can also use the
|
||||
helper. However, there are various cases we need to consider i.e different
|
||||
drivers seem to have different ways of enabling/disabling a backlight.
|
||||
We also need to consider the backlight drivers (like gpio_backlight). The situation
|
||||
is further complicated by the fact that the backlight is tied to fbdev
|
||||
via fb_notifier_callback() which has complicated logic. For further details, refer
|
||||
to the following discussion thread:
|
||||
https://groups.google.com/forum/#!topic/outreachy-kernel/8rBe30lwtdA
|
||||
|
||||
- spi helpers, probably best put into spi core/helper code. Thierry said
|
||||
the spi maintainer is fast&reactive, so shouldn't be a big issue.
|
||||
|
||||
- extract the mipi-dbi helper (well, the non-tinydrm specific parts at
|
||||
least) into a separate helper, like we have for mipi-dsi already. Or follow
|
||||
one of the ideas for having a shared dsi/dbi helper, abstracting away the
|
||||
transport details more.
|
||||
|
||||
Contact: Noralf Trønnes, Daniel Vetter
|
||||
|
||||
AMD DC Display Driver
|
||||
---------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -1305,6 +1305,113 @@ The following tables list existing packed RGB formats.
|
|||
- g\ :sub:`6`
|
||||
- g\ :sub:`5`
|
||||
- g\ :sub:`4`
|
||||
* .. _MEDIA-BUS-FMT-RGB888-3X8:
|
||||
|
||||
- MEDIA_BUS_FMT_RGB888_3X8
|
||||
- 0x101c
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
- r\ :sub:`7`
|
||||
- r\ :sub:`6`
|
||||
- r\ :sub:`5`
|
||||
- r\ :sub:`4`
|
||||
- r\ :sub:`3`
|
||||
- r\ :sub:`2`
|
||||
- r\ :sub:`1`
|
||||
- r\ :sub:`0`
|
||||
* -
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
- g\ :sub:`7`
|
||||
- g\ :sub:`6`
|
||||
- g\ :sub:`5`
|
||||
- g\ :sub:`4`
|
||||
- g\ :sub:`3`
|
||||
- g\ :sub:`2`
|
||||
- g\ :sub:`1`
|
||||
- g\ :sub:`0`
|
||||
* -
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
- b\ :sub:`7`
|
||||
- b\ :sub:`6`
|
||||
- b\ :sub:`5`
|
||||
- b\ :sub:`4`
|
||||
- b\ :sub:`3`
|
||||
- b\ :sub:`2`
|
||||
- b\ :sub:`1`
|
||||
- b\ :sub:`0`
|
||||
* .. _MEDIA-BUS-FMT-ARGB888-1X32:
|
||||
|
||||
- MEDIA_BUS_FMT_ARGB888_1X32
|
||||
|
|
|
|||
44
MAINTAINERS
44
MAINTAINERS
|
|
@ -5099,17 +5099,24 @@ S: Maintained
|
|||
F: drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
|
||||
F: Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
|
||||
|
||||
DRM DRIVER FOR GRAIN MEDIA GM12U320 PROJECTORS
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tiny/gm12u320.c
|
||||
|
||||
DRM DRIVER FOR ILITEK ILI9225 PANELS
|
||||
M: David Lechner <david@lechnology.com>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/ili9225.c
|
||||
F: drivers/gpu/drm/tiny/ili9225.c
|
||||
F: Documentation/devicetree/bindings/display/ilitek,ili9225.txt
|
||||
|
||||
DRM DRIVER FOR HX8357D PANELS
|
||||
M: Eric Anholt <eric@anholt.net>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/hx8357d.c
|
||||
F: drivers/gpu/drm/tiny/hx8357d.c
|
||||
F: Documentation/devicetree/bindings/display/himax,hx8357d.txt
|
||||
|
||||
DRM DRIVER FOR INTEL I810 VIDEO CARDS
|
||||
|
|
@ -5129,8 +5136,9 @@ F: drivers/gpu/drm/mgag200/
|
|||
|
||||
DRM DRIVER FOR MI0283QT
|
||||
M: Noralf Trønnes <noralf@tronnes.org>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/mi0283qt.c
|
||||
F: drivers/gpu/drm/tiny/mi0283qt.c
|
||||
F: Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt
|
||||
|
||||
DRM DRIVER FOR MSM ADRENO GPU
|
||||
|
|
@ -5162,8 +5170,9 @@ F: Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
|
|||
|
||||
DRM DRIVER FOR PERVASIVE DISPLAYS REPAPER PANELS
|
||||
M: Noralf Trønnes <noralf@tronnes.org>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/repaper.c
|
||||
F: drivers/gpu/drm/tiny/repaper.c
|
||||
F: Documentation/devicetree/bindings/display/repaper.txt
|
||||
|
||||
DRM DRIVER FOR QEMU'S CIRRUS DEVICE
|
||||
|
|
@ -5185,6 +5194,12 @@ S: Maintained
|
|||
F: drivers/gpu/drm/qxl/
|
||||
F: include/uapi/drm/qxl_drm.h
|
||||
|
||||
DRM DRIVER FOR RAYDIUM RM67191 PANELS
|
||||
M: Robert Chiras <robert.chiras@nxp.com>
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/panel/panel-raydium-rm67191.c
|
||||
F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.txt
|
||||
|
||||
DRM DRIVER FOR RAGE 128 VIDEO CARDS
|
||||
S: Orphan / Obsolete
|
||||
F: drivers/gpu/drm/r128/
|
||||
|
|
@ -5192,6 +5207,7 @@ F: include/uapi/drm/r128_drm.h
|
|||
|
||||
DRM DRIVER FOR ROCKTECH JH057N00900 PANELS
|
||||
M: Guido Günther <agx@sigxcpu.org>
|
||||
R: Purism Kernel Team <kernel@puri.sm>
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
|
||||
F: Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
|
||||
|
|
@ -5214,14 +5230,16 @@ F: Documentation/devicetree/bindings/display/panel/sitronix,st7701.txt
|
|||
|
||||
DRM DRIVER FOR SITRONIX ST7586 PANELS
|
||||
M: David Lechner <david@lechnology.com>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/st7586.c
|
||||
F: drivers/gpu/drm/tiny/st7586.c
|
||||
F: Documentation/devicetree/bindings/display/sitronix,st7586.txt
|
||||
|
||||
DRM DRIVER FOR SITRONIX ST7735R PANELS
|
||||
M: David Lechner <david@lechnology.com>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/st7735r.c
|
||||
F: drivers/gpu/drm/tiny/st7735r.c
|
||||
F: Documentation/devicetree/bindings/display/sitronix,st7735r.txt
|
||||
|
||||
DRM DRIVER FOR ST-ERICSSON MCDE
|
||||
|
|
@ -5240,7 +5258,7 @@ M: Linus Walleij <linus.walleij@linaro.org>
|
|||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/panel/panel-tpo-tpg110.c
|
||||
F: Documentation/devicetree/bindings/display/panel/tpo,tpg110.txt
|
||||
F: Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml
|
||||
|
||||
DRM DRIVER FOR USB DISPLAYLINK VIDEO ADAPTERS
|
||||
M: Dave Airlie <airlied@redhat.com>
|
||||
|
|
@ -5328,6 +5346,7 @@ F: Documentation/gpu/meson.rst
|
|||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
||||
DRM DRIVERS FOR ATMEL HLCDC
|
||||
M: Sam Ravnborg <sam@ravnborg.org>
|
||||
M: Boris Brezillon <bbrezillon@kernel.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Supported
|
||||
|
|
@ -5337,7 +5356,10 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
|
|||
|
||||
DRM DRIVERS FOR BRIDGE CHIPS
|
||||
M: Andrzej Hajda <a.hajda@samsung.com>
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
R: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
|
||||
R: Jonas Karlman <jonas@kwiboo.se>
|
||||
R: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
F: drivers/gpu/drm/bridge/
|
||||
|
|
@ -5525,14 +5547,6 @@ F: drivers/gpu/drm/panel/
|
|||
F: include/drm/drm_panel.h
|
||||
F: Documentation/devicetree/bindings/display/panel/
|
||||
|
||||
DRM TINYDRM DRIVERS
|
||||
M: Noralf Trønnes <noralf@tronnes.org>
|
||||
W: https://github.com/notro/tinydrm/wiki/Development
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/tinydrm/
|
||||
F: include/drm/tinydrm/
|
||||
|
||||
DRM DRIVERS FOR XEN
|
||||
M: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
|
|||
|
|
@ -178,8 +178,30 @@ static bool dma_fence_chain_signaled(struct dma_fence *fence)
|
|||
static void dma_fence_chain_release(struct dma_fence *fence)
|
||||
{
|
||||
struct dma_fence_chain *chain = to_dma_fence_chain(fence);
|
||||
struct dma_fence *prev;
|
||||
|
||||
/* Manually unlink the chain as much as possible to avoid recursion
|
||||
* and potential stack overflow.
|
||||
*/
|
||||
while ((prev = rcu_dereference_protected(chain->prev, true))) {
|
||||
struct dma_fence_chain *prev_chain;
|
||||
|
||||
if (kref_read(&prev->refcount) > 1)
|
||||
break;
|
||||
|
||||
prev_chain = to_dma_fence_chain(prev);
|
||||
if (!prev_chain)
|
||||
break;
|
||||
|
||||
/* No need for atomic operations since we hold the last
|
||||
* reference to prev_chain.
|
||||
*/
|
||||
chain->prev = prev_chain->prev;
|
||||
RCU_INIT_POINTER(prev_chain->prev, NULL);
|
||||
dma_fence_put(prev);
|
||||
}
|
||||
dma_fence_put(prev);
|
||||
|
||||
dma_fence_put(rcu_dereference_protected(chain->prev, true));
|
||||
dma_fence_put(chain->fence);
|
||||
dma_fence_free(fence);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -55,6 +55,85 @@ EXPORT_SYMBOL(reservation_seqcount_class);
|
|||
const char reservation_seqcount_string[] = "reservation_seqcount";
|
||||
EXPORT_SYMBOL(reservation_seqcount_string);
|
||||
|
||||
/**
|
||||
* reservation_object_list_alloc - allocate fence list
|
||||
* @shared_max: number of fences we need space for
|
||||
*
|
||||
* Allocate a new reservation_object_list and make sure to correctly initialize
|
||||
* shared_max.
|
||||
*/
|
||||
static struct reservation_object_list *
|
||||
reservation_object_list_alloc(unsigned int shared_max)
|
||||
{
|
||||
struct reservation_object_list *list;
|
||||
|
||||
list = kmalloc(offsetof(typeof(*list), shared[shared_max]), GFP_KERNEL);
|
||||
if (!list)
|
||||
return NULL;
|
||||
|
||||
list->shared_max = (ksize(list) - offsetof(typeof(*list), shared)) /
|
||||
sizeof(*list->shared);
|
||||
|
||||
return list;
|
||||
}
|
||||
|
||||
/**
|
||||
* reservation_object_list_free - free fence list
|
||||
* @list: list to free
|
||||
*
|
||||
* Free a reservation_object_list and make sure to drop all references.
|
||||
*/
|
||||
static void reservation_object_list_free(struct reservation_object_list *list)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
if (!list)
|
||||
return;
|
||||
|
||||
for (i = 0; i < list->shared_count; ++i)
|
||||
dma_fence_put(rcu_dereference_protected(list->shared[i], true));
|
||||
|
||||
kfree_rcu(list, rcu);
|
||||
}
|
||||
|
||||
/**
|
||||
* reservation_object_init - initialize a reservation object
|
||||
* @obj: the reservation object
|
||||
*/
|
||||
void reservation_object_init(struct reservation_object *obj)
|
||||
{
|
||||
ww_mutex_init(&obj->lock, &reservation_ww_class);
|
||||
|
||||
__seqcount_init(&obj->seq, reservation_seqcount_string,
|
||||
&reservation_seqcount_class);
|
||||
RCU_INIT_POINTER(obj->fence, NULL);
|
||||
RCU_INIT_POINTER(obj->fence_excl, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL(reservation_object_init);
|
||||
|
||||
/**
|
||||
* reservation_object_fini - destroys a reservation object
|
||||
* @obj: the reservation object
|
||||
*/
|
||||
void reservation_object_fini(struct reservation_object *obj)
|
||||
{
|
||||
struct reservation_object_list *fobj;
|
||||
struct dma_fence *excl;
|
||||
|
||||
/*
|
||||
* This object should be dead and all references must have
|
||||
* been released to it, so no need to be protected with rcu.
|
||||
*/
|
||||
excl = rcu_dereference_protected(obj->fence_excl, 1);
|
||||
if (excl)
|
||||
dma_fence_put(excl);
|
||||
|
||||
fobj = rcu_dereference_protected(obj->fence, 1);
|
||||
reservation_object_list_free(fobj);
|
||||
ww_mutex_destroy(&obj->lock);
|
||||
}
|
||||
EXPORT_SYMBOL(reservation_object_fini);
|
||||
|
||||
/**
|
||||
* reservation_object_reserve_shared - Reserve space to add shared fences to
|
||||
* a reservation_object.
|
||||
|
|
@ -87,7 +166,7 @@ int reservation_object_reserve_shared(struct reservation_object *obj,
|
|||
max = 4;
|
||||
}
|
||||
|
||||
new = kmalloc(offsetof(typeof(*new), shared[max]), GFP_KERNEL);
|
||||
new = reservation_object_list_alloc(max);
|
||||
if (!new)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -108,23 +187,22 @@ int reservation_object_reserve_shared(struct reservation_object *obj,
|
|||
RCU_INIT_POINTER(new->shared[j++], fence);
|
||||
}
|
||||
new->shared_count = j;
|
||||
new->shared_max = max;
|
||||
|
||||
preempt_disable();
|
||||
write_seqcount_begin(&obj->seq);
|
||||
/*
|
||||
* RCU_INIT_POINTER can be used here,
|
||||
* seqcount provides the necessary barriers
|
||||
* We are not changing the effective set of fences here so can
|
||||
* merely update the pointer to the new array; both existing
|
||||
* readers and new readers will see exactly the same set of
|
||||
* active (unsignaled) shared fences. Individual fences and the
|
||||
* old array are protected by RCU and so will not vanish under
|
||||
* the gaze of the rcu_read_lock() readers.
|
||||
*/
|
||||
RCU_INIT_POINTER(obj->fence, new);
|
||||
write_seqcount_end(&obj->seq);
|
||||
preempt_enable();
|
||||
rcu_assign_pointer(obj->fence, new);
|
||||
|
||||
if (!old)
|
||||
return 0;
|
||||
|
||||
/* Drop the references to the signaled fences */
|
||||
for (i = k; i < new->shared_max; ++i) {
|
||||
for (i = k; i < max; ++i) {
|
||||
struct dma_fence *fence;
|
||||
|
||||
fence = rcu_dereference_protected(new->shared[i],
|
||||
|
|
@ -149,6 +227,7 @@ void reservation_object_add_shared_fence(struct reservation_object *obj,
|
|||
struct dma_fence *fence)
|
||||
{
|
||||
struct reservation_object_list *fobj;
|
||||
struct dma_fence *old;
|
||||
unsigned int i, count;
|
||||
|
||||
dma_fence_get(fence);
|
||||
|
|
@ -162,18 +241,16 @@ void reservation_object_add_shared_fence(struct reservation_object *obj,
|
|||
write_seqcount_begin(&obj->seq);
|
||||
|
||||
for (i = 0; i < count; ++i) {
|
||||
struct dma_fence *old_fence;
|
||||
|
||||
old_fence = rcu_dereference_protected(fobj->shared[i],
|
||||
reservation_object_held(obj));
|
||||
if (old_fence->context == fence->context ||
|
||||
dma_fence_is_signaled(old_fence)) {
|
||||
dma_fence_put(old_fence);
|
||||
old = rcu_dereference_protected(fobj->shared[i],
|
||||
reservation_object_held(obj));
|
||||
if (old->context == fence->context ||
|
||||
dma_fence_is_signaled(old))
|
||||
goto replace;
|
||||
}
|
||||
}
|
||||
|
||||
BUG_ON(fobj->shared_count >= fobj->shared_max);
|
||||
old = NULL;
|
||||
count++;
|
||||
|
||||
replace:
|
||||
|
|
@ -183,6 +260,7 @@ replace:
|
|||
|
||||
write_seqcount_end(&obj->seq);
|
||||
preempt_enable();
|
||||
dma_fence_put(old);
|
||||
}
|
||||
EXPORT_SYMBOL(reservation_object_add_shared_fence);
|
||||
|
||||
|
|
@ -239,7 +317,6 @@ int reservation_object_copy_fences(struct reservation_object *dst,
|
|||
{
|
||||
struct reservation_object_list *src_list, *dst_list;
|
||||
struct dma_fence *old, *new;
|
||||
size_t size;
|
||||
unsigned i;
|
||||
|
||||
reservation_object_assert_held(dst);
|
||||
|
|
@ -251,10 +328,9 @@ retry:
|
|||
if (src_list) {
|
||||
unsigned shared_count = src_list->shared_count;
|
||||
|
||||
size = offsetof(typeof(*src_list), shared[shared_count]);
|
||||
rcu_read_unlock();
|
||||
|
||||
dst_list = kmalloc(size, GFP_KERNEL);
|
||||
dst_list = reservation_object_list_alloc(shared_count);
|
||||
if (!dst_list)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -266,7 +342,6 @@ retry:
|
|||
}
|
||||
|
||||
dst_list->shared_count = 0;
|
||||
dst_list->shared_max = shared_count;
|
||||
for (i = 0; i < src_list->shared_count; ++i) {
|
||||
struct dma_fence *fence;
|
||||
|
||||
|
|
@ -276,7 +351,7 @@ retry:
|
|||
continue;
|
||||
|
||||
if (!dma_fence_get_rcu(fence)) {
|
||||
kfree(dst_list);
|
||||
reservation_object_list_free(dst_list);
|
||||
src_list = rcu_dereference(src->fence);
|
||||
goto retry;
|
||||
}
|
||||
|
|
@ -306,8 +381,7 @@ retry:
|
|||
write_seqcount_end(&dst->seq);
|
||||
preempt_enable();
|
||||
|
||||
if (src_list)
|
||||
kfree_rcu(src_list, rcu);
|
||||
reservation_object_list_free(src_list);
|
||||
dma_fence_put(old);
|
||||
|
||||
return 0;
|
||||
|
|
@ -385,13 +459,6 @@ int reservation_object_get_fences_rcu(struct reservation_object *obj,
|
|||
if (!dma_fence_get_rcu(shared[i]))
|
||||
break;
|
||||
}
|
||||
|
||||
if (!pfence_excl && fence_excl) {
|
||||
shared[i] = fence_excl;
|
||||
fence_excl = NULL;
|
||||
++i;
|
||||
++shared_count;
|
||||
}
|
||||
}
|
||||
|
||||
if (i != shared_count || read_seqcount_retry(&obj->seq, seq)) {
|
||||
|
|
@ -406,6 +473,11 @@ unlock:
|
|||
rcu_read_unlock();
|
||||
} while (ret);
|
||||
|
||||
if (pfence_excl)
|
||||
*pfence_excl = fence_excl;
|
||||
else if (fence_excl)
|
||||
shared[++shared_count] = fence_excl;
|
||||
|
||||
if (!shared_count) {
|
||||
kfree(shared);
|
||||
shared = NULL;
|
||||
|
|
@ -413,9 +485,6 @@ unlock:
|
|||
|
||||
*pshared_count = shared_count;
|
||||
*pshared = shared;
|
||||
if (pfence_excl)
|
||||
*pfence_excl = fence_excl;
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(reservation_object_get_fences_rcu);
|
||||
|
|
|
|||
|
|
@ -24,6 +24,10 @@ menuconfig DRM
|
|||
details. You should also select and configure AGP
|
||||
(/dev/agpgart) support if it is available for your platform.
|
||||
|
||||
config DRM_MIPI_DBI
|
||||
tristate
|
||||
depends on DRM
|
||||
|
||||
config DRM_MIPI_DSI
|
||||
bool
|
||||
depends on DRM
|
||||
|
|
@ -336,7 +340,7 @@ source "drivers/gpu/drm/mxsfb/Kconfig"
|
|||
|
||||
source "drivers/gpu/drm/meson/Kconfig"
|
||||
|
||||
source "drivers/gpu/drm/tinydrm/Kconfig"
|
||||
source "drivers/gpu/drm/tiny/Kconfig"
|
||||
|
||||
source "drivers/gpu/drm/pl111/Kconfig"
|
||||
|
||||
|
|
|
|||
|
|
@ -55,6 +55,7 @@ obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
|
|||
obj-$(CONFIG_DRM_DEBUG_SELFTEST) += selftests/
|
||||
|
||||
obj-$(CONFIG_DRM) += drm.o
|
||||
obj-$(CONFIG_DRM_MIPI_DBI) += drm_mipi_dbi.o
|
||||
obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
|
||||
obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o
|
||||
obj-y += arm/
|
||||
|
|
@ -111,7 +112,7 @@ obj-$(CONFIG_DRM_ARCPGU)+= arc/
|
|||
obj-y += hisilicon/
|
||||
obj-$(CONFIG_DRM_ZTE) += zte/
|
||||
obj-$(CONFIG_DRM_MXSFB) += mxsfb/
|
||||
obj-$(CONFIG_DRM_TINYDRM) += tinydrm/
|
||||
obj-y += tiny/
|
||||
obj-$(CONFIG_DRM_PL111) += pl111/
|
||||
obj-$(CONFIG_DRM_TVE200) += tve200/
|
||||
obj-$(CONFIG_DRM_XEN) += xen/
|
||||
|
|
|
|||
|
|
@ -218,7 +218,7 @@ void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo)
|
|||
static int amdgpu_amdkfd_remove_eviction_fence(struct amdgpu_bo *bo,
|
||||
struct amdgpu_amdkfd_fence *ef)
|
||||
{
|
||||
struct reservation_object *resv = bo->tbo.resv;
|
||||
struct reservation_object *resv = bo->tbo.base.resv;
|
||||
struct reservation_object_list *old, *new;
|
||||
unsigned int i, j, k;
|
||||
|
||||
|
|
@ -812,7 +812,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
|
|||
struct amdgpu_bo *pd = peer_vm->root.base.bo;
|
||||
|
||||
ret = amdgpu_sync_resv(NULL,
|
||||
sync, pd->tbo.resv,
|
||||
sync, pd->tbo.base.resv,
|
||||
AMDGPU_FENCE_OWNER_KFD, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -887,7 +887,7 @@ static int init_kfd_vm(struct amdgpu_vm *vm, void **process_info,
|
|||
AMDGPU_FENCE_OWNER_KFD, false);
|
||||
if (ret)
|
||||
goto wait_pd_fail;
|
||||
ret = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv, 1);
|
||||
ret = reservation_object_reserve_shared(vm->root.base.bo->tbo.base.resv, 1);
|
||||
if (ret)
|
||||
goto reserve_shared_fail;
|
||||
amdgpu_bo_fence(vm->root.base.bo,
|
||||
|
|
@ -2133,7 +2133,7 @@ int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem
|
|||
* Add process eviction fence to bo so they can
|
||||
* evict each other.
|
||||
*/
|
||||
ret = reservation_object_reserve_shared(gws_bo->tbo.resv, 1);
|
||||
ret = reservation_object_reserve_shared(gws_bo->tbo.base.resv, 1);
|
||||
if (ret)
|
||||
goto reserve_shared_fail;
|
||||
amdgpu_bo_fence(gws_bo, &process_info->eviction_fence->base, true);
|
||||
|
|
|
|||
|
|
@ -1505,6 +1505,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
struct amdgpu_connector_atom_dig *amdgpu_dig_connector;
|
||||
struct drm_encoder *encoder;
|
||||
struct amdgpu_encoder *amdgpu_encoder;
|
||||
struct i2c_adapter *ddc = NULL;
|
||||
uint32_t subpixel_order = SubPixelNone;
|
||||
bool shared_ddc = false;
|
||||
bool is_dp_bridge = false;
|
||||
|
|
@ -1574,17 +1575,21 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (amdgpu_connector->ddc_bus)
|
||||
if (amdgpu_connector->ddc_bus) {
|
||||
has_aux = true;
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
} else {
|
||||
DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
}
|
||||
}
|
||||
switch (connector_type) {
|
||||
case DRM_MODE_CONNECTOR_VGA:
|
||||
case DRM_MODE_CONNECTOR_DVIA:
|
||||
default:
|
||||
drm_connector_init(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_funcs, connector_type);
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_helper_funcs);
|
||||
connector->interlace_allowed = true;
|
||||
|
|
@ -1602,8 +1607,10 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
case DRM_MODE_CONNECTOR_HDMIA:
|
||||
case DRM_MODE_CONNECTOR_HDMIB:
|
||||
case DRM_MODE_CONNECTOR_DisplayPort:
|
||||
drm_connector_init(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_funcs, connector_type);
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_helper_funcs);
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
|
|
@ -1644,8 +1651,10 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
break;
|
||||
case DRM_MODE_CONNECTOR_LVDS:
|
||||
case DRM_MODE_CONNECTOR_eDP:
|
||||
drm_connector_init(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_edp_funcs, connector_type);
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_edp_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_helper_funcs);
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
|
|
@ -1659,13 +1668,18 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
} else {
|
||||
switch (connector_type) {
|
||||
case DRM_MODE_CONNECTOR_VGA:
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (!amdgpu_connector->ddc_bus)
|
||||
DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_vga_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
|
||||
amdgpu_connector->dac_load_detect = true;
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.load_detect_property,
|
||||
|
|
@ -1679,13 +1693,18 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
connector->doublescan_allowed = true;
|
||||
break;
|
||||
case DRM_MODE_CONNECTOR_DVIA:
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (!amdgpu_connector->ddc_bus)
|
||||
DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_vga_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
|
||||
amdgpu_connector->dac_load_detect = true;
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.load_detect_property,
|
||||
|
|
@ -1704,13 +1723,18 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
if (!amdgpu_dig_connector)
|
||||
goto failed;
|
||||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (!amdgpu_connector->ddc_bus)
|
||||
DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dvi_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
|
||||
subpixel_order = SubPixelHorizontalRGB;
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.coherent_mode_property,
|
||||
|
|
@ -1754,13 +1778,18 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
if (!amdgpu_dig_connector)
|
||||
goto failed;
|
||||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (!amdgpu_connector->ddc_bus)
|
||||
DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dvi_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.coherent_mode_property,
|
||||
1);
|
||||
|
|
@ -1796,15 +1825,20 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
if (!amdgpu_dig_connector)
|
||||
goto failed;
|
||||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dp_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (amdgpu_connector->ddc_bus)
|
||||
if (amdgpu_connector->ddc_bus) {
|
||||
has_aux = true;
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
} else {
|
||||
DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
}
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_dp_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
|
||||
subpixel_order = SubPixelHorizontalRGB;
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.coherent_mode_property,
|
||||
|
|
@ -1838,15 +1872,20 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
if (!amdgpu_dig_connector)
|
||||
goto failed;
|
||||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_edp_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (amdgpu_connector->ddc_bus)
|
||||
if (amdgpu_connector->ddc_bus) {
|
||||
has_aux = true;
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
} else {
|
||||
DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
}
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_edp_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
dev->mode_config.scaling_mode_property,
|
||||
DRM_MODE_SCALE_FULLSCREEN);
|
||||
|
|
@ -1859,13 +1898,18 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
|||
if (!amdgpu_dig_connector)
|
||||
goto failed;
|
||||
amdgpu_connector->con_priv = amdgpu_dig_connector;
|
||||
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_lvds_funcs, connector_type);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs);
|
||||
if (i2c_bus->valid) {
|
||||
amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
|
||||
if (!amdgpu_connector->ddc_bus)
|
||||
DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
|
||||
else
|
||||
ddc = &amdgpu_connector->ddc_bus->adapter;
|
||||
}
|
||||
drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
|
||||
&amdgpu_connector_lvds_funcs,
|
||||
connector_type,
|
||||
ddc);
|
||||
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs);
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
dev->mode_config.scaling_mode_property,
|
||||
DRM_MODE_SCALE_FULLSCREEN);
|
||||
|
|
|
|||
|
|
@ -402,7 +402,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
|
|||
struct ttm_operation_ctx ctx = {
|
||||
.interruptible = true,
|
||||
.no_wait_gpu = false,
|
||||
.resv = bo->tbo.resv,
|
||||
.resv = bo->tbo.base.resv,
|
||||
.flags = 0
|
||||
};
|
||||
uint32_t domain;
|
||||
|
|
@ -730,7 +730,7 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
|
|||
|
||||
list_for_each_entry(e, &p->validated, tv.head) {
|
||||
struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
|
||||
struct reservation_object *resv = bo->tbo.resv;
|
||||
struct reservation_object *resv = bo->tbo.base.resv;
|
||||
|
||||
r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp,
|
||||
amdgpu_bo_explicit_sync(bo));
|
||||
|
|
@ -1727,7 +1727,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
|
|||
*map = mapping;
|
||||
|
||||
/* Double check that the BO is reserved by this CS */
|
||||
if (READ_ONCE((*bo)->tbo.resv->lock.ctx) != &parser->ticket)
|
||||
if (reservation_object_locking_ctx((*bo)->tbo.base.resv) != &parser->ticket)
|
||||
return -EINVAL;
|
||||
|
||||
if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {
|
||||
|
|
|
|||
|
|
@ -204,7 +204,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
|
|||
goto unpin;
|
||||
}
|
||||
|
||||
r = reservation_object_get_fences_rcu(new_abo->tbo.resv, &work->excl,
|
||||
r = reservation_object_get_fences_rcu(new_abo->tbo.base.resv, &work->excl,
|
||||
&work->shared_count,
|
||||
&work->shared);
|
||||
if (unlikely(r != 0)) {
|
||||
|
|
|
|||
|
|
@ -216,7 +216,7 @@ static int amdgpu_dma_buf_map_attach(struct dma_buf *dma_buf,
|
|||
* fences on the reservation object into a single exclusive
|
||||
* fence.
|
||||
*/
|
||||
r = __reservation_object_make_exclusive(bo->tbo.resv);
|
||||
r = __reservation_object_make_exclusive(bo->tbo.base.resv);
|
||||
if (r)
|
||||
goto error_unreserve;
|
||||
}
|
||||
|
|
@ -267,20 +267,6 @@ error:
|
|||
drm_gem_map_detach(dma_buf, attach);
|
||||
}
|
||||
|
||||
/**
|
||||
* amdgpu_gem_prime_res_obj - &drm_driver.gem_prime_res_obj implementation
|
||||
* @obj: GEM BO
|
||||
*
|
||||
* Returns:
|
||||
* The BO's reservation object.
|
||||
*/
|
||||
struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
|
||||
{
|
||||
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
|
||||
|
||||
return bo->tbo.resv;
|
||||
}
|
||||
|
||||
/**
|
||||
* amdgpu_dma_buf_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation
|
||||
* @dma_buf: Shared DMA buffer
|
||||
|
|
@ -339,14 +325,12 @@ const struct dma_buf_ops amdgpu_dmabuf_ops = {
|
|||
* @gobj: GEM BO
|
||||
* @flags: Flags such as DRM_CLOEXEC and DRM_RDWR.
|
||||
*
|
||||
* The main work is done by the &drm_gem_prime_export helper, which in turn
|
||||
* uses &amdgpu_gem_prime_res_obj.
|
||||
* The main work is done by the &drm_gem_prime_export helper.
|
||||
*
|
||||
* Returns:
|
||||
* Shared DMA buffer representing the GEM BO from the given device.
|
||||
*/
|
||||
struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
|
||||
struct drm_gem_object *gobj,
|
||||
struct dma_buf *amdgpu_gem_prime_export(struct drm_gem_object *gobj,
|
||||
int flags)
|
||||
{
|
||||
struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
|
||||
|
|
@ -356,9 +340,9 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
|
|||
bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
|
||||
return ERR_PTR(-EPERM);
|
||||
|
||||
buf = drm_gem_prime_export(dev, gobj, flags);
|
||||
buf = drm_gem_prime_export(gobj, flags);
|
||||
if (!IS_ERR(buf)) {
|
||||
buf->file->f_mapping = dev->anon_inode->i_mapping;
|
||||
buf->file->f_mapping = gobj->dev->anon_inode->i_mapping;
|
||||
buf->ops = &amdgpu_dmabuf_ops;
|
||||
}
|
||||
|
||||
|
|
@ -396,7 +380,7 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
|
|||
bp.flags = 0;
|
||||
bp.type = ttm_bo_type_sg;
|
||||
bp.resv = resv;
|
||||
ww_mutex_lock(&resv->lock, NULL);
|
||||
reservation_object_lock(resv, NULL);
|
||||
ret = amdgpu_bo_create(adev, &bp, &bo);
|
||||
if (ret)
|
||||
goto error;
|
||||
|
|
@ -408,11 +392,11 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
|
|||
if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
|
||||
bo->prime_shared_count = 1;
|
||||
|
||||
ww_mutex_unlock(&resv->lock);
|
||||
return &bo->gem_base;
|
||||
reservation_object_unlock(resv);
|
||||
return &bo->tbo.base;
|
||||
|
||||
error:
|
||||
ww_mutex_unlock(&resv->lock);
|
||||
reservation_object_unlock(resv);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -30,12 +30,10 @@ struct drm_gem_object *
|
|||
amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
|
||||
struct dma_buf_attachment *attach,
|
||||
struct sg_table *sg);
|
||||
struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
|
||||
struct drm_gem_object *gobj,
|
||||
struct dma_buf *amdgpu_gem_prime_export(struct drm_gem_object *gobj,
|
||||
int flags);
|
||||
struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
|
||||
struct dma_buf *dma_buf);
|
||||
struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
|
||||
void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
|
||||
void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
|
||||
int amdgpu_gem_prime_mmap(struct drm_gem_object *obj,
|
||||
|
|
|
|||
|
|
@ -1373,7 +1373,7 @@ static struct drm_driver kms_driver = {
|
|||
.driver_features =
|
||||
DRIVER_USE_AGP | DRIVER_ATOMIC |
|
||||
DRIVER_GEM |
|
||||
DRIVER_PRIME | DRIVER_RENDER | DRIVER_MODESET | DRIVER_SYNCOBJ,
|
||||
DRIVER_RENDER | DRIVER_MODESET | DRIVER_SYNCOBJ,
|
||||
.load = amdgpu_driver_load_kms,
|
||||
.open = amdgpu_driver_open_kms,
|
||||
.postclose = amdgpu_driver_postclose_kms,
|
||||
|
|
@ -1397,7 +1397,6 @@ static struct drm_driver kms_driver = {
|
|||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_export = amdgpu_gem_prime_export,
|
||||
.gem_prime_import = amdgpu_gem_prime_import,
|
||||
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
|
||||
.gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
|
||||
.gem_prime_vmap = amdgpu_gem_prime_vmap,
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ retry:
|
|||
}
|
||||
return r;
|
||||
}
|
||||
*obj = &bo->gem_base;
|
||||
*obj = &bo->tbo.base;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -134,7 +134,7 @@ int amdgpu_gem_object_open(struct drm_gem_object *obj,
|
|||
return -EPERM;
|
||||
|
||||
if (abo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID &&
|
||||
abo->tbo.resv != vm->root.base.bo->tbo.resv)
|
||||
abo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
|
||||
return -EPERM;
|
||||
|
||||
r = amdgpu_bo_reserve(abo, false);
|
||||
|
|
@ -252,7 +252,7 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
|
|||
if (r)
|
||||
return r;
|
||||
|
||||
resv = vm->root.base.bo->tbo.resv;
|
||||
resv = vm->root.base.bo->tbo.base.resv;
|
||||
}
|
||||
|
||||
r = amdgpu_gem_object_create(adev, size, args->in.alignment,
|
||||
|
|
@ -433,7 +433,7 @@ int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
|
|||
return -ENOENT;
|
||||
}
|
||||
robj = gem_to_amdgpu_bo(gobj);
|
||||
ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true,
|
||||
ret = reservation_object_wait_timeout_rcu(robj->tbo.base.resv, true, true,
|
||||
timeout);
|
||||
|
||||
/* ret == 0 means not signaled,
|
||||
|
|
@ -689,7 +689,7 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
|
|||
struct drm_amdgpu_gem_create_in info;
|
||||
void __user *out = u64_to_user_ptr(args->value);
|
||||
|
||||
info.bo_size = robj->gem_base.size;
|
||||
info.bo_size = robj->tbo.base.size;
|
||||
info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
|
||||
info.domains = robj->preferred_domains;
|
||||
info.domain_flags = robj->flags;
|
||||
|
|
@ -819,8 +819,8 @@ static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data)
|
|||
if (pin_count)
|
||||
seq_printf(m, " pin count %d", pin_count);
|
||||
|
||||
dma_buf = READ_ONCE(bo->gem_base.dma_buf);
|
||||
attachment = READ_ONCE(bo->gem_base.import_attach);
|
||||
dma_buf = READ_ONCE(bo->tbo.base.dma_buf);
|
||||
attachment = READ_ONCE(bo->tbo.base.import_attach);
|
||||
|
||||
if (attachment)
|
||||
seq_printf(m, " imported from %p", dma_buf);
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
*/
|
||||
|
||||
#define AMDGPU_GEM_DOMAIN_MAX 0x3
|
||||
#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, gem_base)
|
||||
#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base)
|
||||
|
||||
void amdgpu_gem_object_free(struct drm_gem_object *obj);
|
||||
int amdgpu_gem_object_open(struct drm_gem_object *obj,
|
||||
|
|
|
|||
|
|
@ -1088,7 +1088,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
|
|||
amdgpu_vm_fini(adev, &fpriv->vm);
|
||||
|
||||
if (pasid)
|
||||
amdgpu_pasid_free_delayed(pd->tbo.resv, pasid);
|
||||
amdgpu_pasid_free_delayed(pd->tbo.base.resv, pasid);
|
||||
amdgpu_bo_unref(&pd);
|
||||
|
||||
idr_for_each_entry(&fpriv->bo_list_handles, list, handle)
|
||||
|
|
|
|||
|
|
@ -179,7 +179,7 @@ static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
|
|||
if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
|
||||
continue;
|
||||
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.base.resv,
|
||||
true, false, MAX_SCHEDULE_TIMEOUT);
|
||||
if (r <= 0)
|
||||
DRM_ERROR("(%ld) failed to wait for user bo\n", r);
|
||||
|
|
|
|||
|
|
@ -85,9 +85,9 @@ static void amdgpu_bo_destroy(struct ttm_buffer_object *tbo)
|
|||
|
||||
amdgpu_bo_kunmap(bo);
|
||||
|
||||
if (bo->gem_base.import_attach)
|
||||
drm_prime_gem_destroy(&bo->gem_base, bo->tbo.sg);
|
||||
drm_gem_object_release(&bo->gem_base);
|
||||
if (bo->tbo.base.import_attach)
|
||||
drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg);
|
||||
drm_gem_object_release(&bo->tbo.base);
|
||||
/* in case amdgpu_device_recover_vram got NULL of bo->parent */
|
||||
if (!list_empty(&bo->shadow_list)) {
|
||||
mutex_lock(&adev->shadow_list_lock);
|
||||
|
|
@ -454,7 +454,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
|
|||
bo = kzalloc(sizeof(struct amdgpu_bo), GFP_KERNEL);
|
||||
if (bo == NULL)
|
||||
return -ENOMEM;
|
||||
drm_gem_private_object_init(adev->ddev, &bo->gem_base, size);
|
||||
drm_gem_private_object_init(adev->ddev, &bo->tbo.base, size);
|
||||
INIT_LIST_HEAD(&bo->shadow_list);
|
||||
bo->vm_bo = NULL;
|
||||
bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :
|
||||
|
|
@ -521,7 +521,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
|
|||
bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
|
||||
struct dma_fence *fence;
|
||||
|
||||
r = amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
|
||||
r = amdgpu_fill_buffer(bo, 0, bo->tbo.base.resv, &fence);
|
||||
if (unlikely(r))
|
||||
goto fail_unreserve;
|
||||
|
||||
|
|
@ -544,7 +544,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
|
|||
|
||||
fail_unreserve:
|
||||
if (!bp->resv)
|
||||
ww_mutex_unlock(&bo->tbo.resv->lock);
|
||||
reservation_object_unlock(bo->tbo.base.resv);
|
||||
amdgpu_bo_unref(&bo);
|
||||
return r;
|
||||
}
|
||||
|
|
@ -565,7 +565,7 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
|
|||
bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC |
|
||||
AMDGPU_GEM_CREATE_SHADOW;
|
||||
bp.type = ttm_bo_type_kernel;
|
||||
bp.resv = bo->tbo.resv;
|
||||
bp.resv = bo->tbo.base.resv;
|
||||
|
||||
r = amdgpu_bo_do_create(adev, &bp, &bo->shadow);
|
||||
if (!r) {
|
||||
|
|
@ -606,13 +606,13 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
|
|||
|
||||
if ((flags & AMDGPU_GEM_CREATE_SHADOW) && !(adev->flags & AMD_IS_APU)) {
|
||||
if (!bp->resv)
|
||||
WARN_ON(reservation_object_lock((*bo_ptr)->tbo.resv,
|
||||
WARN_ON(reservation_object_lock((*bo_ptr)->tbo.base.resv,
|
||||
NULL));
|
||||
|
||||
r = amdgpu_bo_create_shadow(adev, bp->size, *bo_ptr);
|
||||
|
||||
if (!bp->resv)
|
||||
reservation_object_unlock((*bo_ptr)->tbo.resv);
|
||||
reservation_object_unlock((*bo_ptr)->tbo.base.resv);
|
||||
|
||||
if (r)
|
||||
amdgpu_bo_unref(bo_ptr);
|
||||
|
|
@ -709,7 +709,7 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.resv, false, false,
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.base.resv, false, false,
|
||||
MAX_SCHEDULE_TIMEOUT);
|
||||
if (r < 0)
|
||||
return r;
|
||||
|
|
@ -1087,7 +1087,7 @@ int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags)
|
|||
*/
|
||||
void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags)
|
||||
{
|
||||
lockdep_assert_held(&bo->tbo.resv->lock.base);
|
||||
reservation_object_assert_held(bo->tbo.base.resv);
|
||||
|
||||
if (tiling_flags)
|
||||
*tiling_flags = bo->tiling_flags;
|
||||
|
|
@ -1283,7 +1283,7 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
|
|||
void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
|
||||
bool shared)
|
||||
{
|
||||
struct reservation_object *resv = bo->tbo.resv;
|
||||
struct reservation_object *resv = bo->tbo.base.resv;
|
||||
|
||||
if (shared)
|
||||
reservation_object_add_shared_fence(resv, fence);
|
||||
|
|
@ -1308,7 +1308,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
|
|||
int r;
|
||||
|
||||
amdgpu_sync_create(&sync);
|
||||
amdgpu_sync_resv(adev, &sync, bo->tbo.resv, owner, false);
|
||||
amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv, owner, false);
|
||||
r = amdgpu_sync_wait(&sync, intr);
|
||||
amdgpu_sync_free(&sync);
|
||||
|
||||
|
|
@ -1328,7 +1328,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
|
|||
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
|
||||
{
|
||||
WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_SYSTEM);
|
||||
WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) &&
|
||||
WARN_ON_ONCE(!reservation_object_is_locked(bo->tbo.base.resv) &&
|
||||
!bo->pin_count && bo->tbo.type != ttm_bo_type_kernel);
|
||||
WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET);
|
||||
WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_VRAM &&
|
||||
|
|
|
|||
|
|
@ -94,7 +94,6 @@ struct amdgpu_bo {
|
|||
/* per VM structure for page tables and with virtual addresses */
|
||||
struct amdgpu_vm_bo_base *vm_bo;
|
||||
/* Constant after initialization */
|
||||
struct drm_gem_object gem_base;
|
||||
struct amdgpu_bo *parent;
|
||||
struct amdgpu_bo *shadow;
|
||||
|
||||
|
|
@ -192,7 +191,7 @@ static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)
|
|||
*/
|
||||
static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
|
||||
{
|
||||
return drm_vma_node_offset_addr(&bo->tbo.vma_node);
|
||||
return drm_vma_node_offset_addr(&bo->tbo.base.vma_node);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -227,7 +227,7 @@ static int amdgpu_verify_access(struct ttm_buffer_object *bo, struct file *filp)
|
|||
|
||||
if (amdgpu_ttm_tt_get_usermm(bo->ttm))
|
||||
return -EPERM;
|
||||
return drm_vma_node_verify_access(&abo->gem_base.vma_node,
|
||||
return drm_vma_node_verify_access(&abo->tbo.base.vma_node,
|
||||
filp->private_data);
|
||||
}
|
||||
|
||||
|
|
@ -440,7 +440,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
|
|||
|
||||
r = amdgpu_ttm_copy_mem_to_mem(adev, &src, &dst,
|
||||
new_mem->num_pages << PAGE_SHIFT,
|
||||
bo->resv, &fence);
|
||||
bo->base.resv, &fence);
|
||||
if (r)
|
||||
goto error;
|
||||
|
||||
|
|
@ -1478,18 +1478,18 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
|
|||
* cleanly handle page faults.
|
||||
*/
|
||||
if (bo->type == ttm_bo_type_kernel &&
|
||||
!reservation_object_test_signaled_rcu(bo->resv, true))
|
||||
!reservation_object_test_signaled_rcu(bo->base.resv, true))
|
||||
return false;
|
||||
|
||||
/* If bo is a KFD BO, check if the bo belongs to the current process.
|
||||
* If true, then return false as any KFD process needs all its BOs to
|
||||
* be resident to run successfully
|
||||
*/
|
||||
flist = reservation_object_get_list(bo->resv);
|
||||
flist = reservation_object_get_list(bo->base.resv);
|
||||
if (flist) {
|
||||
for (i = 0; i < flist->shared_count; ++i) {
|
||||
f = rcu_dereference_protected(flist->shared[i],
|
||||
reservation_object_held(bo->resv));
|
||||
reservation_object_held(bo->base.resv));
|
||||
if (amdkfd_fence_check_mm(f, current->mm))
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1073,7 +1073,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
|
|||
ib->length_dw = 16;
|
||||
|
||||
if (direct) {
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
|
||||
r = reservation_object_wait_timeout_rcu(bo->tbo.base.resv,
|
||||
true, false,
|
||||
msecs_to_jiffies(10));
|
||||
if (r == 0)
|
||||
|
|
@ -1085,7 +1085,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
|
|||
if (r)
|
||||
goto err_free;
|
||||
} else {
|
||||
r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.resv,
|
||||
r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.base.resv,
|
||||
AMDGPU_FENCE_OWNER_UNDEFINED, false);
|
||||
if (r)
|
||||
goto err_free;
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
|
|||
base->next = bo->vm_bo;
|
||||
bo->vm_bo = base;
|
||||
|
||||
if (bo->tbo.resv != vm->root.base.bo->tbo.resv)
|
||||
if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
|
||||
return;
|
||||
|
||||
vm->bulk_moveable = false;
|
||||
|
|
@ -583,7 +583,7 @@ void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo)
|
|||
for (bo_base = abo->vm_bo; bo_base; bo_base = bo_base->next) {
|
||||
struct amdgpu_vm *vm = bo_base->vm;
|
||||
|
||||
if (abo->tbo.resv == vm->root.base.bo->tbo.resv)
|
||||
if (abo->tbo.base.resv == vm->root.base.bo->tbo.base.resv)
|
||||
vm->bulk_moveable = false;
|
||||
}
|
||||
|
||||
|
|
@ -834,7 +834,7 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm,
|
|||
bp->flags |= AMDGPU_GEM_CREATE_SHADOW;
|
||||
bp->type = ttm_bo_type_kernel;
|
||||
if (vm->root.base.bo)
|
||||
bp->resv = vm->root.base.bo->tbo.resv;
|
||||
bp->resv = vm->root.base.bo->tbo.base.resv;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1702,7 +1702,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
|
|||
ttm = container_of(bo->tbo.ttm, struct ttm_dma_tt, ttm);
|
||||
pages_addr = ttm->dma_address;
|
||||
}
|
||||
exclusive = reservation_object_get_excl(bo->tbo.resv);
|
||||
exclusive = reservation_object_get_excl(bo->tbo.base.resv);
|
||||
}
|
||||
|
||||
if (bo) {
|
||||
|
|
@ -1712,7 +1712,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
|
|||
flags = 0x0;
|
||||
}
|
||||
|
||||
if (clear || (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv))
|
||||
if (clear || (bo && bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv))
|
||||
last_update = &vm->last_update;
|
||||
else
|
||||
last_update = &bo_va->last_pt_update;
|
||||
|
|
@ -1743,7 +1743,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
|
|||
* the evicted list so that it gets validated again on the
|
||||
* next command submission.
|
||||
*/
|
||||
if (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv) {
|
||||
if (bo && bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv) {
|
||||
uint32_t mem_type = bo->tbo.mem.mem_type;
|
||||
|
||||
if (!(bo->preferred_domains & amdgpu_mem_type_to_domain(mem_type)))
|
||||
|
|
@ -1879,7 +1879,7 @@ static void amdgpu_vm_free_mapping(struct amdgpu_device *adev,
|
|||
*/
|
||||
static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
|
||||
{
|
||||
struct reservation_object *resv = vm->root.base.bo->tbo.resv;
|
||||
struct reservation_object *resv = vm->root.base.bo->tbo.base.resv;
|
||||
struct dma_fence *excl, **shared;
|
||||
unsigned i, shared_count;
|
||||
int r;
|
||||
|
|
@ -1993,7 +1993,7 @@ int amdgpu_vm_handle_moved(struct amdgpu_device *adev,
|
|||
while (!list_empty(&vm->invalidated)) {
|
||||
bo_va = list_first_entry(&vm->invalidated, struct amdgpu_bo_va,
|
||||
base.vm_status);
|
||||
resv = bo_va->base.bo->tbo.resv;
|
||||
resv = bo_va->base.bo->tbo.base.resv;
|
||||
spin_unlock(&vm->invalidated_lock);
|
||||
|
||||
/* Try to reserve the BO to avoid clearing its ptes */
|
||||
|
|
@ -2084,7 +2084,7 @@ static void amdgpu_vm_bo_insert_map(struct amdgpu_device *adev,
|
|||
if (mapping->flags & AMDGPU_PTE_PRT)
|
||||
amdgpu_vm_prt_get(adev);
|
||||
|
||||
if (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv &&
|
||||
if (bo && bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv &&
|
||||
!bo_va->base.moved) {
|
||||
list_move(&bo_va->base.vm_status, &vm->moved);
|
||||
}
|
||||
|
|
@ -2416,7 +2416,8 @@ void amdgpu_vm_bo_trace_cs(struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket)
|
|||
struct amdgpu_bo *bo;
|
||||
|
||||
bo = mapping->bo_va->base.bo;
|
||||
if (READ_ONCE(bo->tbo.resv->lock.ctx) != ticket)
|
||||
if (reservation_object_locking_ctx(bo->tbo.base.resv) !=
|
||||
ticket)
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
@ -2443,7 +2444,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
|
|||
struct amdgpu_vm_bo_base **base;
|
||||
|
||||
if (bo) {
|
||||
if (bo->tbo.resv == vm->root.base.bo->tbo.resv)
|
||||
if (bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv)
|
||||
vm->bulk_moveable = false;
|
||||
|
||||
for (base = &bo_va->base.bo->vm_bo; *base;
|
||||
|
|
@ -2507,7 +2508,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
|
|||
for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) {
|
||||
struct amdgpu_vm *vm = bo_base->vm;
|
||||
|
||||
if (evicted && bo->tbo.resv == vm->root.base.bo->tbo.resv) {
|
||||
if (evicted && bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv) {
|
||||
amdgpu_vm_bo_evicted(bo_base);
|
||||
continue;
|
||||
}
|
||||
|
|
@ -2518,7 +2519,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
|
|||
|
||||
if (bo->tbo.type == ttm_bo_type_kernel)
|
||||
amdgpu_vm_bo_relocated(bo_base);
|
||||
else if (bo->tbo.resv == vm->root.base.bo->tbo.resv)
|
||||
else if (bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv)
|
||||
amdgpu_vm_bo_moved(bo_base);
|
||||
else
|
||||
amdgpu_vm_bo_invalidated(bo_base);
|
||||
|
|
@ -2648,7 +2649,7 @@ void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
|
|||
*/
|
||||
long amdgpu_vm_wait_idle(struct amdgpu_vm *vm, long timeout)
|
||||
{
|
||||
return reservation_object_wait_timeout_rcu(vm->root.base.bo->tbo.resv,
|
||||
return reservation_object_wait_timeout_rcu(vm->root.base.bo->tbo.base.resv,
|
||||
true, true, timeout);
|
||||
}
|
||||
|
||||
|
|
@ -2723,7 +2724,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
|
|||
if (r)
|
||||
goto error_free_root;
|
||||
|
||||
r = reservation_object_reserve_shared(root->tbo.resv, 1);
|
||||
r = reservation_object_reserve_shared(root->tbo.base.resv, 1);
|
||||
if (r)
|
||||
goto error_unreserve;
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
|
|||
if (r)
|
||||
return r;
|
||||
|
||||
r = amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.resv,
|
||||
r = amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.base.resv,
|
||||
owner, false);
|
||||
if (r)
|
||||
return r;
|
||||
|
|
|
|||
|
|
@ -5693,7 +5693,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
|
|||
* deadlock during GPU reset when this fence will not signal
|
||||
* but we hold reservation lock for the BO.
|
||||
*/
|
||||
r = reservation_object_wait_timeout_rcu(abo->tbo.resv, true,
|
||||
r = reservation_object_wait_timeout_rcu(abo->tbo.base.resv, true,
|
||||
false,
|
||||
msecs_to_jiffies(5000));
|
||||
if (unlikely(r <= 0))
|
||||
|
|
|
|||
|
|
@ -156,6 +156,26 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector)
|
|||
kfree(amdgpu_dm_connector);
|
||||
}
|
||||
|
||||
static int
|
||||
amdgpu_dm_mst_connector_late_register(struct drm_connector *connector)
|
||||
{
|
||||
struct amdgpu_dm_connector *amdgpu_dm_connector =
|
||||
to_amdgpu_dm_connector(connector);
|
||||
struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
|
||||
|
||||
return drm_dp_mst_connector_late_register(connector, port);
|
||||
}
|
||||
|
||||
static void
|
||||
amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
|
||||
{
|
||||
struct amdgpu_dm_connector *amdgpu_dm_connector =
|
||||
to_amdgpu_dm_connector(connector);
|
||||
struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
|
||||
|
||||
drm_dp_mst_connector_early_unregister(connector, port);
|
||||
}
|
||||
|
||||
static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
|
||||
.detect = dm_dp_mst_detect,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
|
|
@ -164,7 +184,9 @@ static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
|
|||
.atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
|
||||
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
|
||||
.atomic_set_property = amdgpu_dm_connector_atomic_set_property,
|
||||
.atomic_get_property = amdgpu_dm_connector_atomic_get_property
|
||||
.atomic_get_property = amdgpu_dm_connector_atomic_get_property,
|
||||
.late_register = amdgpu_dm_mst_connector_late_register,
|
||||
.early_unregister = amdgpu_dm_mst_connector_early_unregister,
|
||||
};
|
||||
|
||||
static int dm_dp_mst_get_modes(struct drm_connector *connector)
|
||||
|
|
@ -388,7 +410,7 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
|
|||
struct amdgpu_dm_connector *aconnector)
|
||||
{
|
||||
aconnector->dm_dp_aux.aux.name = "dmdc";
|
||||
aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
|
||||
aconnector->dm_dp_aux.aux.dev = aconnector->base.kdev;
|
||||
aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
|
||||
aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
|
||||
|
||||
|
|
|
|||
|
|
@ -135,8 +135,7 @@ static int arcpgu_debugfs_init(struct drm_minor *minor)
|
|||
#endif
|
||||
|
||||
static struct drm_driver arcpgu_drm_driver = {
|
||||
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
|
||||
DRIVER_ATOMIC,
|
||||
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
|
||||
.name = "arcpgu",
|
||||
.desc = "ARC PGU Controller",
|
||||
.date = "20160219",
|
||||
|
|
@ -150,8 +149,6 @@ static struct drm_driver arcpgu_drm_driver = {
|
|||
.gem_free_object_unlocked = drm_gem_cma_free_object,
|
||||
.gem_print_info = drm_gem_cma_print_info,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
|
|
|
|||
|
|
@ -4,8 +4,6 @@
|
|||
* Author: James.Qian.Wang <james.qian.wang@arm.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <drm/drm_print.h>
|
||||
#include "d71_dev.h"
|
||||
#include "komeda_kms.h"
|
||||
#include "malidp_io.h"
|
||||
|
|
@ -804,7 +802,7 @@ static int d71_downscaling_clk_check(struct komeda_pipeline *pipe,
|
|||
denominator = (mode->htotal - 1) * v_out - 2 * v_in;
|
||||
}
|
||||
|
||||
return aclk_rate * denominator >= mode->clock * 1000 * fraction ?
|
||||
return aclk_rate * denominator >= mode->crtc_clock * 1000 * fraction ?
|
||||
0 : -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -1032,21 +1030,31 @@ static void d71_timing_ctrlr_update(struct komeda_component *c,
|
|||
struct komeda_component_state *state)
|
||||
{
|
||||
struct drm_crtc_state *crtc_st = state->crtc->state;
|
||||
struct drm_display_mode *mode = &crtc_st->adjusted_mode;
|
||||
u32 __iomem *reg = c->reg;
|
||||
struct videomode vm;
|
||||
u32 hactive, hfront_porch, hback_porch, hsync_len;
|
||||
u32 vactive, vfront_porch, vback_porch, vsync_len;
|
||||
u32 value;
|
||||
|
||||
drm_display_mode_to_videomode(&crtc_st->adjusted_mode, &vm);
|
||||
hactive = mode->crtc_hdisplay;
|
||||
hfront_porch = mode->crtc_hsync_start - mode->crtc_hdisplay;
|
||||
hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
|
||||
hback_porch = mode->crtc_htotal - mode->crtc_hsync_end;
|
||||
|
||||
malidp_write32(reg, BS_ACTIVESIZE, HV_SIZE(vm.hactive, vm.vactive));
|
||||
malidp_write32(reg, BS_HINTERVALS, BS_H_INTVALS(vm.hfront_porch,
|
||||
vm.hback_porch));
|
||||
malidp_write32(reg, BS_VINTERVALS, BS_V_INTVALS(vm.vfront_porch,
|
||||
vm.vback_porch));
|
||||
vactive = mode->crtc_vdisplay;
|
||||
vfront_porch = mode->crtc_vsync_start - mode->crtc_vdisplay;
|
||||
vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
|
||||
vback_porch = mode->crtc_vtotal - mode->crtc_vsync_end;
|
||||
|
||||
value = BS_SYNC_VSW(vm.vsync_len) | BS_SYNC_HSW(vm.hsync_len);
|
||||
value |= vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ? BS_SYNC_VSP : 0;
|
||||
value |= vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? BS_SYNC_HSP : 0;
|
||||
malidp_write32(reg, BS_ACTIVESIZE, HV_SIZE(hactive, vactive));
|
||||
malidp_write32(reg, BS_HINTERVALS, BS_H_INTVALS(hfront_porch,
|
||||
hback_porch));
|
||||
malidp_write32(reg, BS_VINTERVALS, BS_V_INTVALS(vfront_porch,
|
||||
vback_porch));
|
||||
|
||||
value = BS_SYNC_VSW(vsync_len) | BS_SYNC_HSW(hsync_len);
|
||||
value |= mode->flags & DRM_MODE_FLAG_PVSYNC ? BS_SYNC_VSP : 0;
|
||||
value |= mode->flags & DRM_MODE_FLAG_PHSYNC ? BS_SYNC_HSP : 0;
|
||||
malidp_write32(reg, BS_SYNC, value);
|
||||
|
||||
malidp_write32(reg, BS_PROG_LINE, D71_DEFAULT_PREPRETCH_LINE - 1);
|
||||
|
|
@ -1054,6 +1062,10 @@ static void d71_timing_ctrlr_update(struct komeda_component *c,
|
|||
|
||||
/* configure bs control register */
|
||||
value = BS_CTRL_EN | BS_CTRL_VM;
|
||||
if (c->pipeline->dual_link) {
|
||||
malidp_write32(reg, BS_DRIFT_TO, hfront_porch + 16);
|
||||
value |= BS_CTRL_DL;
|
||||
}
|
||||
|
||||
malidp_write32(reg, BLK_CONTROL, value);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,8 +27,8 @@ static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
|
|||
return;
|
||||
}
|
||||
|
||||
pxlclk = kcrtc_st->base.adjusted_mode.clock * 1000;
|
||||
aclk = komeda_calc_aclk(kcrtc_st);
|
||||
pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000;
|
||||
aclk = komeda_crtc_get_aclk(kcrtc_st);
|
||||
|
||||
kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk);
|
||||
}
|
||||
|
|
@ -74,14 +74,6 @@ komeda_crtc_atomic_check(struct drm_crtc *crtc,
|
|||
return 0;
|
||||
}
|
||||
|
||||
unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st)
|
||||
{
|
||||
struct komeda_dev *mdev = kcrtc_st->base.crtc->dev->dev_private;
|
||||
unsigned long pxlclk = kcrtc_st->base.adjusted_mode.clock;
|
||||
|
||||
return clk_round_rate(mdev->aclk, pxlclk * 1000);
|
||||
}
|
||||
|
||||
/* For active a crtc, mainly need two parts of preparation
|
||||
* 1. adjust display operation mode.
|
||||
* 2. enable needed clk
|
||||
|
|
@ -92,7 +84,7 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
|
|||
struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
|
||||
struct komeda_pipeline *master = kcrtc->master;
|
||||
struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state);
|
||||
unsigned long pxlclk_rate = kcrtc_st->base.adjusted_mode.clock * 1000;
|
||||
struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode;
|
||||
u32 new_mode;
|
||||
int err;
|
||||
|
||||
|
|
@ -118,7 +110,7 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
|
|||
* to enable it again.
|
||||
*/
|
||||
if (new_mode != KOMEDA_MODE_DUAL_DISP) {
|
||||
err = clk_set_rate(mdev->aclk, komeda_calc_aclk(kcrtc_st));
|
||||
err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st));
|
||||
if (err)
|
||||
DRM_ERROR("failed to set aclk.\n");
|
||||
err = clk_prepare_enable(mdev->aclk);
|
||||
|
|
@ -126,7 +118,7 @@ komeda_crtc_prepare(struct komeda_crtc *kcrtc)
|
|||
DRM_ERROR("failed to enable aclk.\n");
|
||||
}
|
||||
|
||||
err = clk_set_rate(master->pxlclk, pxlclk_rate);
|
||||
err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000);
|
||||
if (err)
|
||||
DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
|
||||
err = clk_prepare_enable(master->pxlclk);
|
||||
|
|
@ -342,29 +334,58 @@ komeda_crtc_atomic_flush(struct drm_crtc *crtc,
|
|||
komeda_crtc_do_flush(crtc, old);
|
||||
}
|
||||
|
||||
/* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */
|
||||
static unsigned long
|
||||
komeda_calc_min_aclk_rate(struct komeda_crtc *kcrtc,
|
||||
unsigned long pxlclk)
|
||||
{
|
||||
/* Once dual-link one display pipeline drives two display outputs,
|
||||
* the aclk needs run on the double rate of pxlclk
|
||||
*/
|
||||
if (kcrtc->master->dual_link)
|
||||
return pxlclk * 2;
|
||||
else
|
||||
return pxlclk;
|
||||
}
|
||||
|
||||
/* Get current aclk rate that specified by state */
|
||||
unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st)
|
||||
{
|
||||
struct drm_crtc *crtc = kcrtc_st->base.crtc;
|
||||
struct komeda_dev *mdev = crtc->dev->dev_private;
|
||||
unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000;
|
||||
unsigned long min_aclk;
|
||||
|
||||
min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk);
|
||||
|
||||
return clk_round_rate(mdev->aclk, min_aclk);
|
||||
}
|
||||
|
||||
static enum drm_mode_status
|
||||
komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
|
||||
{
|
||||
struct komeda_dev *mdev = crtc->dev->dev_private;
|
||||
struct komeda_crtc *kcrtc = to_kcrtc(crtc);
|
||||
struct komeda_pipeline *master = kcrtc->master;
|
||||
long mode_clk, pxlclk;
|
||||
unsigned long min_pxlclk, min_aclk;
|
||||
|
||||
if (m->flags & DRM_MODE_FLAG_INTERLACE)
|
||||
return MODE_NO_INTERLACE;
|
||||
|
||||
mode_clk = m->clock * 1000;
|
||||
pxlclk = clk_round_rate(master->pxlclk, mode_clk);
|
||||
if (pxlclk != mode_clk) {
|
||||
DRM_DEBUG_ATOMIC("pxlclk doesn't support %ld Hz\n", mode_clk);
|
||||
min_pxlclk = m->clock * 1000;
|
||||
if (master->dual_link)
|
||||
min_pxlclk /= 2;
|
||||
|
||||
if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) {
|
||||
DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk);
|
||||
|
||||
return MODE_NOCLOCK;
|
||||
}
|
||||
|
||||
/* main engine clock must be faster than pxlclk*/
|
||||
if (clk_round_rate(mdev->aclk, mode_clk) < pxlclk) {
|
||||
DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %ld.\n",
|
||||
m->name, pxlclk);
|
||||
min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk);
|
||||
if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) {
|
||||
DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n",
|
||||
m->name, min_pxlclk);
|
||||
|
||||
return MODE_CLOCK_HIGH;
|
||||
}
|
||||
|
|
@ -377,10 +398,22 @@ static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,
|
|||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct komeda_crtc *kcrtc = to_kcrtc(crtc);
|
||||
struct komeda_pipeline *master = kcrtc->master;
|
||||
long mode_clk = m->clock * 1000;
|
||||
unsigned long clk_rate;
|
||||
|
||||
adjusted_mode->clock = clk_round_rate(master->pxlclk, mode_clk) / 1000;
|
||||
drm_mode_set_crtcinfo(adjusted_mode, 0);
|
||||
/* In dual link half the horizontal settings */
|
||||
if (kcrtc->master->dual_link) {
|
||||
adjusted_mode->crtc_clock /= 2;
|
||||
adjusted_mode->crtc_hdisplay /= 2;
|
||||
adjusted_mode->crtc_hsync_start /= 2;
|
||||
adjusted_mode->crtc_hsync_end /= 2;
|
||||
adjusted_mode->crtc_htotal /= 2;
|
||||
}
|
||||
|
||||
clk_rate = adjusted_mode->crtc_clock * 1000;
|
||||
/* crtc_clock will be used as the komeda output pixel clock */
|
||||
adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk,
|
||||
clk_rate) / 1000;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
@ -488,10 +521,8 @@ int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms,
|
|||
else
|
||||
sprintf(str, "None");
|
||||
|
||||
DRM_INFO("crtc%d: master(pipe-%d) slave(%s) output: %s.\n",
|
||||
kms->n_crtcs, master->id, str,
|
||||
master->of_output_dev ?
|
||||
master->of_output_dev->full_name : "None");
|
||||
DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n",
|
||||
kms->n_crtcs, master->id, str);
|
||||
|
||||
kms->n_crtcs++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -121,11 +121,14 @@ static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
|
|||
pipe->pxlclk = clk;
|
||||
|
||||
/* enum ports */
|
||||
pipe->of_output_dev =
|
||||
pipe->of_output_links[0] =
|
||||
of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0);
|
||||
pipe->of_output_links[1] =
|
||||
of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 1);
|
||||
pipe->of_output_port =
|
||||
of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT);
|
||||
|
||||
pipe->dual_link = pipe->of_output_links[0] && pipe->of_output_links[1];
|
||||
pipe->of_node = np;
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -83,11 +83,12 @@ static int compare_of(struct device *dev, void *data)
|
|||
|
||||
static void komeda_add_slave(struct device *master,
|
||||
struct component_match **match,
|
||||
struct device_node *np, int port)
|
||||
struct device_node *np,
|
||||
u32 port, u32 endpoint)
|
||||
{
|
||||
struct device_node *remote;
|
||||
|
||||
remote = of_graph_get_remote_node(np, port, 0);
|
||||
remote = of_graph_get_remote_node(np, port, endpoint);
|
||||
if (remote) {
|
||||
drm_of_component_match_add(master, match, compare_of, remote);
|
||||
of_node_put(remote);
|
||||
|
|
@ -108,7 +109,8 @@ static int komeda_platform_probe(struct platform_device *pdev)
|
|||
continue;
|
||||
|
||||
/* add connector */
|
||||
komeda_add_slave(dev, &match, child, KOMEDA_OF_PORT_OUTPUT);
|
||||
komeda_add_slave(dev, &match, child, KOMEDA_OF_PORT_OUTPUT, 0);
|
||||
komeda_add_slave(dev, &match, child, KOMEDA_OF_PORT_OUTPUT, 1);
|
||||
}
|
||||
|
||||
return component_master_add_with_match(dev, &komeda_master_ops, match);
|
||||
|
|
|
|||
|
|
@ -55,16 +55,13 @@ static irqreturn_t komeda_kms_irq_handler(int irq, void *data)
|
|||
}
|
||||
|
||||
static struct drm_driver komeda_kms_driver = {
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
|
||||
DRIVER_PRIME | DRIVER_HAVE_IRQ,
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
|
||||
.lastclose = drm_fb_helper_lastclose,
|
||||
.gem_free_object_unlocked = drm_gem_cma_free_object,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.dumb_create = komeda_gem_cma_dumb_create,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
|
|
|
|||
|
|
@ -14,8 +14,6 @@
|
|||
#include <drm/drm_device.h>
|
||||
#include <drm/drm_writeback.h>
|
||||
#include <drm/drm_print.h>
|
||||
#include <video/videomode.h>
|
||||
#include <video/display_timing.h>
|
||||
|
||||
/**
|
||||
* struct komeda_plane - komeda instance of drm_plane
|
||||
|
|
@ -168,7 +166,7 @@ static inline bool has_flip_h(u32 rot)
|
|||
return !!(rotation & DRM_MODE_REFLECT_X);
|
||||
}
|
||||
|
||||
unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st);
|
||||
unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st);
|
||||
|
||||
int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev);
|
||||
|
||||
|
|
|
|||
|
|
@ -54,7 +54,8 @@ void komeda_pipeline_destroy(struct komeda_dev *mdev,
|
|||
|
||||
clk_put(pipe->pxlclk);
|
||||
|
||||
of_node_put(pipe->of_output_dev);
|
||||
of_node_put(pipe->of_output_links[0]);
|
||||
of_node_put(pipe->of_output_links[1]);
|
||||
of_node_put(pipe->of_output_port);
|
||||
of_node_put(pipe->of_node);
|
||||
|
||||
|
|
@ -246,9 +247,15 @@ static void komeda_pipeline_dump(struct komeda_pipeline *pipe)
|
|||
struct komeda_component *c;
|
||||
int id;
|
||||
|
||||
DRM_INFO("Pipeline-%d: n_layers: %d, n_scalers: %d, output: %s\n",
|
||||
DRM_INFO("Pipeline-%d: n_layers: %d, n_scalers: %d, output: %s.\n",
|
||||
pipe->id, pipe->n_layers, pipe->n_scalers,
|
||||
pipe->of_output_dev ? pipe->of_output_dev->full_name : "none");
|
||||
pipe->dual_link ? "dual-link" : "single-link");
|
||||
DRM_INFO(" output_link[0]: %s.\n",
|
||||
pipe->of_output_links[0] ?
|
||||
pipe->of_output_links[0]->full_name : "none");
|
||||
DRM_INFO(" output_link[1]: %s.\n",
|
||||
pipe->of_output_links[1] ?
|
||||
pipe->of_output_links[1]->full_name : "none");
|
||||
|
||||
dp_for_each_set_bit(id, pipe->avail_comps) {
|
||||
c = komeda_pipeline_get_component(pipe, id);
|
||||
|
|
@ -305,6 +312,12 @@ static void komeda_pipeline_assemble(struct komeda_pipeline *pipe)
|
|||
|
||||
layer->right = komeda_get_layer_split_right_layer(pipe, layer);
|
||||
}
|
||||
|
||||
if (pipe->dual_link && !pipe->ctrlr->supports_dual_link) {
|
||||
pipe->dual_link = false;
|
||||
DRM_WARN("PIPE-%d doesn't support dual-link, ignore DT dual-link configuration.\n",
|
||||
pipe->id);
|
||||
}
|
||||
}
|
||||
|
||||
/* if pipeline_A accept another pipeline_B's component as input, treat
|
||||
|
|
|
|||
|
|
@ -416,8 +416,10 @@ struct komeda_pipeline {
|
|||
struct device_node *of_node;
|
||||
/** @of_output_port: pipeline output port */
|
||||
struct device_node *of_output_port;
|
||||
/** @of_output_dev: output connector device node */
|
||||
struct device_node *of_output_dev;
|
||||
/** @of_output_links: output connector device nodes */
|
||||
struct device_node *of_output_links[2];
|
||||
/** @dual_link: true if of_output_links[0] and [1] are both valid */
|
||||
bool dual_link;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -473,7 +473,7 @@ komeda_scaler_check_cfg(struct komeda_scaler *scaler,
|
|||
|
||||
err = pipe->funcs->downscaling_clk_check(pipe,
|
||||
&kcrtc_st->base.adjusted_mode,
|
||||
komeda_calc_aclk(kcrtc_st), dflow);
|
||||
komeda_crtc_get_aclk(kcrtc_st), dflow);
|
||||
if (err) {
|
||||
DRM_DEBUG_ATOMIC("aclk can't satisfy the clock requirement of the downscaling\n");
|
||||
return err;
|
||||
|
|
|
|||
|
|
@ -158,7 +158,7 @@ static void komeda_plane_reset(struct drm_plane *plane)
|
|||
static struct drm_plane_state *
|
||||
komeda_plane_atomic_duplicate_state(struct drm_plane *plane)
|
||||
{
|
||||
struct komeda_plane_state *new, *old;
|
||||
struct komeda_plane_state *new;
|
||||
|
||||
if (WARN_ON(!plane->state))
|
||||
return NULL;
|
||||
|
|
@ -169,8 +169,6 @@ komeda_plane_atomic_duplicate_state(struct drm_plane *plane)
|
|||
|
||||
__drm_atomic_helper_plane_duplicate_state(plane, &new->base);
|
||||
|
||||
old = to_kplane_st(plane->state);
|
||||
|
||||
return &new->base;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -229,9 +229,7 @@ static int hdlcd_debugfs_init(struct drm_minor *minor)
|
|||
DEFINE_DRM_GEM_CMA_FOPS(fops);
|
||||
|
||||
static struct drm_driver hdlcd_driver = {
|
||||
.driver_features = DRIVER_GEM |
|
||||
DRIVER_MODESET | DRIVER_PRIME |
|
||||
DRIVER_ATOMIC,
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
|
||||
.irq_handler = hdlcd_irq,
|
||||
.irq_preinstall = hdlcd_irq_preinstall,
|
||||
.irq_postinstall = hdlcd_irq_postinstall,
|
||||
|
|
@ -242,8 +240,6 @@ static struct drm_driver hdlcd_driver = {
|
|||
.dumb_create = drm_gem_cma_dumb_create,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
|
|
|
|||
|
|
@ -561,15 +561,12 @@ static int malidp_debugfs_init(struct drm_minor *minor)
|
|||
#endif //CONFIG_DEBUG_FS
|
||||
|
||||
static struct drm_driver malidp_driver = {
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
|
||||
DRIVER_PRIME,
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
|
||||
.gem_free_object_unlocked = drm_gem_cma_free_object,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.dumb_create = malidp_dumb_create,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
|
|
|
|||
|
|
@ -385,6 +385,7 @@ int malidp_format_get_bpp(u32 fmt)
|
|||
switch (fmt) {
|
||||
case DRM_FORMAT_VUY101010:
|
||||
bpp = 30;
|
||||
break;
|
||||
case DRM_FORMAT_YUV420_10BIT:
|
||||
bpp = 15;
|
||||
break;
|
||||
|
|
@ -1309,7 +1310,7 @@ static irqreturn_t malidp_se_irq(int irq, void *arg)
|
|||
break;
|
||||
case MW_RESTART:
|
||||
drm_writeback_signal_completion(&malidp->mw_connector, 0);
|
||||
/* fall through to a new start */
|
||||
/* fall through - to a new start */
|
||||
case MW_START:
|
||||
/* writeback started, need to emulate one-shot mode */
|
||||
hw->disable_memwrite(hwdev);
|
||||
|
|
|
|||
|
|
@ -40,8 +40,7 @@ static struct drm_driver armada_drm_driver = {
|
|||
.name = "armada-drm",
|
||||
.desc = "Armada SoC DRM",
|
||||
.date = "20120730",
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET |
|
||||
DRIVER_PRIME | DRIVER_ATOMIC,
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
|
||||
.ioctls = armada_ioctls,
|
||||
.fops = &armada_drm_fops,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -482,8 +482,7 @@ static const struct dma_buf_ops armada_gem_prime_dmabuf_ops = {
|
|||
};
|
||||
|
||||
struct dma_buf *
|
||||
armada_gem_prime_export(struct drm_device *dev, struct drm_gem_object *obj,
|
||||
int flags)
|
||||
armada_gem_prime_export(struct drm_gem_object *obj, int flags)
|
||||
{
|
||||
DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
|
||||
|
||||
|
|
@ -492,7 +491,7 @@ armada_gem_prime_export(struct drm_device *dev, struct drm_gem_object *obj,
|
|||
exp_info.flags = O_RDWR;
|
||||
exp_info.priv = obj;
|
||||
|
||||
return drm_gem_dmabuf_export(dev, &exp_info);
|
||||
return drm_gem_dmabuf_export(obj->dev, &exp_info);
|
||||
}
|
||||
|
||||
struct drm_gem_object *
|
||||
|
|
|
|||
|
|
@ -32,8 +32,7 @@ struct armada_gem_object *armada_gem_alloc_private_object(struct drm_device *,
|
|||
size_t);
|
||||
int armada_gem_dumb_create(struct drm_file *, struct drm_device *,
|
||||
struct drm_mode_create_dumb *);
|
||||
struct dma_buf *armada_gem_prime_export(struct drm_device *dev,
|
||||
struct drm_gem_object *obj, int flags);
|
||||
struct dma_buf *armada_gem_prime_export(struct drm_gem_object *obj, int flags);
|
||||
struct drm_gem_object *armada_gem_prime_import(struct drm_device *,
|
||||
struct dma_buf *);
|
||||
int armada_gem_map_import(struct armada_gem_object *);
|
||||
|
|
|
|||
|
|
@ -194,8 +194,7 @@ static void aspeed_gfx_unload(struct drm_device *drm)
|
|||
DEFINE_DRM_GEM_CMA_FOPS(fops);
|
||||
|
||||
static struct drm_driver aspeed_gfx_driver = {
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET |
|
||||
DRIVER_PRIME | DRIVER_ATOMIC,
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
|
||||
.gem_create_object = drm_cma_gem_create_object_default_funcs,
|
||||
.dumb_create = drm_gem_cma_dumb_create,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
|
|
|
|||
|
|
@ -3,6 +3,6 @@
|
|||
# Makefile for the drm device driver. This driver provides support for the
|
||||
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
|
||||
|
||||
ast-y := ast_drv.o ast_main.o ast_mode.o ast_fb.o ast_ttm.o ast_post.o ast_dp501.o
|
||||
ast-y := ast_drv.o ast_main.o ast_mode.o ast_ttm.o ast_post.o ast_dp501.o
|
||||
|
||||
obj-$(CONFIG_DRM_AST) := ast.o
|
||||
|
|
|
|||
|
|
@ -1,8 +1,11 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <drm/drmP.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "ast_drv.h"
|
||||
|
||||
MODULE_FIRMWARE("ast_dp501_fw.bin");
|
||||
|
||||
static int ast_load_dp501_microcode(struct drm_device *dev)
|
||||
|
|
|
|||
|
|
@ -25,12 +25,17 @@
|
|||
/*
|
||||
* Authors: Dave Airlie <airlied@redhat.com>
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/console.h>
|
||||
|
||||
#include <drm/drmP.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_drv.h>
|
||||
#include <drm/drm_gem_vram_helper.h>
|
||||
#include <drm/drm_pci.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
#include <drm/drm_vram_mm_helper.h>
|
||||
|
||||
#include "ast_drv.h"
|
||||
|
||||
|
|
@ -100,28 +105,21 @@ ast_pci_remove(struct pci_dev *pdev)
|
|||
static int ast_drm_freeze(struct drm_device *dev)
|
||||
{
|
||||
drm_kms_helper_poll_disable(dev);
|
||||
|
||||
pci_save_state(dev->pdev);
|
||||
drm_fb_helper_set_suspend_unlocked(dev->fb_helper, true);
|
||||
|
||||
console_lock();
|
||||
ast_fbdev_set_suspend(dev, 1);
|
||||
console_unlock();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ast_drm_thaw(struct drm_device *dev)
|
||||
{
|
||||
int error = 0;
|
||||
|
||||
ast_post_gpu(dev);
|
||||
|
||||
drm_mode_config_reset(dev);
|
||||
drm_helper_resume_force_mode(dev);
|
||||
drm_fb_helper_set_suspend_unlocked(dev->fb_helper, false);
|
||||
|
||||
console_lock();
|
||||
ast_fbdev_set_suspend(dev, 0);
|
||||
console_unlock();
|
||||
return error;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ast_drm_resume(struct drm_device *dev)
|
||||
|
|
|
|||
|
|
@ -28,17 +28,18 @@
|
|||
#ifndef __AST_DRV_H__
|
||||
#define __AST_DRV_H__
|
||||
|
||||
#include <drm/drm_encoder.h>
|
||||
#include <drm/drm_fb_helper.h>
|
||||
|
||||
#include <drm/drm_gem.h>
|
||||
#include <drm/drm_gem_vram_helper.h>
|
||||
|
||||
#include <drm/drm_vram_mm_helper.h>
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c-algo-bit.h>
|
||||
|
||||
#include <drm/drm_connector.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_encoder.h>
|
||||
#include <drm/drm_mode.h>
|
||||
#include <drm/drm_framebuffer.h>
|
||||
#include <drm/drm_fb_helper.h>
|
||||
|
||||
#define DRIVER_AUTHOR "Dave Airlie"
|
||||
|
||||
#define DRIVER_NAME "ast"
|
||||
|
|
@ -81,8 +82,6 @@ enum ast_tx_chip {
|
|||
#define AST_DRAM_4Gx16 7
|
||||
#define AST_DRAM_8Gx16 8
|
||||
|
||||
struct ast_fbdev;
|
||||
|
||||
struct ast_private {
|
||||
struct drm_device *dev;
|
||||
|
||||
|
|
@ -96,8 +95,6 @@ struct ast_private {
|
|||
uint32_t mclk;
|
||||
uint32_t vram_size;
|
||||
|
||||
struct ast_fbdev *fbdev;
|
||||
|
||||
int fb_mtrr;
|
||||
|
||||
struct drm_gem_object *cursor_cache;
|
||||
|
|
@ -239,24 +236,9 @@ struct ast_encoder {
|
|||
struct drm_encoder base;
|
||||
};
|
||||
|
||||
struct ast_framebuffer {
|
||||
struct drm_framebuffer base;
|
||||
struct drm_gem_object *obj;
|
||||
};
|
||||
|
||||
struct ast_fbdev {
|
||||
struct drm_fb_helper helper; /* must be first */
|
||||
struct ast_framebuffer afb;
|
||||
void *sysram;
|
||||
int size;
|
||||
int x1, y1, x2, y2; /* dirty rect */
|
||||
spinlock_t dirty_lock;
|
||||
};
|
||||
|
||||
#define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
|
||||
#define to_ast_connector(x) container_of(x, struct ast_connector, base)
|
||||
#define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
|
||||
#define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)
|
||||
|
||||
struct ast_vbios_stdtable {
|
||||
u8 misc;
|
||||
|
|
@ -296,16 +278,6 @@ struct ast_vbios_mode_info {
|
|||
extern int ast_mode_init(struct drm_device *dev);
|
||||
extern void ast_mode_fini(struct drm_device *dev);
|
||||
|
||||
int ast_framebuffer_init(struct drm_device *dev,
|
||||
struct ast_framebuffer *ast_fb,
|
||||
const struct drm_mode_fb_cmd2 *mode_cmd,
|
||||
struct drm_gem_object *obj);
|
||||
|
||||
int ast_fbdev_init(struct drm_device *dev);
|
||||
void ast_fbdev_fini(struct drm_device *dev);
|
||||
void ast_fbdev_set_suspend(struct drm_device *dev, int state);
|
||||
void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr);
|
||||
|
||||
#define AST_MM_ALIGN_SHIFT 4
|
||||
#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,346 +0,0 @@
|
|||
/*
|
||||
* Copyright 2012 Red Hat Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Authors: Dave Airlie <airlied@redhat.com>
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/sysrq.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
|
||||
#include <drm/drmP.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_fb_helper.h>
|
||||
#include <drm/drm_util.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
|
||||
#include "ast_drv.h"
|
||||
|
||||
static void ast_dirty_update(struct ast_fbdev *afbdev,
|
||||
int x, int y, int width, int height)
|
||||
{
|
||||
int i;
|
||||
struct drm_gem_vram_object *gbo;
|
||||
int src_offset, dst_offset;
|
||||
int bpp = afbdev->afb.base.format->cpp[0];
|
||||
int ret;
|
||||
u8 *dst;
|
||||
bool unmap = false;
|
||||
bool store_for_later = false;
|
||||
int x2, y2;
|
||||
unsigned long flags;
|
||||
|
||||
gbo = drm_gem_vram_of_gem(afbdev->afb.obj);
|
||||
|
||||
if (drm_can_sleep()) {
|
||||
/* We pin the BO so it won't be moved during the
|
||||
* update. The actual location, video RAM or system
|
||||
* memory, is not important.
|
||||
*/
|
||||
ret = drm_gem_vram_pin(gbo, 0);
|
||||
if (ret) {
|
||||
if (ret != -EBUSY)
|
||||
return;
|
||||
store_for_later = true;
|
||||
}
|
||||
} else {
|
||||
store_for_later = true;
|
||||
}
|
||||
|
||||
x2 = x + width - 1;
|
||||
y2 = y + height - 1;
|
||||
spin_lock_irqsave(&afbdev->dirty_lock, flags);
|
||||
|
||||
if (afbdev->y1 < y)
|
||||
y = afbdev->y1;
|
||||
if (afbdev->y2 > y2)
|
||||
y2 = afbdev->y2;
|
||||
if (afbdev->x1 < x)
|
||||
x = afbdev->x1;
|
||||
if (afbdev->x2 > x2)
|
||||
x2 = afbdev->x2;
|
||||
|
||||
if (store_for_later) {
|
||||
afbdev->x1 = x;
|
||||
afbdev->x2 = x2;
|
||||
afbdev->y1 = y;
|
||||
afbdev->y2 = y2;
|
||||
spin_unlock_irqrestore(&afbdev->dirty_lock, flags);
|
||||
return;
|
||||
}
|
||||
|
||||
afbdev->x1 = afbdev->y1 = INT_MAX;
|
||||
afbdev->x2 = afbdev->y2 = 0;
|
||||
spin_unlock_irqrestore(&afbdev->dirty_lock, flags);
|
||||
|
||||
dst = drm_gem_vram_kmap(gbo, false, NULL);
|
||||
if (IS_ERR(dst)) {
|
||||
DRM_ERROR("failed to kmap fb updates\n");
|
||||
goto out;
|
||||
} else if (!dst) {
|
||||
dst = drm_gem_vram_kmap(gbo, true, NULL);
|
||||
if (IS_ERR(dst)) {
|
||||
DRM_ERROR("failed to kmap fb updates\n");
|
||||
goto out;
|
||||
}
|
||||
unmap = true;
|
||||
}
|
||||
|
||||
for (i = y; i <= y2; i++) {
|
||||
/* assume equal stride for now */
|
||||
src_offset = dst_offset =
|
||||
i * afbdev->afb.base.pitches[0] + (x * bpp);
|
||||
memcpy_toio(dst + dst_offset, afbdev->sysram + src_offset,
|
||||
(x2 - x + 1) * bpp);
|
||||
}
|
||||
|
||||
if (unmap)
|
||||
drm_gem_vram_kunmap(gbo);
|
||||
|
||||
out:
|
||||
drm_gem_vram_unpin(gbo);
|
||||
}
|
||||
|
||||
static void ast_fillrect(struct fb_info *info,
|
||||
const struct fb_fillrect *rect)
|
||||
{
|
||||
struct ast_fbdev *afbdev = info->par;
|
||||
drm_fb_helper_sys_fillrect(info, rect);
|
||||
ast_dirty_update(afbdev, rect->dx, rect->dy, rect->width,
|
||||
rect->height);
|
||||
}
|
||||
|
||||
static void ast_copyarea(struct fb_info *info,
|
||||
const struct fb_copyarea *area)
|
||||
{
|
||||
struct ast_fbdev *afbdev = info->par;
|
||||
drm_fb_helper_sys_copyarea(info, area);
|
||||
ast_dirty_update(afbdev, area->dx, area->dy, area->width,
|
||||
area->height);
|
||||
}
|
||||
|
||||
static void ast_imageblit(struct fb_info *info,
|
||||
const struct fb_image *image)
|
||||
{
|
||||
struct ast_fbdev *afbdev = info->par;
|
||||
drm_fb_helper_sys_imageblit(info, image);
|
||||
ast_dirty_update(afbdev, image->dx, image->dy, image->width,
|
||||
image->height);
|
||||
}
|
||||
|
||||
static struct fb_ops astfb_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_check_var = drm_fb_helper_check_var,
|
||||
.fb_set_par = drm_fb_helper_set_par,
|
||||
.fb_fillrect = ast_fillrect,
|
||||
.fb_copyarea = ast_copyarea,
|
||||
.fb_imageblit = ast_imageblit,
|
||||
.fb_pan_display = drm_fb_helper_pan_display,
|
||||
.fb_blank = drm_fb_helper_blank,
|
||||
.fb_setcmap = drm_fb_helper_setcmap,
|
||||
};
|
||||
|
||||
static int astfb_create_object(struct ast_fbdev *afbdev,
|
||||
const struct drm_mode_fb_cmd2 *mode_cmd,
|
||||
struct drm_gem_object **gobj_p)
|
||||
{
|
||||
struct drm_device *dev = afbdev->helper.dev;
|
||||
u32 size;
|
||||
struct drm_gem_object *gobj;
|
||||
int ret = 0;
|
||||
|
||||
size = mode_cmd->pitches[0] * mode_cmd->height;
|
||||
ret = ast_gem_create(dev, size, true, &gobj);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*gobj_p = gobj;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int astfb_create(struct drm_fb_helper *helper,
|
||||
struct drm_fb_helper_surface_size *sizes)
|
||||
{
|
||||
struct ast_fbdev *afbdev =
|
||||
container_of(helper, struct ast_fbdev, helper);
|
||||
struct drm_device *dev = afbdev->helper.dev;
|
||||
struct drm_mode_fb_cmd2 mode_cmd;
|
||||
struct drm_framebuffer *fb;
|
||||
struct fb_info *info;
|
||||
int size, ret;
|
||||
void *sysram;
|
||||
struct drm_gem_object *gobj = NULL;
|
||||
mode_cmd.width = sizes->surface_width;
|
||||
mode_cmd.height = sizes->surface_height;
|
||||
mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7)/8);
|
||||
|
||||
mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
|
||||
sizes->surface_depth);
|
||||
|
||||
size = mode_cmd.pitches[0] * mode_cmd.height;
|
||||
|
||||
ret = astfb_create_object(afbdev, &mode_cmd, &gobj);
|
||||
if (ret) {
|
||||
DRM_ERROR("failed to create fbcon backing object %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
sysram = vmalloc(size);
|
||||
if (!sysram)
|
||||
return -ENOMEM;
|
||||
|
||||
info = drm_fb_helper_alloc_fbi(helper);
|
||||
if (IS_ERR(info)) {
|
||||
ret = PTR_ERR(info);
|
||||
goto out;
|
||||
}
|
||||
ret = ast_framebuffer_init(dev, &afbdev->afb, &mode_cmd, gobj);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
afbdev->sysram = sysram;
|
||||
afbdev->size = size;
|
||||
|
||||
fb = &afbdev->afb.base;
|
||||
afbdev->helper.fb = fb;
|
||||
|
||||
info->fbops = &astfb_ops;
|
||||
|
||||
info->apertures->ranges[0].base = pci_resource_start(dev->pdev, 0);
|
||||
info->apertures->ranges[0].size = pci_resource_len(dev->pdev, 0);
|
||||
|
||||
drm_fb_helper_fill_info(info, &afbdev->helper, sizes);
|
||||
|
||||
info->screen_base = sysram;
|
||||
info->screen_size = size;
|
||||
|
||||
info->pixmap.flags = FB_PIXMAP_SYSTEM;
|
||||
|
||||
DRM_DEBUG_KMS("allocated %dx%d\n",
|
||||
fb->width, fb->height);
|
||||
|
||||
return 0;
|
||||
|
||||
out:
|
||||
vfree(sysram);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct drm_fb_helper_funcs ast_fb_helper_funcs = {
|
||||
.fb_probe = astfb_create,
|
||||
};
|
||||
|
||||
static void ast_fbdev_destroy(struct drm_device *dev,
|
||||
struct ast_fbdev *afbdev)
|
||||
{
|
||||
struct ast_framebuffer *afb = &afbdev->afb;
|
||||
|
||||
drm_helper_force_disable_all(dev);
|
||||
drm_fb_helper_unregister_fbi(&afbdev->helper);
|
||||
|
||||
if (afb->obj) {
|
||||
drm_gem_object_put_unlocked(afb->obj);
|
||||
afb->obj = NULL;
|
||||
}
|
||||
drm_fb_helper_fini(&afbdev->helper);
|
||||
|
||||
vfree(afbdev->sysram);
|
||||
drm_framebuffer_unregister_private(&afb->base);
|
||||
drm_framebuffer_cleanup(&afb->base);
|
||||
}
|
||||
|
||||
int ast_fbdev_init(struct drm_device *dev)
|
||||
{
|
||||
struct ast_private *ast = dev->dev_private;
|
||||
struct ast_fbdev *afbdev;
|
||||
int ret;
|
||||
|
||||
afbdev = kzalloc(sizeof(struct ast_fbdev), GFP_KERNEL);
|
||||
if (!afbdev)
|
||||
return -ENOMEM;
|
||||
|
||||
ast->fbdev = afbdev;
|
||||
spin_lock_init(&afbdev->dirty_lock);
|
||||
|
||||
drm_fb_helper_prepare(dev, &afbdev->helper, &ast_fb_helper_funcs);
|
||||
|
||||
ret = drm_fb_helper_init(dev, &afbdev->helper, 1);
|
||||
if (ret)
|
||||
goto free;
|
||||
|
||||
ret = drm_fb_helper_single_add_all_connectors(&afbdev->helper);
|
||||
if (ret)
|
||||
goto fini;
|
||||
|
||||
/* disable all the possible outputs/crtcs before entering KMS mode */
|
||||
drm_helper_disable_unused_functions(dev);
|
||||
|
||||
ret = drm_fb_helper_initial_config(&afbdev->helper, 32);
|
||||
if (ret)
|
||||
goto fini;
|
||||
|
||||
return 0;
|
||||
|
||||
fini:
|
||||
drm_fb_helper_fini(&afbdev->helper);
|
||||
free:
|
||||
kfree(afbdev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void ast_fbdev_fini(struct drm_device *dev)
|
||||
{
|
||||
struct ast_private *ast = dev->dev_private;
|
||||
|
||||
if (!ast->fbdev)
|
||||
return;
|
||||
|
||||
ast_fbdev_destroy(dev, ast->fbdev);
|
||||
kfree(ast->fbdev);
|
||||
ast->fbdev = NULL;
|
||||
}
|
||||
|
||||
void ast_fbdev_set_suspend(struct drm_device *dev, int state)
|
||||
{
|
||||
struct ast_private *ast = dev->dev_private;
|
||||
|
||||
if (!ast->fbdev)
|
||||
return;
|
||||
|
||||
drm_fb_helper_set_suspend(&ast->fbdev->helper, state);
|
||||
}
|
||||
|
||||
void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr)
|
||||
{
|
||||
ast->fbdev->helper.fbdev->fix.smem_start =
|
||||
ast->fbdev->helper.fbdev->apertures->ranges[0].base + gpu_addr;
|
||||
ast->fbdev->helper.fbdev->fix.smem_len = ast->vram_size - gpu_addr;
|
||||
}
|
||||
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