ARM: msm: Remove unused idle.c
Forcing arm_pm_idle to be msm_idle() doesn't make sense in configurations that don't have CONFIG_MSM7X00A_IDLE=y (i.e. any targets that aren't 7x00a). Furthermore, that config doesn't even exist, so this entire file is dead code. Just remove it so we can use the default idle support on MSM. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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b07609cf88
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@ -1,4 +1,4 @@
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obj-y += io.o idle.o timer.o
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obj-y += io.o timer.o
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obj-y += clock.o
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obj-y += clock.o
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obj-$(CONFIG_DEBUG_FS) += clock-debug.o
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obj-$(CONFIG_DEBUG_FS) += clock-debug.o
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@ -1,49 +0,0 @@
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/* arch/arm/mach-msm/idle.c
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*
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* Idle processing for MSM7K - work around bugs with SWFI.
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*
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* Copyright (c) 2007 QUALCOMM Incorporated.
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* Copyright (C) 2007 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/init.h>
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#include <asm/system.h>
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static void msm_idle(void)
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{
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#ifdef CONFIG_MSM7X00A_IDLE
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asm volatile (
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"mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t"
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"bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t"
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"bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t"
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"mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t"
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"mov r0, #0 /* prepare wfi value */ \n\t"
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"mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t"
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"mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t"
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"mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t"
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"mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t"
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: : : "r0","r1" );
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#endif
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}
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static int __init msm_idle_init(void)
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{
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arm_pm_idle = msm_idle;
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return 0;
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}
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arch_initcall(msm_idle_init);
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