MIPS: Octeon: Set appropriate endianness in L2C registers
Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9629/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -325,8 +325,14 @@ static void __init octeon_ehci_hw_start(struct device *dev)
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/* Use 64-bit addressing. */
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ehci_ctl.s.ehci_64b_addr_en = 1;
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ehci_ctl.s.l2c_addr_msb = 0;
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#ifdef __BIG_ENDIAN
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ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
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ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
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#else
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ehci_ctl.s.l2c_buff_emod = 0; /* not swapped. */
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ehci_ctl.s.l2c_desc_emod = 0; /* not swapped. */
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ehci_ctl.s.inv_reg_a2 = 1;
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#endif
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cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
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octeon2_usb_clocks_stop();
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@ -381,8 +387,14 @@ static void __init octeon_ohci_hw_start(struct device *dev)
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ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0));
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ohci_ctl.s.l2c_addr_msb = 0;
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#ifdef __BIG_ENDIAN
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ohci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
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ohci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
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#else
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ohci_ctl.s.l2c_buff_emod = 0; /* not swapped. */
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ohci_ctl.s.l2c_desc_emod = 0; /* not swapped. */
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ohci_ctl.s.inv_reg_a2 = 1;
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#endif
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cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64);
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octeon2_usb_clocks_stop();
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