irqchip/sun4i: Add support for Allwinner ARMv5 F1C100s
This patch adds support for suniv Allwinner ARMv5 F1C100s SoC which has stripped version of interrupt controller that found in A10/A13. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Коммит
b0c4b9f355
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@ -32,6 +32,8 @@
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#define SUN4I_IRQ_MASK_REG(data, x) ((data)->mask_reg_offset + 0x4 * x)
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#define SUN4I_IRQ_ENABLE_REG_OFFSET 0x40
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#define SUN4I_IRQ_MASK_REG_OFFSET 0x50
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#define SUNIV_IRQ_ENABLE_REG_OFFSET 0x20
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#define SUNIV_IRQ_MASK_REG_OFFSET 0x30
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struct sun4i_irq_chip_data {
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void __iomem *irq_base;
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@ -105,15 +107,6 @@ static const struct irq_domain_ops sun4i_irq_ops = {
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static int __init sun4i_of_init(struct device_node *node,
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struct device_node *parent)
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{
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irq_ic_data = kzalloc(sizeof(struct sun4i_irq_chip_data), GFP_KERNEL);
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if (!irq_ic_data) {
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pr_err("kzalloc failed!\n");
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return -ENOMEM;
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}
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irq_ic_data->enable_reg_offset = SUN4I_IRQ_ENABLE_REG_OFFSET;
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irq_ic_data->mask_reg_offset = SUN4I_IRQ_MASK_REG_OFFSET;
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irq_ic_data->irq_base = of_iomap(node, 0);
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if (!irq_ic_data->irq_base)
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panic("%pOF: unable to map IC registers\n",
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@ -149,7 +142,41 @@ static int __init sun4i_of_init(struct device_node *node,
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return 0;
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}
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IRQCHIP_DECLARE(allwinner_sun4i_ic, "allwinner,sun4i-a10-ic", sun4i_of_init);
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static int __init sun4i_ic_of_init(struct device_node *node,
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struct device_node *parent)
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{
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irq_ic_data = kzalloc(sizeof(struct sun4i_irq_chip_data), GFP_KERNEL);
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if (!irq_ic_data) {
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pr_err("kzalloc failed!\n");
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return -ENOMEM;
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}
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irq_ic_data->enable_reg_offset = SUN4I_IRQ_ENABLE_REG_OFFSET;
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irq_ic_data->mask_reg_offset = SUN4I_IRQ_MASK_REG_OFFSET;
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return sun4i_of_init(node, parent);
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}
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IRQCHIP_DECLARE(allwinner_sun4i_ic, "allwinner,sun4i-a10-ic", sun4i_ic_of_init);
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static int __init suniv_ic_of_init(struct device_node *node,
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struct device_node *parent)
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{
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irq_ic_data = kzalloc(sizeof(struct sun4i_irq_chip_data), GFP_KERNEL);
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if (!irq_ic_data) {
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pr_err("kzalloc failed!\n");
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return -ENOMEM;
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}
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irq_ic_data->enable_reg_offset = SUNIV_IRQ_ENABLE_REG_OFFSET;
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irq_ic_data->mask_reg_offset = SUNIV_IRQ_MASK_REG_OFFSET;
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return sun4i_of_init(node, parent);
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}
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IRQCHIP_DECLARE(allwinner_sunvi_ic, "allwinner,suniv-f1c100s-ic",
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suniv_ic_of_init);
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static void __exception_irq_entry sun4i_handle_irq(struct pt_regs *regs)
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{
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