[MIPS] Probe for usability of cp0 compare interrupt.
Some processors offer the option of using the interrupt on which normally the count / compare interrupt would be signaled as a normal interupt pin. Previously this required some ugly hackery for each system which is much easier done by a quick and simple probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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60b0d65541
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@ -391,6 +391,50 @@ static void mips_event_handler(struct clock_event_device *dev)
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{
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}
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/*
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* FIXME: This doesn't hold for the relocated E9000 compare interrupt.
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*/
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static int c0_compare_int_pending(void)
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{
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return (read_c0_cause() >> cp0_compare_irq) & 0x100;
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}
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static int c0_compare_int_usable(void)
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{
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const unsigned int delta = 0x300000;
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unsigned int cnt;
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/*
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* IP7 already pending? Try to clear it by acking the timer.
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*/
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if (c0_compare_int_pending()) {
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write_c0_compare(read_c0_compare());
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irq_disable_hazard();
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if (c0_compare_int_pending())
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return 0;
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}
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cnt = read_c0_count();
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cnt += delta;
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write_c0_compare(cnt);
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while ((long)(read_c0_count() - cnt) <= 0)
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; /* Wait for expiry */
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if (!c0_compare_int_pending())
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return 0;
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write_c0_compare(read_c0_compare());
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irq_disable_hazard();
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if (c0_compare_int_pending())
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return 0;
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/*
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* Feels like a real count / compare timer.
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*/
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return 1;
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}
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void __cpuinit mips_clockevent_init(void)
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{
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uint64_t mips_freq = mips_hpt_frequency;
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@ -412,6 +456,9 @@ void __cpuinit mips_clockevent_init(void)
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return;
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#endif
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if (!c0_compare_int_usable())
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return;
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cd = &per_cpu(mips_clockevent_device, cpu);
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cd->name = "MIPS";
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