[ALSA] snd-emu10k1: Add emu1010 internal clock rate control for 44100 or 48000.
Signed-off-by: James Courtier-Dutton <James@superbug.co.uk> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
Родитель
0f71e8b985
Коммит
b0dbdaea55
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@ -1392,6 +1392,7 @@ struct snd_emu1010 {
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unsigned int input_source[64];
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unsigned int input_source[64];
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unsigned int adc_pads; /* bit mask */
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unsigned int adc_pads; /* bit mask */
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unsigned int dac_pads; /* bit mask */
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unsigned int dac_pads; /* bit mask */
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unsigned int internal_clock; /* 44100 or 48000 */
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};
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};
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struct snd_emu10k1 {
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struct snd_emu10k1 {
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@ -1014,6 +1014,7 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
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/* Word Clock source, Internal 48kHz x1 */
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/* Word Clock source, Internal 48kHz x1 */
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snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
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snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
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//snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
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//snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
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emu->emu1010.internal_clock = 1; /* 48000 */
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snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
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snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
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//snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
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//snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
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@ -35,6 +35,7 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <sound/core.h>
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#include <sound/core.h>
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#include <sound/emu10k1.h>
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#include <sound/emu10k1.h>
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#include <linux/delay.h>
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#define AC97_ID_STAC9758 0x83847658
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#define AC97_ID_STAC9758 0x83847658
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@ -490,6 +491,94 @@ static struct snd_kcontrol_new snd_emu1010_dac_pads[] __devinitdata = {
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EMU1010_DAC_PADS("DAC1 0202 14dB PAD Playback Switch", EMU_HANA_0202_DAC_PAD1),
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EMU1010_DAC_PADS("DAC1 0202 14dB PAD Playback Switch", EMU_HANA_0202_DAC_PAD1),
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};
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};
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static int snd_emu1010_internal_clock_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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static char *texts[2] = {
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"44100", "48000"
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};
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uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
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uinfo->count = 1;
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uinfo->value.enumerated.items = 2;
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if (uinfo->value.enumerated.item > 1)
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uinfo->value.enumerated.item = 1;
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strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
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return 0;
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}
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static int snd_emu1010_internal_clock_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
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ucontrol->value.enumerated.item[0] = emu->emu1010.internal_clock;
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return 0;
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}
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static int snd_emu1010_internal_clock_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
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unsigned int val;
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int change = 0;
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val = ucontrol->value.enumerated.item[0] ;
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change = (emu->emu1010.internal_clock != val);
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if (change) {
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emu->emu1010.internal_clock = val;
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switch (val) {
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case 0:
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/* 44100 */
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/* Mute all */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
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/* Default fallback clock 48kHz */
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snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_44_1K );
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/* Word Clock source, Internal 44.1kHz x1 */
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snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,
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EMU_HANA_WCLOCK_INT_44_1K | EMU_HANA_WCLOCK_1X );
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/* Set LEDs on Audio Dock */
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snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2,
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EMU_HANA_DOCK_LEDS_2_44K | EMU_HANA_DOCK_LEDS_2_LOCK );
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/* Allow DLL to settle */
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udelay(10000);
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/* Unmute all */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
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break;
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case 1:
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/* 48000 */
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/* Mute all */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
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/* Default fallback clock 48kHz */
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snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K );
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/* Word Clock source, Internal 48kHz x1 */
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snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,
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EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_1X );
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/* Set LEDs on Audio Dock */
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snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2,
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EMU_HANA_DOCK_LEDS_2_48K | EMU_HANA_DOCK_LEDS_2_LOCK );
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/* Allow DLL to settle */
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udelay(10000);
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/* Unmute all */
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snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
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break;
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}
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}
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return change;
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}
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static struct snd_kcontrol_new snd_emu1010_internal_clock =
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{
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.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Clock Internal Rate",
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.count = 1,
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.info = snd_emu1010_internal_clock_info,
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.get = snd_emu1010_internal_clock_get,
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.put = snd_emu1010_internal_clock_put
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};
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#if 0
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#if 0
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static int snd_audigy_spdif_output_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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static int snd_audigy_spdif_output_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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{
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{
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@ -1491,6 +1580,9 @@ int __devinit snd_emu10k1_mixer(struct snd_emu10k1 *emu,
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if (err < 0)
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if (err < 0)
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return err;
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return err;
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}
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}
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err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_internal_clock, emu));
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if (err < 0)
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return err;
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}
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}
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return 0;
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return 0;
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@ -358,7 +358,10 @@ static void snd_emu10k1_pcm_init_voice(struct snd_emu10k1 *emu,
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snd_emu10k1_ptr_write(emu, PTRX, voice, (send_amount[0] << 8) | send_amount[1]);
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snd_emu10k1_ptr_write(emu, PTRX, voice, (send_amount[0] << 8) | send_amount[1]);
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snd_emu10k1_ptr_write(emu, DSL, voice, end_addr | (send_amount[3] << 24));
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snd_emu10k1_ptr_write(emu, DSL, voice, end_addr | (send_amount[3] << 24));
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snd_emu10k1_ptr_write(emu, PSST, voice, start_addr | (send_amount[2] << 24));
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snd_emu10k1_ptr_write(emu, PSST, voice, start_addr | (send_amount[2] << 24));
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pitch_target = emu10k1_calc_pitch_target(runtime->rate);
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if (emu->card_capabilities->emu1010)
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pitch_target = PITCH_48000; /* Disable interpolators on emu1010 card */
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else
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pitch_target = emu10k1_calc_pitch_target(runtime->rate);
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if (extra)
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if (extra)
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snd_emu10k1_ptr_write(emu, CCCA, voice, start_addr |
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snd_emu10k1_ptr_write(emu, CCCA, voice, start_addr |
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emu10k1_select_interprom(pitch_target) |
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emu10k1_select_interprom(pitch_target) |
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@ -698,7 +701,10 @@ static void snd_emu10k1_playback_trigger_voice(struct snd_emu10k1 *emu, struct s
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voice = evoice->number;
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voice = evoice->number;
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pitch = snd_emu10k1_rate_to_pitch(runtime->rate) >> 8;
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pitch = snd_emu10k1_rate_to_pitch(runtime->rate) >> 8;
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pitch_target = emu10k1_calc_pitch_target(runtime->rate);
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if (emu->card_capabilities->emu1010)
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pitch_target = PITCH_48000; /* Disable interpolators on emu1010 card */
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else
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pitch_target = emu10k1_calc_pitch_target(runtime->rate);
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snd_emu10k1_ptr_write(emu, PTRX_PITCHTARGET, voice, pitch_target);
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snd_emu10k1_ptr_write(emu, PTRX_PITCHTARGET, voice, pitch_target);
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if (master || evoice->epcm->type == PLAYBACK_EFX)
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if (master || evoice->epcm->type == PLAYBACK_EFX)
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snd_emu10k1_ptr_write(emu, CPF_CURRENTPITCH, voice, pitch_target);
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snd_emu10k1_ptr_write(emu, CPF_CURRENTPITCH, voice, pitch_target);
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@ -1247,10 +1253,20 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
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* for 192kHz 24bit, one has 2 channels
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* for 192kHz 24bit, one has 2 channels
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*/
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*/
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#if 1
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#if 1
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/* For 48kHz */
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switch (emu->emu1010.internal_clock) {
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runtime->hw.rates = SNDRV_PCM_RATE_48000;
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case 0:
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runtime->hw.rate_min = runtime->hw.rate_max = 48000;
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/* For 44.1kHz */
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runtime->hw.channels_min = runtime->hw.channels_max = 8;
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runtime->hw.rates = SNDRV_PCM_RATE_44100;
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runtime->hw.rate_min = runtime->hw.rate_max = 44100;
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runtime->hw.channels_min = runtime->hw.channels_max = 8;
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break;
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case 1:
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/* For 48kHz */
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runtime->hw.rates = SNDRV_PCM_RATE_48000;
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runtime->hw.rate_min = runtime->hw.rate_max = 48000;
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runtime->hw.channels_min = runtime->hw.channels_max = 8;
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break;
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};
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#endif
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#endif
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#if 0
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#if 0
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/* For 96kHz */
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/* For 96kHz */
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