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ARC fixes for 5.10-rc6 

- More stack unwinding updates
 
  - Miscll minor fixes
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Merge tag 'arc-5.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC fixes from Vineet Gupta:
 "A couple more stack unwinder related fixes:

   - More stack unwinding updates

   - Misc minor fixes"

* tag 'arc-5.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARC: stack unwinding: reorganize how initial register state setup
  ARC: stack unwinding: don't assume non-current task is sleeping
  ARC: mm: fix spelling mistakes
  ARC: bitops: Remove unecessary operation and value
This commit is contained in:
Linus Torvalds 2020-11-24 12:12:55 -08:00
Родитель d5beb3140f f737561c70
Коммит b148942204
3 изменённых файлов: 44 добавлений и 40 удалений
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4
arch/arc/include/asm/bitops.h
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@ -243,10 +243,8 @@ static inline int constant_fls(unsigned int x)
x <<= 2; x <<= 2;
r -= 2; r -= 2;
} }
if (!(x & 0x80000000u)) { if (!(x & 0x80000000u))
x <<= 1;
r -= 1; r -= 1;
}
return r; return r;
} }

46
arch/arc/kernel/stacktrace.c
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@ -38,15 +38,27 @@
#ifdef CONFIG_ARC_DW2_UNWIND #ifdef CONFIG_ARC_DW2_UNWIND
static void seed_unwind_frame_info(struct task_struct *tsk, static int
struct pt_regs *regs, seed_unwind_frame_info(struct task_struct *tsk, struct pt_regs *regs,
struct unwind_frame_info *frame_info) struct unwind_frame_info *frame_info)
{ {
if (regs) {
/*
* Asynchronous unwinding of intr/exception
* - Just uses the pt_regs passed
*/
frame_info->task = tsk;
frame_info->regs.r27 = regs->fp;
frame_info->regs.r28 = regs->sp;
frame_info->regs.r31 = regs->blink;
frame_info->regs.r63 = regs->ret;
frame_info->call_frame = 0;
} else if (tsk == NULL || tsk == current) {
/* /*
* synchronous unwinding (e.g. dump_stack) * synchronous unwinding (e.g. dump_stack)
* - uses current values of SP and friends * - uses current values of SP and friends
*/ */
if (tsk == NULL && regs == NULL) {
unsigned long fp, sp, blink, ret; unsigned long fp, sp, blink, ret;
frame_info->task = current; frame_info->task = current;
@ -63,13 +75,17 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
frame_info->regs.r31 = blink; frame_info->regs.r31 = blink;
frame_info->regs.r63 = ret; frame_info->regs.r63 = ret;
frame_info->call_frame = 0; frame_info->call_frame = 0;
} else if (regs == NULL) { } else {
/* /*
* Asynchronous unwinding of sleeping task * Asynchronous unwinding of a likely sleeping task
* - Gets SP etc from task's pt_regs (saved bottom of kernel * - first ensure it is actually sleeping
* mode stack of task) * - if so, it will be in __switch_to, kernel mode SP of task
* is safe-kept and BLINK at a well known location in there
*/ */
if (tsk->state == TASK_RUNNING)
return -1;
frame_info->task = tsk; frame_info->task = tsk;
frame_info->regs.r27 = TSK_K_FP(tsk); frame_info->regs.r27 = TSK_K_FP(tsk);
@ -90,19 +106,8 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
frame_info->regs.r28 += 60; frame_info->regs.r28 += 60;
frame_info->call_frame = 0; frame_info->call_frame = 0;
} else {
/*
* Asynchronous unwinding of intr/exception
* - Just uses the pt_regs passed
*/
frame_info->task = tsk;
frame_info->regs.r27 = regs->fp;
frame_info->regs.r28 = regs->sp;
frame_info->regs.r31 = regs->blink;
frame_info->regs.r63 = regs->ret;
frame_info->call_frame = 0;
} }
return 0;
} }
#endif #endif
@ -116,7 +121,8 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
unsigned int address; unsigned int address;
struct unwind_frame_info frame_info; struct unwind_frame_info frame_info;
seed_unwind_frame_info(tsk, regs, &frame_info); if (seed_unwind_frame_info(tsk, regs, &frame_info))
return 0;
while (1) { while (1) {
address = UNW_PC(&frame_info); address = UNW_PC(&frame_info);

24
arch/arc/mm/tlb.c
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@ -30,14 +30,14 @@
* -Changes related to MMU v2 (Rel 4.8) * -Changes related to MMU v2 (Rel 4.8)
* *
* Vineetg: Aug 29th 2008 * Vineetg: Aug 29th 2008
* -In TLB Flush operations (Metal Fix MMU) there is a explict command to * -In TLB Flush operations (Metal Fix MMU) there is a explicit command to
* flush Micro-TLBS. If TLB Index Reg is invalid prior to TLBIVUTLB cmd, * flush Micro-TLBS. If TLB Index Reg is invalid prior to TLBIVUTLB cmd,
* it fails. Thus need to load it with ANY valid value before invoking * it fails. Thus need to load it with ANY valid value before invoking
* TLBIVUTLB cmd * TLBIVUTLB cmd
* *
* Vineetg: Aug 21th 2008: * Vineetg: Aug 21th 2008:
* -Reduced the duration of IRQ lockouts in TLB Flush routines * -Reduced the duration of IRQ lockouts in TLB Flush routines
* -Multiple copies of TLB erase code seperated into a "single" function * -Multiple copies of TLB erase code separated into a "single" function
* -In TLB Flush routines, interrupt disabling moved UP to retrieve ASID * -In TLB Flush routines, interrupt disabling moved UP to retrieve ASID
* in interrupt-safe region. * in interrupt-safe region.
* *
@ -66,7 +66,7 @@
* *
* Although J-TLB is 2 way set assoc, ARC700 caches J-TLB into uTLBS which has * Although J-TLB is 2 way set assoc, ARC700 caches J-TLB into uTLBS which has
* much higher associativity. u-D-TLB is 8 ways, u-I-TLB is 4 ways. * much higher associativity. u-D-TLB is 8 ways, u-I-TLB is 4 ways.
* Given this, the thrasing problem should never happen because once the 3 * Given this, the thrashing problem should never happen because once the 3
* J-TLB entries are created (even though 3rd will knock out one of the prev * J-TLB entries are created (even though 3rd will knock out one of the prev
* two), the u-D-TLB and u-I-TLB will have what is required to accomplish memcpy * two), the u-D-TLB and u-I-TLB will have what is required to accomplish memcpy
* *
@ -127,7 +127,7 @@ static void utlb_invalidate(void)
* There was however an obscure hardware bug, where uTLB flush would * There was however an obscure hardware bug, where uTLB flush would
* fail when a prior probe for J-TLB (both totally unrelated) would * fail when a prior probe for J-TLB (both totally unrelated) would
* return lkup err - because the entry didn't exist in MMU. * return lkup err - because the entry didn't exist in MMU.
* The Workround was to set Index reg with some valid value, prior to * The Workaround was to set Index reg with some valid value, prior to
* flush. This was fixed in MMU v3 * flush. This was fixed in MMU v3
*/ */
unsigned int idx; unsigned int idx;
@ -272,7 +272,7 @@ noinline void local_flush_tlb_all(void)
} }
/* /*
* Flush the entrie MM for userland. The fastest way is to move to Next ASID * Flush the entire MM for userland. The fastest way is to move to Next ASID
*/ */
noinline void local_flush_tlb_mm(struct mm_struct *mm) noinline void local_flush_tlb_mm(struct mm_struct *mm)
{ {
@ -303,7 +303,7 @@ noinline void local_flush_tlb_mm(struct mm_struct *mm)
* Difference between this and Kernel Range Flush is * Difference between this and Kernel Range Flush is
* -Here the fastest way (if range is too large) is to move to next ASID * -Here the fastest way (if range is too large) is to move to next ASID
* without doing any explicit Shootdown * without doing any explicit Shootdown
* -In case of kernel Flush, entry has to be shot down explictly * -In case of kernel Flush, entry has to be shot down explicitly
*/ */
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end) unsigned long end)
@ -620,7 +620,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
* Super Page size is configurable in hardware (4K to 16M), but fixed once * Super Page size is configurable in hardware (4K to 16M), but fixed once
* RTL builds. * RTL builds.
* *
* The exact THP size a Linx configuration will support is a function of: * The exact THP size a Linux configuration will support is a function of:
* - MMU page size (typical 8K, RTL fixed) * - MMU page size (typical 8K, RTL fixed)
* - software page walker address split between PGD:PTE:PFN (typical * - software page walker address split between PGD:PTE:PFN (typical
* 11:8:13, but can be changed with 1 line) * 11:8:13, but can be changed with 1 line)
@ -698,7 +698,7 @@ void local_flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start,
#endif #endif
/* Read the Cache Build Confuration Registers, Decode them and save into /* Read the Cache Build Configuration Registers, Decode them and save into
* the cpuinfo structure for later use. * the cpuinfo structure for later use.
* No Validation is done here, simply read/convert the BCRs * No Validation is done here, simply read/convert the BCRs
*/ */
@ -803,13 +803,13 @@ void arc_mmu_init(void)
pr_info("%s", arc_mmu_mumbojumbo(0, str, sizeof(str))); pr_info("%s", arc_mmu_mumbojumbo(0, str, sizeof(str)));
/* /*
* Can't be done in processor.h due to header include depenedencies * Can't be done in processor.h due to header include dependencies
*/ */
BUILD_BUG_ON(!IS_ALIGNED((CONFIG_ARC_KVADDR_SIZE << 20), PMD_SIZE)); BUILD_BUG_ON(!IS_ALIGNED((CONFIG_ARC_KVADDR_SIZE << 20), PMD_SIZE));
/* /*
* stack top size sanity check, * stack top size sanity check,
* Can't be done in processor.h due to header include depenedencies * Can't be done in processor.h due to header include dependencies
*/ */
BUILD_BUG_ON(!IS_ALIGNED(STACK_TOP, PMD_SIZE)); BUILD_BUG_ON(!IS_ALIGNED(STACK_TOP, PMD_SIZE));
@ -881,7 +881,7 @@ void arc_mmu_init(void)
* the duplicate one. * the duplicate one.
* -Knob to be verbose abt it.(TODO: hook them up to debugfs) * -Knob to be verbose abt it.(TODO: hook them up to debugfs)
*/ */
volatile int dup_pd_silent; /* Be slient abt it or complain (default) */ volatile int dup_pd_silent; /* Be silent abt it or complain (default) */
void do_tlb_overlap_fault(unsigned long cause, unsigned long address, void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
struct pt_regs *regs) struct pt_regs *regs)
@ -948,7 +948,7 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
/*********************************************************************** /***********************************************************************
* Diagnostic Routines * Diagnostic Routines
* -Called from Low Level TLB Hanlders if things don;t look good * -Called from Low Level TLB Handlers if things don;t look good
**********************************************************************/ **********************************************************************/
#ifdef CONFIG_ARC_DBG_TLB_PARANOIA #ifdef CONFIG_ARC_DBG_TLB_PARANOIA