media: staging: media: tegra-vde: Manually pack UAPI structures
The __packed macro isn't available in userspace with the kernel headers. Checkpatch asks to use the macro, which is unwanted in a case of a UAPI header. There is no much benefit in a tight packing of the structures, hence let's pack them manually to cleanup things a tad. Note that there is no old-stable userspace that will suffer from this change, hence it's fine to change the ABI. In a result also more space is reserved for a possible future expansion of the UAPI as it was already shown that more fields will be needed for a later SoC generations. Suggested-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -795,7 +795,7 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
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{
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struct device *dev = vde->miscdev.parent;
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struct tegra_vde_h264_decoder_ctx ctx;
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struct tegra_vde_h264_frame frames[17];
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struct tegra_vde_h264_frame *frames;
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struct tegra_vde_h264_frame __user *frames_user;
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struct video_frame *dpb_frames;
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struct dma_buf_attachment *bitstream_data_dmabuf_attachment;
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@ -830,11 +830,17 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
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if (ret)
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return ret;
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frames = kmalloc_array(ctx.dpb_frames_nb, sizeof(*frames), GFP_KERNEL);
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if (!frames) {
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ret = -ENOMEM;
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goto release_bitstream_dmabuf;
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}
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dpb_frames = kcalloc(ctx.dpb_frames_nb, sizeof(*dpb_frames),
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GFP_KERNEL);
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if (!dpb_frames) {
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ret = -ENOMEM;
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goto release_bitstream_dmabuf;
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goto free_frames;
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}
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macroblocks_nb = ctx.pic_width_in_mbs * ctx.pic_height_in_mbs;
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@ -955,6 +961,9 @@ release_dpb_frames:
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free_dpb_frames:
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kfree(dpb_frames);
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free_frames:
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kfree(frames);
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release_bitstream_dmabuf:
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tegra_vde_detach_and_put_dmabuf(bitstream_data_dmabuf_attachment,
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bitstream_sgt, DMA_TO_DEVICE);
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@ -21,40 +21,42 @@ struct tegra_vde_h264_frame {
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__u32 frame_num;
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__u32 flags;
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__u32 reserved;
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} __attribute__((packed));
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// Must be zero'ed
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__u32 reserved[6];
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};
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struct tegra_vde_h264_decoder_ctx {
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__s32 bitstream_data_fd;
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__u32 bitstream_data_offset;
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__u64 dpb_frames_ptr;
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__u8 dpb_frames_nb;
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__u8 dpb_ref_frames_with_earlier_poc_nb;
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__u32 dpb_frames_nb;
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__u32 dpb_ref_frames_with_earlier_poc_nb;
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// SPS
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__u8 baseline_profile;
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__u8 level_idc;
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__u8 log2_max_pic_order_cnt_lsb;
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__u8 log2_max_frame_num;
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__u8 pic_order_cnt_type;
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__u8 direct_8x8_inference_flag;
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__u8 pic_width_in_mbs;
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__u8 pic_height_in_mbs;
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__u32 baseline_profile;
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__u32 level_idc;
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__u32 log2_max_pic_order_cnt_lsb;
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__u32 log2_max_frame_num;
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__u32 pic_order_cnt_type;
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__u32 direct_8x8_inference_flag;
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__u32 pic_width_in_mbs;
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__u32 pic_height_in_mbs;
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// PPS
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__u8 pic_init_qp;
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__u8 deblocking_filter_control_present_flag;
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__u8 constrained_intra_pred_flag;
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__u8 chroma_qp_index_offset;
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__u8 pic_order_present_flag;
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__u32 pic_init_qp;
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__u32 deblocking_filter_control_present_flag;
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__u32 constrained_intra_pred_flag;
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__u32 chroma_qp_index_offset;
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__u32 pic_order_present_flag;
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// Slice header
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__u8 num_ref_idx_l0_active_minus1;
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__u8 num_ref_idx_l1_active_minus1;
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__u32 num_ref_idx_l0_active_minus1;
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__u32 num_ref_idx_l1_active_minus1;
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__u32 reserved;
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} __attribute__((packed));
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// Must be zero'ed
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__u32 reserved[11];
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};
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#define VDE_IOCTL_BASE ('v' + 0x20)
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