edac: add DDR3 memory type for MPC85xx EDAC
Since some new MPC85xx SOCs support DDR3 memory now, so add DDR3 memory type for MPC85xx EDAC. Signed-off-by: Yang Shi <yang.shi@windriver.com> Cc: Doug Thompson <norsk5@yahoo.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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b1cfebc923
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@ -150,6 +150,8 @@ enum mem_type {
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MEM_FB_DDR2, /* fully buffered DDR2 */
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MEM_RDDR2, /* Registered DDR2 RAM */
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MEM_XDR, /* Rambus XDR */
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MEM_DDR3, /* DDR3 RAM */
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MEM_RDDR3, /* Registered DDR3 RAM */
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};
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#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
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@ -167,6 +169,8 @@ enum mem_type {
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#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
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#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
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#define MEM_FLAG_XDR BIT(MEM_XDR)
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#define MEM_FLAG_DDR3 BIT(MEM_DDR3)
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#define MEM_FLAG_RDDR3 BIT(MEM_RDDR3)
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/* chipset Error Detection and Correction capabilities and mode */
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enum edac_type {
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@ -94,7 +94,9 @@ static const char *mem_types[] = {
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[MEM_DDR2] = "Unbuffered-DDR2",
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[MEM_FB_DDR2] = "FullyBuffered-DDR2",
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[MEM_RDDR2] = "Registered-DDR2",
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[MEM_XDR] = "XDR"
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[MEM_XDR] = "XDR",
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[MEM_DDR3] = "Unbuffered-DDR3",
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[MEM_RDDR3] = "Registered-DDR3"
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};
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static const char *dev_types[] = {
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@ -757,6 +757,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
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case DSC_SDTYPE_DDR2:
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mtype = MEM_RDDR2;
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break;
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case DSC_SDTYPE_DDR3:
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mtype = MEM_RDDR3;
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break;
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default:
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mtype = MEM_UNKNOWN;
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break;
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@ -769,6 +772,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
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case DSC_SDTYPE_DDR2:
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mtype = MEM_DDR2;
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break;
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case DSC_SDTYPE_DDR3:
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mtype = MEM_DDR3;
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break;
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default:
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mtype = MEM_UNKNOWN;
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break;
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@ -53,6 +53,7 @@
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#define DSC_SDTYPE_DDR 0x02000000
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#define DSC_SDTYPE_DDR2 0x03000000
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#define DSC_SDTYPE_DDR3 0x07000000
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#define DSC_X32_EN 0x00000020
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/* Err_Int_En */
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