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KVM: x86 emulator: expand decode flags to 64 bits 

Unifiying the operands means not taking advantage of the fact that some
operand types can only go into certain operands (for example, DI can only
be used by the destination), so we need more bits to hold the operand type.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Avi Kivity 2011-09-13 10:45:42 +03:00
Родитель a99455499a
Коммит b1ea50b2b6
2 изменённых файлов: 20 добавлений и 20 удалений
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2
arch/x86/include/asm/kvm_emulate.h
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@ -262,7 +262,7 @@ struct x86_emulate_ctxt {
struct operand dst; struct operand dst;
bool has_seg_override; bool has_seg_override;
u8 seg_override; u8 seg_override;
unsigned int d; u64 d;
int (*execute)(struct x86_emulate_ctxt *ctxt); int (*execute)(struct x86_emulate_ctxt *ctxt);
int (*check_perm)(struct x86_emulate_ctxt *ctxt); int (*check_perm)(struct x86_emulate_ctxt *ctxt);
/* modrm */ /* modrm */

38
arch/x86/kvm/emulate.c
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@ -31,18 +31,18 @@
/* /*
* Operand types * Operand types
*/ */
#define OpNone 0 #define OpNone 0ull
#define OpImplicit 1 /* No generic decode */ #define OpImplicit 1ull /* No generic decode */
#define OpReg 2 /* Register */ #define OpReg 2ull /* Register */
#define OpMem 3 /* Memory */ #define OpMem 3ull /* Memory */
#define OpAcc 4 /* Accumulator: AL/AX/EAX/RAX */ #define OpAcc 4ull /* Accumulator: AL/AX/EAX/RAX */
#define OpDI 5 /* ES:DI/EDI/RDI */ #define OpDI 5ull /* ES:DI/EDI/RDI */
#define OpMem64 6 /* Memory, 64-bit */ #define OpMem64 6ull /* Memory, 64-bit */
#define OpImmUByte 7 /* Zero-extended 8-bit immediate */ #define OpImmUByte 7ull /* Zero-extended 8-bit immediate */
#define OpDX 8 /* DX register */ #define OpDX 8ull /* DX register */
#define OpBits 4 /* Width of operand field */ #define OpBits 4 /* Width of operand field */
#define OpMask ((1 << OpBits) - 1) #define OpMask ((1ull << OpBits) - 1)
/* /*
* Opcode effective-address decode tables. * Opcode effective-address decode tables.
@ -108,12 +108,12 @@
#define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */ #define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */
#define No64 (1<<28) #define No64 (1<<28)
/* Source 2 operand type */ /* Source 2 operand type */
#define Src2None (0<<29) #define Src2None (0u<<29)
#define Src2CL (1<<29) #define Src2CL (1u<<29)
#define Src2ImmByte (2<<29) #define Src2ImmByte (2u<<29)
#define Src2One (3<<29) #define Src2One (3u<<29)
#define Src2Imm (4<<29) #define Src2Imm (4u<<29)
#define Src2Mask (7<<29) #define Src2Mask (7u<<29)
#define X2(x...) x, x #define X2(x...) x, x
#define X3(x...) X2(x), x #define X3(x...) X2(x), x
@ -125,8 +125,8 @@
#define X16(x...) X8(x), X8(x) #define X16(x...) X8(x), X8(x)
struct opcode { struct opcode {
u32 flags; u64 flags : 56;
u8 intercept; u64 intercept : 8;
union { union {
int (*execute)(struct x86_emulate_ctxt *ctxt); int (*execute)(struct x86_emulate_ctxt *ctxt);
struct opcode *group; struct opcode *group;
@ -3530,7 +3530,7 @@ done_prefixes:
return EMULATION_FAILED; return EMULATION_FAILED;
} }
ctxt->d &= ~GroupMask; ctxt->d &= ~(u64)GroupMask;
ctxt->d |= opcode.flags; ctxt->d |= opcode.flags;
} }