powerpc/book3s/32: do not include pte-common.h
As done for book3s/64, add necessary flags/defines in book3s/32/pgtable.h and do not include pte-common.h It allows in the meantime to remove all related hash definitions from pte-common.h and to also remove _PAGE_EXEC default as _PAGE_EXEC is defined on all platforms except book3s/32. Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Leroy
Michael Ellerman
Родитель
f4805785f0
Коммит
b2133bd7a5
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@ -8,7 +8,102 @@
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#include <asm/book3s/32/hash.h>
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/* And here we include common definitions */
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#include <asm/pte-common.h>
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#define _PAGE_KERNEL_RO 0
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#define _PAGE_KERNEL_ROX 0
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#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
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#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW)
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#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
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#ifndef __ASSEMBLY__
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static inline bool pte_user(pte_t pte)
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{
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return pte_val(pte) & _PAGE_USER;
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}
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#endif /* __ASSEMBLY__ */
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/*
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* Location of the PFN in the PTE. Most 32-bit platforms use the same
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* as _PAGE_SHIFT here (ie, naturally aligned).
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* Platform who don't just pre-define the value so we don't override it here.
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*/
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#define PTE_RPN_SHIFT (PAGE_SHIFT)
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/*
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* The mask covered by the RPN must be a ULL on 32-bit platforms with
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* 64-bit PTEs.
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*/
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#ifdef CONFIG_PTE_64BIT
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#define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1))
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#else
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#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
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#endif
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/*
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* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes.
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HASHPTE | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_DIRTY)
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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*/
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
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#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
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/*
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* Permission masks used to generate the __P and __S table.
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*
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* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
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*
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* Write permissions imply read permissions for now.
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*/
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#define PAGE_NONE __pgprot(_PAGE_BASE)
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#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
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#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
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#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER)
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | _PAGE_NO_CACHE)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE | _PAGE_GUARDED)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
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/*
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* Protection used for kernel text. We want the debuggers to be able to
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* set breakpoints anywhere, so don't write protect the kernel text
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* on platforms where such control is possible.
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*/
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
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defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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/* Make modules code happy. We don't set RO yet */
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#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
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/* Advertise special mapping type for AGP */
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#define HAVE_PAGE_AGP
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#define PTE_INDEX_SIZE PTE_SHIFT
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#define PMD_INDEX_SIZE 0
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@ -219,7 +314,7 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), _PAGE_RO);
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pte_update(ptep, _PAGE_RW, 0);
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}
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static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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@ -235,9 +330,8 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
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{
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unsigned long set = pte_val(entry) &
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(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
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unsigned long clr = ~pte_val(entry) & _PAGE_RO;
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pte_update(ptep, clr, set);
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pte_update(ptep, 0, set);
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flush_tlb_page(vma, address);
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}
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@ -5,15 +5,9 @@
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* Some bits are only used on some cpu families... Make sure that all
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* the undefined gets a sensible default
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*/
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#ifndef _PAGE_HASHPTE
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#define _PAGE_HASHPTE 0
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#endif
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#ifndef _PAGE_HWWRITE
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#define _PAGE_HWWRITE 0
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#endif
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#ifndef _PAGE_EXEC
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#define _PAGE_EXEC 0
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#endif
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#ifndef _PAGE_COHERENT
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#define _PAGE_COHERENT 0
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#endif
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@ -68,11 +62,8 @@
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#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_RW | \
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_PAGE_HWWRITE | _PAGE_EXEC)
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#endif
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#ifndef _PAGE_HPTEFLAGS
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#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
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#endif
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#ifndef _PTE_NONE_MASK
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#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
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#define _PTE_NONE_MASK 0
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#endif
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#ifndef __ASSEMBLY__
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@ -108,7 +99,7 @@ static inline bool pte_user(pte_t pte)
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/* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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/* Mask of bits returned by pte_pgprot() */
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@ -125,8 +116,7 @@ static inline bool pte_user(pte_t pte)
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* the processor might need it for DMA coherency.
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*/
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
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#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
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defined(CONFIG_PPC_E500MC)
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#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
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#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
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#else
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#define _PAGE_BASE (_PAGE_BASE_NC)
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