gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
During calibration, sets the "internal reference level for drive pull- down" to the value specified in the Tegra TRM. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -72,6 +72,7 @@
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#define MIPI_CAL_BIAS_PAD_E_VCLAMP_REF (1 << 0)
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#define MIPI_CAL_BIAS_PAD_CFG1 0x17
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#define MIPI_CAL_BIAS_PAD_DRV_DN_REF(x) (((x) & 0x7) << 16)
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#define MIPI_CAL_BIAS_PAD_CFG2 0x18
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#define MIPI_CAL_BIAS_PAD_PDVREG (1 << 1)
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@ -203,6 +204,9 @@ int tegra_mipi_calibrate(struct tegra_mipi_device *device)
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value |= MIPI_CAL_BIAS_PAD_E_VCLAMP_REF;
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tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG0);
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tegra_mipi_writel(device->mipi, MIPI_CAL_BIAS_PAD_DRV_DN_REF(2),
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MIPI_CAL_BIAS_PAD_CFG1);
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value = tegra_mipi_readl(device->mipi, MIPI_CAL_BIAS_PAD_CFG2);
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value &= ~MIPI_CAL_BIAS_PAD_PDVREG;
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tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG2);
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