Merge branch 'sched/urgent' into sched/core, to resolve conflicts
This commit in sched/urgent moved the cfs_rq_is_decayed() function: a7b359fc6a37: ("sched/fair: Correctly insert cfs_rq's to list on unthrottle") and this fresh commit in sched/core modified it in the old location: 9e077b52d86a: ("sched/pelt: Check that *_avg are null when *_sum are") Merge the two variants. Conflicts: kernel/sched/fair.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Коммит
b2c0931a07
|
@ -109,8 +109,8 @@ ForEachMacros:
|
|||
- 'css_for_each_child'
|
||||
- 'css_for_each_descendant_post'
|
||||
- 'css_for_each_descendant_pre'
|
||||
- 'cxl_for_each_cmd'
|
||||
- 'device_for_each_child_node'
|
||||
- 'displayid_iter_for_each'
|
||||
- 'dma_fence_chain_for_each'
|
||||
- 'do_for_each_ftrace_op'
|
||||
- 'drm_atomic_crtc_for_each_plane'
|
||||
|
@ -136,6 +136,7 @@ ForEachMacros:
|
|||
- 'drm_mm_for_each_node_in_range'
|
||||
- 'drm_mm_for_each_node_safe'
|
||||
- 'flow_action_for_each'
|
||||
- 'for_each_acpi_dev_match'
|
||||
- 'for_each_active_dev_scope'
|
||||
- 'for_each_active_drhd_unit'
|
||||
- 'for_each_active_iommu'
|
||||
|
@ -171,7 +172,6 @@ ForEachMacros:
|
|||
- 'for_each_dapm_widgets'
|
||||
- 'for_each_dev_addr'
|
||||
- 'for_each_dev_scope'
|
||||
- 'for_each_displayid_db'
|
||||
- 'for_each_dma_cap_mask'
|
||||
- 'for_each_dpcm_be'
|
||||
- 'for_each_dpcm_be_rollback'
|
||||
|
@ -179,6 +179,7 @@ ForEachMacros:
|
|||
- 'for_each_dpcm_fe'
|
||||
- 'for_each_drhd_unit'
|
||||
- 'for_each_dss_dev'
|
||||
- 'for_each_dtpm_table'
|
||||
- 'for_each_efi_memory_desc'
|
||||
- 'for_each_efi_memory_desc_in_map'
|
||||
- 'for_each_element'
|
||||
|
@ -215,6 +216,7 @@ ForEachMacros:
|
|||
- 'for_each_migratetype_order'
|
||||
- 'for_each_msi_entry'
|
||||
- 'for_each_msi_entry_safe'
|
||||
- 'for_each_msi_vector'
|
||||
- 'for_each_net'
|
||||
- 'for_each_net_continue_reverse'
|
||||
- 'for_each_netdev'
|
||||
|
@ -270,6 +272,12 @@ ForEachMacros:
|
|||
- 'for_each_prime_number_from'
|
||||
- 'for_each_process'
|
||||
- 'for_each_process_thread'
|
||||
- 'for_each_prop_codec_conf'
|
||||
- 'for_each_prop_dai_codec'
|
||||
- 'for_each_prop_dai_cpu'
|
||||
- 'for_each_prop_dlc_codecs'
|
||||
- 'for_each_prop_dlc_cpus'
|
||||
- 'for_each_prop_dlc_platforms'
|
||||
- 'for_each_property_of_node'
|
||||
- 'for_each_registered_fb'
|
||||
- 'for_each_requested_gpio'
|
||||
|
@ -430,6 +438,7 @@ ForEachMacros:
|
|||
- 'queue_for_each_hw_ctx'
|
||||
- 'radix_tree_for_each_slot'
|
||||
- 'radix_tree_for_each_tagged'
|
||||
- 'rb_for_each'
|
||||
- 'rbtree_postorder_for_each_entry_safe'
|
||||
- 'rdma_for_each_block'
|
||||
- 'rdma_for_each_port'
|
||||
|
|
3
.mailmap
3
.mailmap
|
@ -243,6 +243,9 @@ Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
|
|||
Mayuresh Janorkar <mayur@ti.com>
|
||||
Michael Buesch <m@bues.ch>
|
||||
Michel Dänzer <michel@tungstengraphics.com>
|
||||
Michel Lespinasse <michel@lespinasse.org>
|
||||
Michel Lespinasse <michel@lespinasse.org> <walken@google.com>
|
||||
Michel Lespinasse <michel@lespinasse.org> <walken@zoy.org>
|
||||
Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
|
||||
Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
|
||||
|
|
|
@ -149,6 +149,17 @@ properties:
|
|||
maxItems: 6
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
sink-vdos-v1:
|
||||
description: An array of u32 with each entry, a Vendor Defined Message Object (VDO),
|
||||
providing additional information corresponding to the product, the detailed bit
|
||||
definitions and the order of each VDO can be found in
|
||||
"USB Power Delivery Specification Revision 2.0, Version 1.3" chapter 6.4.4.3.1 Discover
|
||||
Identity. User can specify the VDO array via VDO_IDH/_CERT/_PRODUCT/_CABLE/_AMA defined in
|
||||
dt-bindings/usb/pd.h.
|
||||
minItems: 3
|
||||
maxItems: 6
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
op-sink-microwatt:
|
||||
description: Sink required operating power in microwatt, if source can't
|
||||
offer the power, Capability Mismatch is set. Required for power sink and
|
||||
|
@ -207,6 +218,10 @@ properties:
|
|||
SNK_READY for non-pd link.
|
||||
type: boolean
|
||||
|
||||
dependencies:
|
||||
sink-vdos-v1: [ 'sink-vdos' ]
|
||||
sink-vdos: [ 'sink-vdos-v1' ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@ examples:
|
|||
#size-cells = <0>;
|
||||
|
||||
adc@48 {
|
||||
comatible = "ti,ads7828";
|
||||
compatible = "ti,ads7828";
|
||||
reg = <0x48>;
|
||||
vref-supply = <&vref>;
|
||||
ti,differential-input;
|
||||
|
|
|
@ -67,9 +67,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
items:
|
||||
- const: fck
|
||||
const: fck
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
|
|
@ -57,7 +57,7 @@ patternProperties:
|
|||
rate
|
||||
|
||||
sound-dai:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description: phandle of the CPU DAI
|
||||
|
||||
patternProperties:
|
||||
|
@ -71,7 +71,7 @@ patternProperties:
|
|||
|
||||
properties:
|
||||
sound-dai:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description: phandle of the codec DAI
|
||||
|
||||
required:
|
||||
|
|
|
@ -171,8 +171,8 @@ Shadow pages contain the following information:
|
|||
shadow pages) so role.quadrant takes values in the range 0..3. Each
|
||||
quadrant maps 1GB virtual address space.
|
||||
role.access:
|
||||
Inherited guest access permissions in the form uwx. Note execute
|
||||
permission is positive, not negative.
|
||||
Inherited guest access permissions from the parent ptes in the form uwx.
|
||||
Note execute permission is positive, not negative.
|
||||
role.invalid:
|
||||
The page is invalid and should not be used. It is a root page that is
|
||||
currently pinned (by a cpu hardware register pointing to it); once it is
|
||||
|
|
21
MAINTAINERS
21
MAINTAINERS
|
@ -3877,6 +3877,7 @@ L: linux-btrfs@vger.kernel.org
|
|||
S: Maintained
|
||||
W: http://btrfs.wiki.kernel.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-btrfs/list/
|
||||
C: irc://irc.libera.chat/btrfs
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git
|
||||
F: Documentation/filesystems/btrfs.rst
|
||||
F: fs/btrfs/
|
||||
|
@ -6945,6 +6946,7 @@ F: net/core/failover.c
|
|||
FANOTIFY
|
||||
M: Jan Kara <jack@suse.cz>
|
||||
R: Amir Goldstein <amir73il@gmail.com>
|
||||
R: Matthew Bobrowski <repnop@google.com>
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: fs/notify/fanotify/
|
||||
|
@ -12903,7 +12905,7 @@ F: net/ipv4/nexthop.c
|
|||
|
||||
NFC SUBSYSTEM
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
||||
L: linux-nfc@lists.01.org (moderated for non-subscribers)
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/nfc/
|
||||
|
@ -12916,7 +12918,7 @@ F: net/nfc/
|
|||
NFC VIRTUAL NCI DEVICE DRIVER
|
||||
M: Bongsu Jeon <bongsu.jeon@samsung.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-nfc@lists.01.org (moderated for non-subscribers)
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
S: Supported
|
||||
F: drivers/nfc/virtual_ncidev.c
|
||||
F: tools/testing/selftests/nci/
|
||||
|
@ -13214,7 +13216,7 @@ F: sound/soc/codecs/tfa9879*
|
|||
|
||||
NXP-NCI NFC DRIVER
|
||||
R: Charles Gorand <charles.gorand@effinnov.com>
|
||||
L: linux-nfc@lists.01.org (moderated for non-subscribers)
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
S: Supported
|
||||
F: drivers/nfc/nxp-nci
|
||||
|
||||
|
@ -14117,6 +14119,7 @@ F: drivers/pci/controller/pci-v3-semi.c
|
|||
PCI ENDPOINT SUBSYSTEM
|
||||
M: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
R: Krzysztof Wilczyński <kw@linux.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/PCI/endpoint/*
|
||||
|
@ -14165,6 +14168,7 @@ F: drivers/pci/controller/pci-xgene-msi.c
|
|||
PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
|
||||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
R: Rob Herring <robh@kernel.org>
|
||||
R: Krzysztof Wilczyński <kw@linux.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
Q: http://patchwork.ozlabs.org/project/linux-pci/list/
|
||||
|
@ -16143,7 +16147,7 @@ F: include/media/drv-intf/s3c_camif.h
|
|||
SAMSUNG S3FWRN5 NFC DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
||||
M: Krzysztof Opasiak <k.opasiak@samsung.com>
|
||||
L: linux-nfc@lists.01.org (moderated for non-subscribers)
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml
|
||||
F: drivers/nfc/s3fwrn5
|
||||
|
@ -18333,7 +18337,7 @@ F: sound/soc/codecs/tas571x*
|
|||
TI TRF7970A NFC DRIVER
|
||||
M: Mark Greer <mgreer@animalcreek.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: linux-nfc@lists.01.org (moderated for non-subscribers)
|
||||
L: linux-nfc@lists.01.org (subscribers-only)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/nfc/trf7970a.txt
|
||||
F: drivers/nfc/trf7970a.c
|
||||
|
@ -18869,6 +18873,13 @@ S: Maintained
|
|||
F: drivers/usb/host/isp116x*
|
||||
F: include/linux/usb/isp116x.h
|
||||
|
||||
USB ISP1760 DRIVER
|
||||
M: Rui Miguel Silva <rui.silva@linaro.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/isp1760/*
|
||||
F: Documentation/devicetree/bindings/usb/nxp,isp1760.yaml
|
||||
|
||||
USB LAN78XX ETHERNET DRIVER
|
||||
M: Woojung Huh <woojung.huh@microchip.com>
|
||||
M: UNGLinuxDriver@microchip.com
|
||||
|
|
2
Makefile
2
Makefile
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 13
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Frozen Wasteland
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -105,9 +105,13 @@
|
|||
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
||||
phy-reset-duration = <20>;
|
||||
phy-supply = <&sw2_reg>;
|
||||
phy-handle = <ðphy0>;
|
||||
status = "okay";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
@ -406,6 +406,18 @@
|
|||
vin-supply = <&sw1_reg>;
|
||||
};
|
||||
|
||||
®_pu {
|
||||
vin-supply = <&sw1_reg>;
|
||||
};
|
||||
|
||||
®_vdd1p1 {
|
||||
vin-supply = <&sw2_reg>;
|
||||
};
|
||||
|
||||
®_vdd2p5 {
|
||||
vin-supply = <&sw2_reg>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
|
|
|
@ -126,7 +126,7 @@
|
|||
compatible = "nxp,pca8574";
|
||||
reg = <0x3a>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <1>;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -193,7 +193,7 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
keep-power-in-suspend;
|
||||
tuning-step = <2>;
|
||||
fsl,tuning-step = <2>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
no-1-8-v;
|
||||
broken-cd;
|
||||
|
|
|
@ -351,7 +351,7 @@
|
|||
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
||||
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
tuning-step = <2>;
|
||||
fsl,tuning-step = <2>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
wakeup-source;
|
||||
no-1-8-v;
|
||||
|
|
|
@ -7,9 +7,11 @@
|
|||
#ifdef CONFIG_CPU_IDLE
|
||||
extern int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index);
|
||||
#define __cpuidle_method_section __used __section("__cpuidle_method_of_table")
|
||||
#else
|
||||
static inline int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index) { return -ENODEV; }
|
||||
#define __cpuidle_method_section __maybe_unused /* drop silently */
|
||||
#endif
|
||||
|
||||
/* Common ARM WFI state */
|
||||
|
@ -42,8 +44,7 @@ struct of_cpuidle_method {
|
|||
|
||||
#define CPUIDLE_METHOD_OF_DECLARE(name, _method, _ops) \
|
||||
static const struct of_cpuidle_method __cpuidle_method_of_table_##name \
|
||||
__used __section("__cpuidle_method_of_table") \
|
||||
= { .method = _method, .ops = _ops }
|
||||
__cpuidle_method_section = { .method = _method, .ops = _ops }
|
||||
|
||||
extern int arm_cpuidle_suspend(int index);
|
||||
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/suspend.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
static int mx27_suspend_enter(suspend_state_t state)
|
||||
|
|
|
@ -458,20 +458,6 @@ static struct gpiod_lookup_table leds_gpio_table = {
|
|||
|
||||
#ifdef CONFIG_LEDS_TRIGGERS
|
||||
DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger);
|
||||
|
||||
static int ams_delta_camera_power(struct device *dev, int power)
|
||||
{
|
||||
/*
|
||||
* turn on camera LED
|
||||
*/
|
||||
if (power)
|
||||
led_trigger_event(ams_delta_camera_led_trigger, LED_FULL);
|
||||
else
|
||||
led_trigger_event(ams_delta_camera_led_trigger, LED_OFF);
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define ams_delta_camera_power NULL
|
||||
#endif
|
||||
|
||||
static struct platform_device ams_delta_audio_device = {
|
||||
|
|
|
@ -320,7 +320,7 @@ static int tps_setup(struct i2c_client *client, void *context)
|
|||
{
|
||||
if (!IS_BUILTIN(CONFIG_TPS65010))
|
||||
return -ENOSYS;
|
||||
|
||||
|
||||
tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
|
||||
TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
|
||||
|
||||
|
@ -394,6 +394,8 @@ static void __init h2_init(void)
|
|||
BUG_ON(gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
|
||||
gpio_direction_input(H2_NAND_RB_GPIO_PIN);
|
||||
|
||||
gpiod_add_lookup_table(&isp1301_gpiod_table);
|
||||
|
||||
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
|
||||
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
|
||||
|
||||
|
|
|
@ -655,9 +655,13 @@ static int __init omap_pm_init(void)
|
|||
irq = INT_7XX_WAKE_UP_REQ;
|
||||
else if (cpu_is_omap16xx())
|
||||
irq = INT_1610_WAKE_UP_REQ;
|
||||
if (request_irq(irq, omap_wakeup_interrupt, 0, "peripheral wakeup",
|
||||
NULL))
|
||||
pr_err("Failed to request irq %d (peripheral wakeup)\n", irq);
|
||||
else
|
||||
irq = -1;
|
||||
|
||||
if (irq >= 0) {
|
||||
if (request_irq(irq, omap_wakeup_interrupt, 0, "peripheral wakeup", NULL))
|
||||
pr_err("Failed to request irq %d (peripheral wakeup)\n", irq);
|
||||
}
|
||||
|
||||
/* Program new power ramp-up time
|
||||
* (0 for most boards since we don't lower voltage when in deep sleep)
|
||||
|
|
|
@ -322,6 +322,7 @@ static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
|
|||
|
||||
static void n8x0_mmc_callback(void *data, u8 card_mask)
|
||||
{
|
||||
#ifdef CONFIG_MMC_OMAP
|
||||
int bit, *openp, index;
|
||||
|
||||
if (board_is_n800()) {
|
||||
|
@ -339,7 +340,6 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
|
|||
else
|
||||
*openp = 0;
|
||||
|
||||
#ifdef CONFIG_MMC_OMAP
|
||||
omap_mmc_notify_cover_event(mmc_device, index, *openp);
|
||||
#else
|
||||
pr_warn("MMC: notify cover event not available\n");
|
||||
|
|
|
@ -165,6 +165,7 @@ config ARCH_MEDIATEK
|
|||
|
||||
config ARCH_MESON
|
||||
bool "Amlogic Platforms"
|
||||
select COMMON_CLK
|
||||
select MESON_IRQ_GPIO
|
||||
help
|
||||
This enables support for the arm64 based Amlogic SoCs
|
||||
|
|
|
@ -46,7 +46,8 @@
|
|||
eee-broken-100tx;
|
||||
qca,clk-out-frequency = <125000000>;
|
||||
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
|
||||
vddio-supply = <&vddh>;
|
||||
qca,keep-pll-enabled;
|
||||
vddio-supply = <&vddio>;
|
||||
|
||||
vddio: vddio-regulator {
|
||||
regulator-name = "VDDIO";
|
||||
|
|
|
@ -31,11 +31,10 @@
|
|||
reg = <0x4>;
|
||||
eee-broken-1000t;
|
||||
eee-broken-100tx;
|
||||
|
||||
qca,clk-out-frequency = <125000000>;
|
||||
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
|
||||
|
||||
vddio-supply = <&vddh>;
|
||||
qca,keep-pll-enabled;
|
||||
vddio-supply = <&vddio>;
|
||||
|
||||
vddio: vddio-regulator {
|
||||
regulator-name = "VDDIO";
|
||||
|
|
|
@ -197,8 +197,8 @@
|
|||
ddr: memory-controller@1080000 {
|
||||
compatible = "fsl,qoriq-memory-controller";
|
||||
reg = <0x0 0x1080000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
|
||||
big-endian;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
dcfg: syscon@1e00000 {
|
||||
|
|
|
@ -88,11 +88,11 @@
|
|||
pinctrl-0 = <&pinctrl_codec2>;
|
||||
reg = <0x18>;
|
||||
#sound-dai-cells = <0>;
|
||||
HPVDD-supply = <®_3p3v>;
|
||||
SPRVDD-supply = <®_3p3v>;
|
||||
SPLVDD-supply = <®_3p3v>;
|
||||
AVDD-supply = <®_3p3v>;
|
||||
IOVDD-supply = <®_3p3v>;
|
||||
HPVDD-supply = <®_gen_3p3>;
|
||||
SPRVDD-supply = <®_gen_3p3>;
|
||||
SPLVDD-supply = <®_gen_3p3>;
|
||||
AVDD-supply = <®_gen_3p3>;
|
||||
IOVDD-supply = <®_gen_3p3>;
|
||||
DVDD-supply = <&vgen4_reg>;
|
||||
reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
|
@ -45,8 +45,8 @@
|
|||
reg_12p0_main: regulator-12p0-main {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "12V_MAIN";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
|
@ -77,15 +77,6 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
vin-supply = <®_3p3_main>;
|
||||
regulator-name = "GEN_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-vsd-3v3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usdhc2>;
|
||||
|
@ -415,11 +406,11 @@
|
|||
pinctrl-0 = <&pinctrl_codec1>;
|
||||
reg = <0x18>;
|
||||
#sound-dai-cells = <0>;
|
||||
HPVDD-supply = <®_3p3v>;
|
||||
SPRVDD-supply = <®_3p3v>;
|
||||
SPLVDD-supply = <®_3p3v>;
|
||||
AVDD-supply = <®_3p3v>;
|
||||
IOVDD-supply = <®_3p3v>;
|
||||
HPVDD-supply = <®_gen_3p3>;
|
||||
SPRVDD-supply = <®_gen_3p3>;
|
||||
SPLVDD-supply = <®_gen_3p3>;
|
||||
AVDD-supply = <®_gen_3p3>;
|
||||
IOVDD-supply = <®_gen_3p3>;
|
||||
DVDD-supply = <&vgen4_reg>;
|
||||
reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
|
@ -42,12 +42,12 @@
|
|||
};
|
||||
};
|
||||
|
||||
dmss: dmss {
|
||||
dmss: bus@48000000 {
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
dma-ranges;
|
||||
ranges;
|
||||
ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>;
|
||||
|
||||
ti,sci-dev-id = <25>;
|
||||
|
||||
|
@ -134,7 +134,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
dmsc: dmsc@44043000 {
|
||||
dmsc: system-controller@44043000 {
|
||||
compatible = "ti,k2g-sci";
|
||||
ti,host-id = <12>;
|
||||
mbox-names = "rx", "tx";
|
||||
|
@ -148,7 +148,7 @@
|
|||
#power-domain-cells = <2>;
|
||||
};
|
||||
|
||||
k3_clks: clocks {
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
@ -373,8 +373,9 @@
|
|||
clocks = <&k3_clks 145 0>;
|
||||
};
|
||||
|
||||
main_gpio_intr: interrupt-controller0 {
|
||||
main_gpio_intr: interrupt-controller@a00000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x00a00000 0x00 0x800>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -74,8 +74,9 @@
|
|||
clocks = <&k3_clks 148 0>;
|
||||
};
|
||||
|
||||
mcu_gpio_intr: interrupt-controller1 {
|
||||
mcu_gpio_intr: interrupt-controller@4210000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x04210000 0x00 0x200>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -433,8 +433,9 @@
|
|||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
intr_main_gpio: interrupt-controller0 {
|
||||
intr_main_gpio: interrupt-controller@a00000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x0 0x00a00000 0x0 0x400>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
@ -444,18 +445,19 @@
|
|||
ti,interrupt-ranges = <0 392 32>;
|
||||
};
|
||||
|
||||
main-navss {
|
||||
main_navss: bus@30800000 {
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0xbc00000>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
ti,sci-dev-id = <118>;
|
||||
|
||||
intr_main_navss: interrupt-controller1 {
|
||||
intr_main_navss: interrupt-controller@310e0000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x0 0x310e0000 0x0 0x2000>;
|
||||
ti,intr-trigger-type = <4>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -116,11 +116,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
mcu-navss {
|
||||
mcu_navss: bus@28380000 {
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
|
|
|
@ -6,24 +6,24 @@
|
|||
*/
|
||||
|
||||
&cbass_wakeup {
|
||||
dmsc: dmsc {
|
||||
dmsc: system-controller@44083000 {
|
||||
compatible = "ti,am654-sci";
|
||||
ti,host-id = <12>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
mbox-names = "rx", "tx";
|
||||
|
||||
mboxes= <&secure_proxy_main 11>,
|
||||
<&secure_proxy_main 13>;
|
||||
|
||||
reg-names = "debug_messages";
|
||||
reg = <0x44083000 0x1000>;
|
||||
|
||||
k3_pds: power-controller {
|
||||
compatible = "ti,sci-pm-domain";
|
||||
#power-domain-cells = <2>;
|
||||
};
|
||||
|
||||
k3_clks: clocks {
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
@ -69,8 +69,9 @@
|
|||
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
|
||||
};
|
||||
|
||||
intr_wkup_gpio: interrupt-controller2 {
|
||||
intr_wkup_gpio: interrupt-controller@42200000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x42200000 0x200>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -85,12 +85,6 @@
|
|||
gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
clk_ov5640_fixed: clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
|
@ -287,23 +281,6 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
ov5640: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
|
||||
clocks = <&clk_ov5640_fixed>;
|
||||
clock-names = "xclk";
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2_phy0>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
|
@ -496,14 +473,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&csi2_0 {
|
||||
csi2_phy0: endpoint {
|
||||
remote-endpoint = <&csi2_cam0>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_cpsw {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
|
||||
|
|
|
@ -68,8 +68,9 @@
|
|||
};
|
||||
};
|
||||
|
||||
main_gpio_intr: interrupt-controller0 {
|
||||
main_gpio_intr: interrupt-controller@a00000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x00a00000 0x00 0x800>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
@ -85,9 +86,12 @@
|
|||
#size-cells = <2>;
|
||||
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
|
||||
ti,sci-dev-id = <199>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
main_navss_intr: interrupt-controller1 {
|
||||
main_navss_intr: interrupt-controller@310e0000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x310e0000 0x00 0x4000>;
|
||||
ti,intr-trigger-type = <4>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
*/
|
||||
|
||||
&cbass_mcu_wakeup {
|
||||
dmsc: dmsc@44083000 {
|
||||
dmsc: system-controller@44083000 {
|
||||
compatible = "ti,k2g-sci";
|
||||
ti,host-id = <12>;
|
||||
|
||||
|
@ -23,7 +23,7 @@
|
|||
#power-domain-cells = <2>;
|
||||
};
|
||||
|
||||
k3_clks: clocks {
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
@ -96,8 +96,9 @@
|
|||
clock-names = "fclk";
|
||||
};
|
||||
|
||||
wkup_gpio_intr: interrupt-controller2 {
|
||||
wkup_gpio_intr: interrupt-controller@42200000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x42200000 0x00 0x400>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -76,8 +76,9 @@
|
|||
};
|
||||
};
|
||||
|
||||
main_gpio_intr: interrupt-controller0 {
|
||||
main_gpio_intr: interrupt-controller@a00000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x00a00000 0x00 0x800>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
@ -87,18 +88,19 @@
|
|||
ti,interrupt-ranges = <8 392 56>;
|
||||
};
|
||||
|
||||
main-navss {
|
||||
main_navss: bus@30000000 {
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
ti,sci-dev-id = <199>;
|
||||
|
||||
main_navss_intr: interrupt-controller1 {
|
||||
main_navss_intr: interrupt-controller@310e0000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x0 0x310e0000 0x0 0x4000>;
|
||||
ti,intr-trigger-type = <4>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
*/
|
||||
|
||||
&cbass_mcu_wakeup {
|
||||
dmsc: dmsc@44083000 {
|
||||
dmsc: system-controller@44083000 {
|
||||
compatible = "ti,k2g-sci";
|
||||
ti,host-id = <12>;
|
||||
|
||||
|
@ -23,7 +23,7 @@
|
|||
#power-domain-cells = <2>;
|
||||
};
|
||||
|
||||
k3_clks: clocks {
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
@ -96,8 +96,9 @@
|
|||
clock-names = "fclk";
|
||||
};
|
||||
|
||||
wkup_gpio_intr: interrupt-controller2 {
|
||||
wkup_gpio_intr: interrupt-controller@42200000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x42200000 0x00 0x400>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
|
@ -249,11 +250,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
mcu-navss {
|
||||
mcu_navss: bus@28380000 {
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
|
|
|
@ -158,31 +158,29 @@ unsigned long _page_cachable_default;
|
|||
EXPORT_SYMBOL(_page_cachable_default);
|
||||
|
||||
#define PM(p) __pgprot(_page_cachable_default | (p))
|
||||
#define PVA(p) PM(_PAGE_VALID | _PAGE_ACCESSED | (p))
|
||||
|
||||
static inline void setup_protection_map(void)
|
||||
{
|
||||
protection_map[0] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||
protection_map[1] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[2] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||
protection_map[3] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[4] = PVA(_PAGE_PRESENT);
|
||||
protection_map[5] = PVA(_PAGE_PRESENT);
|
||||
protection_map[6] = PVA(_PAGE_PRESENT);
|
||||
protection_map[7] = PVA(_PAGE_PRESENT);
|
||||
protection_map[1] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[2] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||
protection_map[3] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[4] = PM(_PAGE_PRESENT);
|
||||
protection_map[5] = PM(_PAGE_PRESENT);
|
||||
protection_map[6] = PM(_PAGE_PRESENT);
|
||||
protection_map[7] = PM(_PAGE_PRESENT);
|
||||
|
||||
protection_map[8] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||
protection_map[9] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[10] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE |
|
||||
protection_map[9] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||
protection_map[10] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE |
|
||||
_PAGE_NO_READ);
|
||||
protection_map[11] = PVA(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
|
||||
protection_map[12] = PVA(_PAGE_PRESENT);
|
||||
protection_map[13] = PVA(_PAGE_PRESENT);
|
||||
protection_map[14] = PVA(_PAGE_PRESENT);
|
||||
protection_map[15] = PVA(_PAGE_PRESENT);
|
||||
protection_map[11] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
|
||||
protection_map[12] = PM(_PAGE_PRESENT);
|
||||
protection_map[13] = PM(_PAGE_PRESENT);
|
||||
protection_map[14] = PM(_PAGE_PRESENT | _PAGE_WRITE);
|
||||
protection_map[15] = PM(_PAGE_PRESENT | _PAGE_WRITE);
|
||||
}
|
||||
|
||||
#undef _PVA
|
||||
#undef PM
|
||||
|
||||
void cpu_cache_init(void)
|
||||
|
|
|
@ -31,6 +31,35 @@ static inline pte_t *find_init_mm_pte(unsigned long ea, unsigned *hshift)
|
|||
pgd_t *pgdir = init_mm.pgd;
|
||||
return __find_linux_pte(pgdir, ea, NULL, hshift);
|
||||
}
|
||||
|
||||
/*
|
||||
* Convert a kernel vmap virtual address (vmalloc or ioremap space) to a
|
||||
* physical address, without taking locks. This can be used in real-mode.
|
||||
*/
|
||||
static inline phys_addr_t ppc_find_vmap_phys(unsigned long addr)
|
||||
{
|
||||
pte_t *ptep;
|
||||
phys_addr_t pa;
|
||||
int hugepage_shift;
|
||||
|
||||
/*
|
||||
* init_mm does not free page tables, and does not do THP. It may
|
||||
* have huge pages from huge vmalloc / ioremap etc.
|
||||
*/
|
||||
ptep = find_init_mm_pte(addr, &hugepage_shift);
|
||||
if (WARN_ON(!ptep))
|
||||
return 0;
|
||||
|
||||
pa = PFN_PHYS(pte_pfn(*ptep));
|
||||
|
||||
if (!hugepage_shift)
|
||||
hugepage_shift = PAGE_SHIFT;
|
||||
|
||||
pa |= addr & ((1ul << hugepage_shift) - 1);
|
||||
|
||||
return pa;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is what we should always use. Any other lockless page table lookup needs
|
||||
* careful audit against THP split.
|
||||
|
|
|
@ -346,28 +346,7 @@ void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
|
|||
*/
|
||||
static inline unsigned long eeh_token_to_phys(unsigned long token)
|
||||
{
|
||||
pte_t *ptep;
|
||||
unsigned long pa;
|
||||
int hugepage_shift;
|
||||
|
||||
/*
|
||||
* We won't find hugepages here(this is iomem). Hence we are not
|
||||
* worried about _PAGE_SPLITTING/collapse. Also we will not hit
|
||||
* page table free, because of init_mm.
|
||||
*/
|
||||
ptep = find_init_mm_pte(token, &hugepage_shift);
|
||||
if (!ptep)
|
||||
return token;
|
||||
|
||||
pa = pte_pfn(*ptep);
|
||||
|
||||
/* On radix we can do hugepage mappings for io, so handle that */
|
||||
if (!hugepage_shift)
|
||||
hugepage_shift = PAGE_SHIFT;
|
||||
|
||||
pa <<= PAGE_SHIFT;
|
||||
pa |= token & ((1ul << hugepage_shift) - 1);
|
||||
return pa;
|
||||
return ppc_find_vmap_phys(token);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -55,7 +55,6 @@ static struct iowa_bus *iowa_pci_find(unsigned long vaddr, unsigned long paddr)
|
|||
#ifdef CONFIG_PPC_INDIRECT_MMIO
|
||||
struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
|
||||
{
|
||||
unsigned hugepage_shift;
|
||||
struct iowa_bus *bus;
|
||||
int token;
|
||||
|
||||
|
@ -65,22 +64,13 @@ struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
|
|||
bus = &iowa_busses[token - 1];
|
||||
else {
|
||||
unsigned long vaddr, paddr;
|
||||
pte_t *ptep;
|
||||
|
||||
vaddr = (unsigned long)PCI_FIX_ADDR(addr);
|
||||
if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
|
||||
return NULL;
|
||||
/*
|
||||
* We won't find huge pages here (iomem). Also can't hit
|
||||
* a page table free due to init_mm
|
||||
*/
|
||||
ptep = find_init_mm_pte(vaddr, &hugepage_shift);
|
||||
if (ptep == NULL)
|
||||
paddr = 0;
|
||||
else {
|
||||
WARN_ON(hugepage_shift);
|
||||
paddr = pte_pfn(*ptep) << PAGE_SHIFT;
|
||||
}
|
||||
|
||||
paddr = ppc_find_vmap_phys(vaddr);
|
||||
|
||||
bus = iowa_pci_find(vaddr, paddr);
|
||||
|
||||
if (bus == NULL)
|
||||
|
|
|
@ -898,7 +898,6 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
|
|||
unsigned int order;
|
||||
unsigned int nio_pages, io_order;
|
||||
struct page *page;
|
||||
size_t size_io = size;
|
||||
|
||||
size = PAGE_ALIGN(size);
|
||||
order = get_order(size);
|
||||
|
@ -925,9 +924,8 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
|
|||
memset(ret, 0, size);
|
||||
|
||||
/* Set up tces to cover the allocated range */
|
||||
size_io = IOMMU_PAGE_ALIGN(size_io, tbl);
|
||||
nio_pages = size_io >> tbl->it_page_shift;
|
||||
io_order = get_iommu_order(size_io, tbl);
|
||||
nio_pages = size >> tbl->it_page_shift;
|
||||
io_order = get_iommu_order(size, tbl);
|
||||
mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
|
||||
mask >> tbl->it_page_shift, io_order, 0);
|
||||
if (mapping == DMA_MAPPING_ERROR) {
|
||||
|
@ -942,9 +940,10 @@ void iommu_free_coherent(struct iommu_table *tbl, size_t size,
|
|||
void *vaddr, dma_addr_t dma_handle)
|
||||
{
|
||||
if (tbl) {
|
||||
size_t size_io = IOMMU_PAGE_ALIGN(size, tbl);
|
||||
unsigned int nio_pages = size_io >> tbl->it_page_shift;
|
||||
unsigned int nio_pages;
|
||||
|
||||
size = PAGE_ALIGN(size);
|
||||
nio_pages = size >> tbl->it_page_shift;
|
||||
iommu_free(tbl, dma_handle, nio_pages);
|
||||
size = PAGE_ALIGN(size);
|
||||
free_pages((unsigned long)vaddr, get_order(size));
|
||||
|
|
|
@ -108,7 +108,6 @@ int arch_prepare_kprobe(struct kprobe *p)
|
|||
int ret = 0;
|
||||
struct kprobe *prev;
|
||||
struct ppc_inst insn = ppc_inst_read((struct ppc_inst *)p->addr);
|
||||
struct ppc_inst prefix = ppc_inst_read((struct ppc_inst *)(p->addr - 1));
|
||||
|
||||
if ((unsigned long)p->addr & 0x03) {
|
||||
printk("Attempt to register kprobe at an unaligned address\n");
|
||||
|
@ -116,7 +115,8 @@ int arch_prepare_kprobe(struct kprobe *p)
|
|||
} else if (IS_MTMSRD(insn) || IS_RFID(insn) || IS_RFI(insn)) {
|
||||
printk("Cannot register a kprobe on rfi/rfid or mtmsr[d]\n");
|
||||
ret = -EINVAL;
|
||||
} else if (ppc_inst_prefixed(prefix)) {
|
||||
} else if ((unsigned long)p->addr & ~PAGE_MASK &&
|
||||
ppc_inst_prefixed(ppc_inst_read((struct ppc_inst *)(p->addr - 1)))) {
|
||||
printk("Cannot register a kprobe on the second word of prefixed instruction\n");
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
|
|
@ -4455,7 +4455,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
|
|||
mtspr(SPRN_EBBRR, ebb_regs[1]);
|
||||
mtspr(SPRN_BESCR, ebb_regs[2]);
|
||||
mtspr(SPRN_TAR, user_tar);
|
||||
mtspr(SPRN_FSCR, current->thread.fscr);
|
||||
}
|
||||
mtspr(SPRN_VRSAVE, user_vrsave);
|
||||
|
||||
|
|
|
@ -23,20 +23,9 @@
|
|||
#include <asm/pte-walk.h>
|
||||
|
||||
/* Translate address of a vmalloc'd thing to a linear map address */
|
||||
static void *real_vmalloc_addr(void *x)
|
||||
static void *real_vmalloc_addr(void *addr)
|
||||
{
|
||||
unsigned long addr = (unsigned long) x;
|
||||
pte_t *p;
|
||||
/*
|
||||
* assume we don't have huge pages in vmalloc space...
|
||||
* So don't worry about THP collapse/split. Called
|
||||
* Only in realmode with MSR_EE = 0, hence won't need irq_save/restore.
|
||||
*/
|
||||
p = find_init_mm_pte(addr, NULL);
|
||||
if (!p || !pte_present(*p))
|
||||
return NULL;
|
||||
addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK);
|
||||
return __va(addr);
|
||||
return __va(ppc_find_vmap_phys((unsigned long)addr));
|
||||
}
|
||||
|
||||
/* Return 1 if we need to do a global tlbie, 0 if we can use tlbiel */
|
||||
|
|
|
@ -59,6 +59,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
|
|||
#define STACK_SLOT_UAMOR (SFS-88)
|
||||
#define STACK_SLOT_DAWR1 (SFS-96)
|
||||
#define STACK_SLOT_DAWRX1 (SFS-104)
|
||||
#define STACK_SLOT_FSCR (SFS-112)
|
||||
/* the following is used by the P9 short path */
|
||||
#define STACK_SLOT_NVGPRS (SFS-152) /* 18 gprs */
|
||||
|
||||
|
@ -686,6 +687,8 @@ BEGIN_FTR_SECTION
|
|||
std r6, STACK_SLOT_DAWR0(r1)
|
||||
std r7, STACK_SLOT_DAWRX0(r1)
|
||||
std r8, STACK_SLOT_IAMR(r1)
|
||||
mfspr r5, SPRN_FSCR
|
||||
std r5, STACK_SLOT_FSCR(r1)
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
|
||||
BEGIN_FTR_SECTION
|
||||
mfspr r6, SPRN_DAWR1
|
||||
|
@ -1663,6 +1666,10 @@ FTR_SECTION_ELSE
|
|||
ld r7, STACK_SLOT_HFSCR(r1)
|
||||
mtspr SPRN_HFSCR, r7
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)
|
||||
BEGIN_FTR_SECTION
|
||||
ld r5, STACK_SLOT_FSCR(r1)
|
||||
mtspr SPRN_FSCR, r5
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
|
||||
/*
|
||||
* Restore various registers to 0, where non-zero values
|
||||
* set by the guest could disrupt the host.
|
||||
|
|
|
@ -61,11 +61,11 @@ config RISCV
|
|||
select GENERIC_TIME_VSYSCALL if MMU && 64BIT
|
||||
select HANDLE_DOMAIN_IRQ
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select HAVE_ARCH_JUMP_LABEL
|
||||
select HAVE_ARCH_JUMP_LABEL_RELATIVE
|
||||
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
|
||||
select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
|
||||
select HAVE_ARCH_KASAN if MMU && 64BIT
|
||||
select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
|
||||
select HAVE_ARCH_KGDB
|
||||
select HAVE_ARCH_KGDB if !XIP_KERNEL
|
||||
select HAVE_ARCH_KGDB_QXFER_PKT
|
||||
select HAVE_ARCH_MMAP_RND_BITS if MMU
|
||||
select HAVE_ARCH_SECCOMP_FILTER
|
||||
|
@ -80,9 +80,9 @@ config RISCV
|
|||
select HAVE_GCC_PLUGINS
|
||||
select HAVE_GENERIC_VDSO if MMU && 64BIT
|
||||
select HAVE_IRQ_TIME_ACCOUNTING
|
||||
select HAVE_KPROBES
|
||||
select HAVE_KPROBES_ON_FTRACE
|
||||
select HAVE_KRETPROBES
|
||||
select HAVE_KPROBES if !XIP_KERNEL
|
||||
select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL
|
||||
select HAVE_KRETPROBES if !XIP_KERNEL
|
||||
select HAVE_PCI
|
||||
select HAVE_PERF_EVENTS
|
||||
select HAVE_PERF_REGS
|
||||
|
@ -231,11 +231,11 @@ config ARCH_RV64I
|
|||
bool "RV64I"
|
||||
select 64BIT
|
||||
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && GCC_VERSION >= 50000
|
||||
select HAVE_DYNAMIC_FTRACE if MMU && $(cc-option,-fpatchable-function-entry=8)
|
||||
select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)
|
||||
select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
|
||||
select HAVE_FTRACE_MCOUNT_RECORD
|
||||
select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
|
||||
select HAVE_FUNCTION_GRAPH_TRACER
|
||||
select HAVE_FUNCTION_TRACER
|
||||
select HAVE_FUNCTION_TRACER if !XIP_KERNEL
|
||||
select SWIOTLB if MMU
|
||||
|
||||
endchoice
|
||||
|
|
|
@ -38,6 +38,15 @@ else
|
|||
KBUILD_LDFLAGS += -melf32lriscv
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LD_IS_LLD),y)
|
||||
KBUILD_CFLAGS += -mno-relax
|
||||
KBUILD_AFLAGS += -mno-relax
|
||||
ifneq ($(LLVM_IAS),1)
|
||||
KBUILD_CFLAGS += -Wa,-mno-relax
|
||||
KBUILD_AFLAGS += -Wa,-mno-relax
|
||||
endif
|
||||
endif
|
||||
|
||||
# ISA string setting
|
||||
riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
|
||||
riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
|
||||
|
|
|
@ -1,2 +1,3 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += microchip-mpfs-icicle-kit.dtb
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
|
||||
hifive-unmatched-a00.dtb
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
|
|
@ -1,2 +1,2 @@
|
|||
obj-y += errata_cip_453.o
|
||||
obj-$(CONFIG_ERRATA_SIFIVE_CIP_453) += errata_cip_453.o
|
||||
obj-y += errata.o
|
||||
|
|
|
@ -51,7 +51,7 @@
|
|||
REG_ASM " " newlen "\n" \
|
||||
".word " errata_id "\n"
|
||||
|
||||
#define ALT_NEW_CONSTENT(vendor_id, errata_id, enable, new_c) \
|
||||
#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
|
||||
".if " __stringify(enable) " == 1\n" \
|
||||
".pushsection .alternative, \"a\"\n" \
|
||||
ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \
|
||||
|
@ -69,7 +69,7 @@
|
|||
"886 :\n" \
|
||||
old_c "\n" \
|
||||
"887 :\n" \
|
||||
ALT_NEW_CONSTENT(vendor_id, errata_id, enable, new_c)
|
||||
ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c)
|
||||
|
||||
#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
|
||||
__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
|
||||
|
|
|
@ -231,13 +231,13 @@ static void __init init_resources(void)
|
|||
|
||||
/* Clean-up any unused pre-allocated resources */
|
||||
mem_res_sz = (num_resources - res_idx + 1) * sizeof(*mem_res);
|
||||
memblock_free((phys_addr_t) mem_res, mem_res_sz);
|
||||
memblock_free(__pa(mem_res), mem_res_sz);
|
||||
return;
|
||||
|
||||
error:
|
||||
/* Better an empty resource tree than an inconsistent one */
|
||||
release_child_resources(&iomem_resource);
|
||||
memblock_free((phys_addr_t) mem_res, mem_res_sz);
|
||||
memblock_free(__pa(mem_res), mem_res_sz);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -86,8 +86,13 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code,
|
|||
}
|
||||
}
|
||||
|
||||
#if defined (CONFIG_XIP_KERNEL) && defined (CONFIG_RISCV_ERRATA_ALTERNATIVE)
|
||||
#define __trap_section __section(".xip.traps")
|
||||
#else
|
||||
#define __trap_section
|
||||
#endif
|
||||
#define DO_ERROR_INFO(name, signo, code, str) \
|
||||
asmlinkage __visible void name(struct pt_regs *regs) \
|
||||
asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
|
||||
{ \
|
||||
do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \
|
||||
}
|
||||
|
@ -111,7 +116,7 @@ DO_ERROR_INFO(do_trap_store_misaligned,
|
|||
int handle_misaligned_load(struct pt_regs *regs);
|
||||
int handle_misaligned_store(struct pt_regs *regs);
|
||||
|
||||
asmlinkage void do_trap_load_misaligned(struct pt_regs *regs)
|
||||
asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
|
||||
{
|
||||
if (!handle_misaligned_load(regs))
|
||||
return;
|
||||
|
@ -119,7 +124,7 @@ asmlinkage void do_trap_load_misaligned(struct pt_regs *regs)
|
|||
"Oops - load address misaligned");
|
||||
}
|
||||
|
||||
asmlinkage void do_trap_store_misaligned(struct pt_regs *regs)
|
||||
asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
|
||||
{
|
||||
if (!handle_misaligned_store(regs))
|
||||
return;
|
||||
|
@ -146,7 +151,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
|
|||
return GET_INSN_LENGTH(insn);
|
||||
}
|
||||
|
||||
asmlinkage __visible void do_trap_break(struct pt_regs *regs)
|
||||
asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
|
||||
{
|
||||
#ifdef CONFIG_KPROBES
|
||||
if (kprobe_single_step_handler(regs))
|
||||
|
|
|
@ -99,9 +99,22 @@ SECTIONS
|
|||
}
|
||||
PERCPU_SECTION(L1_CACHE_BYTES)
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
. = ALIGN(8);
|
||||
.alternative : {
|
||||
__alt_start = .;
|
||||
*(.alternative)
|
||||
__alt_end = .;
|
||||
}
|
||||
__init_end = .;
|
||||
|
||||
. = ALIGN(16);
|
||||
.xip.traps : {
|
||||
__xip_traps_start = .;
|
||||
*(.xip.traps)
|
||||
__xip_traps_end = .;
|
||||
}
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
.sdata : {
|
||||
__global_pointer$ = . + 0x800;
|
||||
*(.sdata*)
|
||||
|
|
|
@ -746,14 +746,18 @@ void __init protect_kernel_text_data(void)
|
|||
unsigned long init_data_start = (unsigned long)__init_data_begin;
|
||||
unsigned long rodata_start = (unsigned long)__start_rodata;
|
||||
unsigned long data_start = (unsigned long)_data;
|
||||
unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
|
||||
#if defined(CONFIG_64BIT) && defined(CONFIG_MMU)
|
||||
unsigned long end_va = kernel_virt_addr + load_sz;
|
||||
#else
|
||||
unsigned long end_va = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
|
||||
#endif
|
||||
|
||||
set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
|
||||
set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
|
||||
set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
|
||||
/* rodata section is marked readonly in mark_rodata_ro */
|
||||
set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
|
||||
set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
|
||||
set_memory_nx(data_start, (end_va - data_start) >> PAGE_SHIFT);
|
||||
}
|
||||
|
||||
void mark_rodata_ro(void)
|
||||
|
|
|
@ -200,8 +200,9 @@ endif
|
|||
KBUILD_LDFLAGS += -m elf_$(UTS_MACHINE)
|
||||
|
||||
ifdef CONFIG_LTO_CLANG
|
||||
KBUILD_LDFLAGS += -plugin-opt=-code-model=kernel \
|
||||
-plugin-opt=-stack-alignment=$(if $(CONFIG_X86_32),4,8)
|
||||
ifeq ($(shell test $(CONFIG_LLD_VERSION) -lt 130000; echo $$?),0)
|
||||
KBUILD_LDFLAGS += -plugin-opt=-stack-alignment=$(if $(CONFIG_X86_32),4,8)
|
||||
endif
|
||||
endif
|
||||
|
||||
ifdef CONFIG_X86_NEED_RELOCS
|
||||
|
|
|
@ -1406,6 +1406,8 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool
|
|||
die_id = i;
|
||||
else
|
||||
die_id = topology_phys_to_logical_pkg(i);
|
||||
if (die_id < 0)
|
||||
die_id = -ENODEV;
|
||||
map->pbus_to_dieid[bus] = die_id;
|
||||
break;
|
||||
}
|
||||
|
@ -1452,14 +1454,14 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool
|
|||
i = -1;
|
||||
if (reverse) {
|
||||
for (bus = 255; bus >= 0; bus--) {
|
||||
if (map->pbus_to_dieid[bus] >= 0)
|
||||
if (map->pbus_to_dieid[bus] != -1)
|
||||
i = map->pbus_to_dieid[bus];
|
||||
else
|
||||
map->pbus_to_dieid[bus] = i;
|
||||
}
|
||||
} else {
|
||||
for (bus = 0; bus <= 255; bus++) {
|
||||
if (map->pbus_to_dieid[bus] >= 0)
|
||||
if (map->pbus_to_dieid[bus] != -1)
|
||||
i = map->pbus_to_dieid[bus];
|
||||
else
|
||||
map->pbus_to_dieid[bus] = i;
|
||||
|
@ -5097,9 +5099,10 @@ static struct intel_uncore_type icx_uncore_m2m = {
|
|||
.perf_ctr = SNR_M2M_PCI_PMON_CTR0,
|
||||
.event_ctl = SNR_M2M_PCI_PMON_CTL0,
|
||||
.event_mask = SNBEP_PMON_RAW_EVENT_MASK,
|
||||
.event_mask_ext = SNR_M2M_PCI_PMON_UMASK_EXT,
|
||||
.box_ctl = SNR_M2M_PCI_PMON_BOX_CTL,
|
||||
.ops = &snr_m2m_uncore_pci_ops,
|
||||
.format_group = &skx_uncore_format_group,
|
||||
.format_group = &snr_m2m_uncore_format_group,
|
||||
};
|
||||
|
||||
static struct attribute *icx_upi_uncore_formats_attr[] = {
|
||||
|
|
|
@ -174,6 +174,7 @@ static inline int apic_is_clustered_box(void)
|
|||
extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask);
|
||||
extern void lapic_assign_system_vectors(void);
|
||||
extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace);
|
||||
extern void lapic_update_legacy_vectors(void);
|
||||
extern void lapic_online(void);
|
||||
extern void lapic_offline(void);
|
||||
extern bool apic_needs_pit(void);
|
||||
|
|
|
@ -56,11 +56,8 @@
|
|||
# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IOMMU_SUPPORT
|
||||
# define DISABLE_ENQCMD 0
|
||||
#else
|
||||
# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
|
||||
#endif
|
||||
/* Force disable because it's broken beyond repair */
|
||||
#define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
|
||||
|
||||
#ifdef CONFIG_X86_SGX
|
||||
# define DISABLE_SGX 0
|
||||
|
|
|
@ -106,10 +106,6 @@ extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);
|
|||
*/
|
||||
#define PASID_DISABLED 0
|
||||
|
||||
#ifdef CONFIG_IOMMU_SUPPORT
|
||||
/* Update current's PASID MSR/state by mm's PASID. */
|
||||
void update_pasid(void);
|
||||
#else
|
||||
static inline void update_pasid(void) { }
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_X86_FPU_API_H */
|
||||
|
|
|
@ -584,13 +584,6 @@ static inline void switch_fpu_finish(struct fpu *new_fpu)
|
|||
pkru_val = pk->pkru;
|
||||
}
|
||||
__write_pkru(pkru_val);
|
||||
|
||||
/*
|
||||
* Expensive PASID MSR write will be avoided in update_pasid() because
|
||||
* TIF_NEED_FPU_LOAD was set. And the PASID state won't be updated
|
||||
* unless it's different from mm->pasid to reduce overhead.
|
||||
*/
|
||||
update_pasid();
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_FPU_INTERNAL_H */
|
||||
|
|
|
@ -3,11 +3,13 @@
|
|||
#define _ASM_X86_THERMAL_H
|
||||
|
||||
#ifdef CONFIG_X86_THERMAL_VECTOR
|
||||
void therm_lvt_init(void);
|
||||
void intel_init_thermal(struct cpuinfo_x86 *c);
|
||||
bool x86_thermal_enabled(void);
|
||||
void intel_thermal_interrupt(void);
|
||||
#else
|
||||
static inline void intel_init_thermal(struct cpuinfo_x86 *c) { }
|
||||
static inline void therm_lvt_init(void) { }
|
||||
static inline void intel_init_thermal(struct cpuinfo_x86 *c) { }
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_X86_THERMAL_H */
|
||||
|
|
|
@ -182,42 +182,70 @@ done:
|
|||
n_dspl, (unsigned long)orig_insn + n_dspl + repl_len);
|
||||
}
|
||||
|
||||
/*
|
||||
* optimize_nops_range() - Optimize a sequence of single byte NOPs (0x90)
|
||||
*
|
||||
* @instr: instruction byte stream
|
||||
* @instrlen: length of the above
|
||||
* @off: offset within @instr where the first NOP has been detected
|
||||
*
|
||||
* Return: number of NOPs found (and replaced).
|
||||
*/
|
||||
static __always_inline int optimize_nops_range(u8 *instr, u8 instrlen, int off)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i = off, nnops;
|
||||
|
||||
while (i < instrlen) {
|
||||
if (instr[i] != 0x90)
|
||||
break;
|
||||
|
||||
i++;
|
||||
}
|
||||
|
||||
nnops = i - off;
|
||||
|
||||
if (nnops <= 1)
|
||||
return nnops;
|
||||
|
||||
local_irq_save(flags);
|
||||
add_nops(instr + off, nnops);
|
||||
local_irq_restore(flags);
|
||||
|
||||
DUMP_BYTES(instr, instrlen, "%px: [%d:%d) optimized NOPs: ", instr, off, i);
|
||||
|
||||
return nnops;
|
||||
}
|
||||
|
||||
/*
|
||||
* "noinline" to cause control flow change and thus invalidate I$ and
|
||||
* cause refetch after modification.
|
||||
*/
|
||||
static void __init_or_module noinline optimize_nops(struct alt_instr *a, u8 *instr)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct insn insn;
|
||||
int nop, i = 0;
|
||||
int i = 0;
|
||||
|
||||
/*
|
||||
* Jump over the non-NOP insns, the remaining bytes must be single-byte
|
||||
* NOPs, optimize them.
|
||||
* Jump over the non-NOP insns and optimize single-byte NOPs into bigger
|
||||
* ones.
|
||||
*/
|
||||
for (;;) {
|
||||
if (insn_decode_kernel(&insn, &instr[i]))
|
||||
return;
|
||||
|
||||
/*
|
||||
* See if this and any potentially following NOPs can be
|
||||
* optimized.
|
||||
*/
|
||||
if (insn.length == 1 && insn.opcode.bytes[0] == 0x90)
|
||||
break;
|
||||
i += optimize_nops_range(instr, a->instrlen, i);
|
||||
else
|
||||
i += insn.length;
|
||||
|
||||
if ((i += insn.length) >= a->instrlen)
|
||||
if (i >= a->instrlen)
|
||||
return;
|
||||
}
|
||||
|
||||
for (nop = i; i < a->instrlen; i++) {
|
||||
if (WARN_ONCE(instr[i] != 0x90, "Not a NOP at 0x%px\n", &instr[i]))
|
||||
return;
|
||||
}
|
||||
|
||||
local_irq_save(flags);
|
||||
add_nops(instr + nop, i - nop);
|
||||
local_irq_restore(flags);
|
||||
|
||||
DUMP_BYTES(instr, a->instrlen, "%px: [%d:%d) optimized NOPs: ",
|
||||
instr, nop, a->instrlen);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -2604,6 +2604,7 @@ static void __init apic_bsp_setup(bool upmode)
|
|||
end_local_APIC_setup();
|
||||
irq_remap_enable_fault_handling();
|
||||
setup_IO_APIC();
|
||||
lapic_update_legacy_vectors();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_UP_LATE_INIT
|
||||
|
|
|
@ -738,6 +738,26 @@ void lapic_assign_legacy_vector(unsigned int irq, bool replace)
|
|||
irq_matrix_assign_system(vector_matrix, ISA_IRQ_VECTOR(irq), replace);
|
||||
}
|
||||
|
||||
void __init lapic_update_legacy_vectors(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
if (IS_ENABLED(CONFIG_X86_IO_APIC) && nr_ioapics > 0)
|
||||
return;
|
||||
|
||||
/*
|
||||
* If the IO/APIC is disabled via config, kernel command line or
|
||||
* lack of enumeration then all legacy interrupts are routed
|
||||
* through the PIC. Make sure that they are marked as legacy
|
||||
* vectors. PIC_CASCADE_IRQ has already been marked in
|
||||
* lapic_assign_system_vectors().
|
||||
*/
|
||||
for (i = 0; i < nr_legacy_irqs(); i++) {
|
||||
if (i != PIC_CASCADE_IR)
|
||||
lapic_assign_legacy_vector(i, true);
|
||||
}
|
||||
}
|
||||
|
||||
void __init lapic_assign_system_vectors(void)
|
||||
{
|
||||
unsigned int i, vector = 0;
|
||||
|
|
|
@ -63,7 +63,7 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)
|
|||
case 15:
|
||||
return msr - MSR_P4_BPU_PERFCTR0;
|
||||
}
|
||||
fallthrough;
|
||||
break;
|
||||
case X86_VENDOR_ZHAOXIN:
|
||||
case X86_VENDOR_CENTAUR:
|
||||
return msr - MSR_ARCH_PERFMON_PERFCTR0;
|
||||
|
@ -96,7 +96,7 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
|
|||
case 15:
|
||||
return msr - MSR_P4_BSU_ESCR0;
|
||||
}
|
||||
fallthrough;
|
||||
break;
|
||||
case X86_VENDOR_ZHAOXIN:
|
||||
case X86_VENDOR_CENTAUR:
|
||||
return msr - MSR_ARCH_PERFMON_EVENTSEL0;
|
||||
|
|
|
@ -1402,60 +1402,3 @@ int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns,
|
|||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PROC_PID_ARCH_STATUS */
|
||||
|
||||
#ifdef CONFIG_IOMMU_SUPPORT
|
||||
void update_pasid(void)
|
||||
{
|
||||
u64 pasid_state;
|
||||
u32 pasid;
|
||||
|
||||
if (!cpu_feature_enabled(X86_FEATURE_ENQCMD))
|
||||
return;
|
||||
|
||||
if (!current->mm)
|
||||
return;
|
||||
|
||||
pasid = READ_ONCE(current->mm->pasid);
|
||||
/* Set the valid bit in the PASID MSR/state only for valid pasid. */
|
||||
pasid_state = pasid == PASID_DISABLED ?
|
||||
pasid : pasid | MSR_IA32_PASID_VALID;
|
||||
|
||||
/*
|
||||
* No need to hold fregs_lock() since the task's fpstate won't
|
||||
* be changed by others (e.g. ptrace) while the task is being
|
||||
* switched to or is in IPI.
|
||||
*/
|
||||
if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
|
||||
/* The MSR is active and can be directly updated. */
|
||||
wrmsrl(MSR_IA32_PASID, pasid_state);
|
||||
} else {
|
||||
struct fpu *fpu = ¤t->thread.fpu;
|
||||
struct ia32_pasid_state *ppasid_state;
|
||||
struct xregs_state *xsave;
|
||||
|
||||
/*
|
||||
* The CPU's xstate registers are not currently active. Just
|
||||
* update the PASID state in the memory buffer here. The
|
||||
* PASID MSR will be loaded when returning to user mode.
|
||||
*/
|
||||
xsave = &fpu->state.xsave;
|
||||
xsave->header.xfeatures |= XFEATURE_MASK_PASID;
|
||||
ppasid_state = get_xsave_addr(xsave, XFEATURE_PASID);
|
||||
/*
|
||||
* Since XFEATURE_MASK_PASID is set in xfeatures, ppasid_state
|
||||
* won't be NULL and no need to check its value.
|
||||
*
|
||||
* Only update the task's PASID state when it's different
|
||||
* from the mm's pasid.
|
||||
*/
|
||||
if (ppasid_state->pasid != pasid_state) {
|
||||
/*
|
||||
* Invalid fpregs so that state restoring will pick up
|
||||
* the PASID state.
|
||||
*/
|
||||
__fpu_invalidate_fpregs_state(fpu);
|
||||
ppasid_state->pasid = pasid_state;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_IOMMU_SUPPORT */
|
||||
|
|
|
@ -44,6 +44,7 @@
|
|||
#include <asm/pci-direct.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/proto.h>
|
||||
#include <asm/thermal.h>
|
||||
#include <asm/unwind.h>
|
||||
#include <asm/vsyscall.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
@ -637,11 +638,11 @@ static void __init trim_snb_memory(void)
|
|||
* them from accessing certain memory ranges, namely anything below
|
||||
* 1M and in the pages listed in bad_pages[] above.
|
||||
*
|
||||
* To avoid these pages being ever accessed by SNB gfx devices
|
||||
* reserve all memory below the 1 MB mark and bad_pages that have
|
||||
* not already been reserved at boot time.
|
||||
* To avoid these pages being ever accessed by SNB gfx devices reserve
|
||||
* bad_pages that have not already been reserved at boot time.
|
||||
* All memory below the 1 MB mark is anyway reserved later during
|
||||
* setup_arch(), so there is no need to reserve it here.
|
||||
*/
|
||||
memblock_reserve(0, 1<<20);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(bad_pages); i++) {
|
||||
if (memblock_reserve(bad_pages[i], PAGE_SIZE))
|
||||
|
@ -733,14 +734,14 @@ static void __init early_reserve_memory(void)
|
|||
* The first 4Kb of memory is a BIOS owned area, but generally it is
|
||||
* not listed as such in the E820 table.
|
||||
*
|
||||
* Reserve the first memory page and typically some additional
|
||||
* memory (64KiB by default) since some BIOSes are known to corrupt
|
||||
* low memory. See the Kconfig help text for X86_RESERVE_LOW.
|
||||
* Reserve the first 64K of memory since some BIOSes are known to
|
||||
* corrupt low memory. After the real mode trampoline is allocated the
|
||||
* rest of the memory below 640k is reserved.
|
||||
*
|
||||
* In addition, make sure page 0 is always reserved because on
|
||||
* systems with L1TF its contents can be leaked to user processes.
|
||||
*/
|
||||
memblock_reserve(0, ALIGN(reserve_low, PAGE_SIZE));
|
||||
memblock_reserve(0, SZ_64K);
|
||||
|
||||
early_reserve_initrd();
|
||||
|
||||
|
@ -751,6 +752,7 @@ static void __init early_reserve_memory(void)
|
|||
|
||||
reserve_ibft_region();
|
||||
reserve_bios_regions();
|
||||
trim_snb_memory();
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1081,14 +1083,20 @@ void __init setup_arch(char **cmdline_p)
|
|||
(max_pfn_mapped<<PAGE_SHIFT) - 1);
|
||||
#endif
|
||||
|
||||
reserve_real_mode();
|
||||
|
||||
/*
|
||||
* Reserving memory causing GPU hangs on Sandy Bridge integrated
|
||||
* graphics devices should be done after we allocated memory under
|
||||
* 1M for the real mode trampoline.
|
||||
* Find free memory for the real mode trampoline and place it
|
||||
* there.
|
||||
* If there is not enough free memory under 1M, on EFI-enabled
|
||||
* systems there will be additional attempt to reclaim the memory
|
||||
* for the real mode trampoline at efi_free_boot_services().
|
||||
*
|
||||
* Unconditionally reserve the entire first 1M of RAM because
|
||||
* BIOSes are know to corrupt low memory and several
|
||||
* hundred kilobytes are not worth complex detection what memory gets
|
||||
* clobbered. Moreover, on machines with SandyBridge graphics or in
|
||||
* setups that use crashkernel the entire 1M is reserved anyway.
|
||||
*/
|
||||
trim_snb_memory();
|
||||
reserve_real_mode();
|
||||
|
||||
init_mem_mapping();
|
||||
|
||||
|
@ -1226,6 +1234,14 @@ void __init setup_arch(char **cmdline_p)
|
|||
|
||||
x86_init.timers.wallclock_init();
|
||||
|
||||
/*
|
||||
* This needs to run before setup_local_APIC() which soft-disables the
|
||||
* local APIC temporarily and that masks the thermal LVT interrupt,
|
||||
* leading to softlockups on machines which have configured SMI
|
||||
* interrupt delivery.
|
||||
*/
|
||||
therm_lvt_init();
|
||||
|
||||
mcheck_init();
|
||||
|
||||
register_refined_jiffies(CLOCK_TICK_RATE);
|
||||
|
|
|
@ -1494,6 +1494,15 @@ static void limit_periodic_timer_frequency(struct kvm_lapic *apic)
|
|||
|
||||
static void cancel_hv_timer(struct kvm_lapic *apic);
|
||||
|
||||
static void cancel_apic_timer(struct kvm_lapic *apic)
|
||||
{
|
||||
hrtimer_cancel(&apic->lapic_timer.timer);
|
||||
preempt_disable();
|
||||
if (apic->lapic_timer.hv_timer_in_use)
|
||||
cancel_hv_timer(apic);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static void apic_update_lvtt(struct kvm_lapic *apic)
|
||||
{
|
||||
u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) &
|
||||
|
@ -1502,11 +1511,7 @@ static void apic_update_lvtt(struct kvm_lapic *apic)
|
|||
if (apic->lapic_timer.timer_mode != timer_mode) {
|
||||
if (apic_lvtt_tscdeadline(apic) != (timer_mode ==
|
||||
APIC_LVT_TIMER_TSCDEADLINE)) {
|
||||
hrtimer_cancel(&apic->lapic_timer.timer);
|
||||
preempt_disable();
|
||||
if (apic->lapic_timer.hv_timer_in_use)
|
||||
cancel_hv_timer(apic);
|
||||
preempt_enable();
|
||||
cancel_apic_timer(apic);
|
||||
kvm_lapic_set_reg(apic, APIC_TMICT, 0);
|
||||
apic->lapic_timer.period = 0;
|
||||
apic->lapic_timer.tscdeadline = 0;
|
||||
|
@ -2092,7 +2097,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
|
|||
if (apic_lvtt_tscdeadline(apic))
|
||||
break;
|
||||
|
||||
hrtimer_cancel(&apic->lapic_timer.timer);
|
||||
cancel_apic_timer(apic);
|
||||
kvm_lapic_set_reg(apic, APIC_TMICT, val);
|
||||
start_apic_timer(apic);
|
||||
break;
|
||||
|
|
|
@ -90,8 +90,8 @@ struct guest_walker {
|
|||
gpa_t pte_gpa[PT_MAX_FULL_LEVELS];
|
||||
pt_element_t __user *ptep_user[PT_MAX_FULL_LEVELS];
|
||||
bool pte_writable[PT_MAX_FULL_LEVELS];
|
||||
unsigned pt_access;
|
||||
unsigned pte_access;
|
||||
unsigned int pt_access[PT_MAX_FULL_LEVELS];
|
||||
unsigned int pte_access;
|
||||
gfn_t gfn;
|
||||
struct x86_exception fault;
|
||||
};
|
||||
|
@ -418,13 +418,15 @@ retry_walk:
|
|||
}
|
||||
|
||||
walker->ptes[walker->level - 1] = pte;
|
||||
|
||||
/* Convert to ACC_*_MASK flags for struct guest_walker. */
|
||||
walker->pt_access[walker->level - 1] = FNAME(gpte_access)(pt_access ^ walk_nx_mask);
|
||||
} while (!is_last_gpte(mmu, walker->level, pte));
|
||||
|
||||
pte_pkey = FNAME(gpte_pkeys)(vcpu, pte);
|
||||
accessed_dirty = have_ad ? pte_access & PT_GUEST_ACCESSED_MASK : 0;
|
||||
|
||||
/* Convert to ACC_*_MASK flags for struct guest_walker. */
|
||||
walker->pt_access = FNAME(gpte_access)(pt_access ^ walk_nx_mask);
|
||||
walker->pte_access = FNAME(gpte_access)(pte_access ^ walk_nx_mask);
|
||||
errcode = permission_fault(vcpu, mmu, walker->pte_access, pte_pkey, access);
|
||||
if (unlikely(errcode))
|
||||
|
@ -463,7 +465,8 @@ retry_walk:
|
|||
}
|
||||
|
||||
pgprintk("%s: pte %llx pte_access %x pt_access %x\n",
|
||||
__func__, (u64)pte, walker->pte_access, walker->pt_access);
|
||||
__func__, (u64)pte, walker->pte_access,
|
||||
walker->pt_access[walker->level - 1]);
|
||||
return 1;
|
||||
|
||||
error:
|
||||
|
@ -643,7 +646,7 @@ static int FNAME(fetch)(struct kvm_vcpu *vcpu, gpa_t addr,
|
|||
bool huge_page_disallowed = exec && nx_huge_page_workaround_enabled;
|
||||
struct kvm_mmu_page *sp = NULL;
|
||||
struct kvm_shadow_walk_iterator it;
|
||||
unsigned direct_access, access = gw->pt_access;
|
||||
unsigned int direct_access, access;
|
||||
int top_level, level, req_level, ret;
|
||||
gfn_t base_gfn = gw->gfn;
|
||||
|
||||
|
@ -675,6 +678,7 @@ static int FNAME(fetch)(struct kvm_vcpu *vcpu, gpa_t addr,
|
|||
sp = NULL;
|
||||
if (!is_shadow_present_pte(*it.sptep)) {
|
||||
table_gfn = gw->table_gfn[it.level - 2];
|
||||
access = gw->pt_access[it.level - 2];
|
||||
sp = kvm_mmu_get_page(vcpu, table_gfn, addr, it.level-1,
|
||||
false, access);
|
||||
}
|
||||
|
|
|
@ -1103,10 +1103,9 @@ __sev_send_start_query_session_length(struct kvm *kvm, struct kvm_sev_cmd *argp,
|
|||
struct sev_data_send_start data;
|
||||
int ret;
|
||||
|
||||
memset(&data, 0, sizeof(data));
|
||||
data.handle = sev->handle;
|
||||
ret = sev_issue_cmd(kvm, SEV_CMD_SEND_START, &data, &argp->error);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
params->session_len = data.session_len;
|
||||
if (copy_to_user((void __user *)(uintptr_t)argp->data, params,
|
||||
|
@ -1215,10 +1214,9 @@ __sev_send_update_data_query_lengths(struct kvm *kvm, struct kvm_sev_cmd *argp,
|
|||
struct sev_data_send_update_data data;
|
||||
int ret;
|
||||
|
||||
memset(&data, 0, sizeof(data));
|
||||
data.handle = sev->handle;
|
||||
ret = sev_issue_cmd(kvm, SEV_CMD_SEND_UPDATE_DATA, &data, &argp->error);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
params->hdr_len = data.hdr_len;
|
||||
params->trans_len = data.trans_len;
|
||||
|
|
|
@ -1550,16 +1550,16 @@ TRACE_EVENT(kvm_nested_vmenter_failed,
|
|||
TP_ARGS(msg, err),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__field(const char *, msg)
|
||||
__string(msg, msg)
|
||||
__field(u32, err)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->msg = msg;
|
||||
__assign_str(msg, msg);
|
||||
__entry->err = err;
|
||||
),
|
||||
|
||||
TP_printk("%s%s", __entry->msg, !__entry->err ? "" :
|
||||
TP_printk("%s%s", __get_str(msg), !__entry->err ? "" :
|
||||
__print_symbolic(__entry->err, VMX_VMENTER_INSTRUCTION_ERRORS))
|
||||
);
|
||||
|
||||
|
|
|
@ -3072,6 +3072,19 @@ static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
|
|||
static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
++vcpu->stat.tlb_flush;
|
||||
|
||||
if (!tdp_enabled) {
|
||||
/*
|
||||
* A TLB flush on behalf of the guest is equivalent to
|
||||
* INVPCID(all), toggling CR4.PGE, etc., which requires
|
||||
* a forced sync of the shadow page tables. Unload the
|
||||
* entire MMU here and the subsequent load will sync the
|
||||
* shadow page tables, and also flush the TLB.
|
||||
*/
|
||||
kvm_mmu_unload(vcpu);
|
||||
return;
|
||||
}
|
||||
|
||||
static_call(kvm_x86_tlb_flush_guest)(vcpu);
|
||||
}
|
||||
|
||||
|
@ -3101,9 +3114,11 @@ static void record_steal_time(struct kvm_vcpu *vcpu)
|
|||
* expensive IPIs.
|
||||
*/
|
||||
if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
|
||||
u8 st_preempted = xchg(&st->preempted, 0);
|
||||
|
||||
trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
|
||||
st->preempted & KVM_VCPU_FLUSH_TLB);
|
||||
if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
|
||||
st_preempted & KVM_VCPU_FLUSH_TLB);
|
||||
if (st_preempted & KVM_VCPU_FLUSH_TLB)
|
||||
kvm_vcpu_flush_tlb_guest(vcpu);
|
||||
} else {
|
||||
st->preempted = 0;
|
||||
|
|
|
@ -836,8 +836,8 @@ __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
|
|||
|
||||
if (si_code == SEGV_PKUERR)
|
||||
force_sig_pkuerr((void __user *)address, pkey);
|
||||
|
||||
force_sig_fault(SIGSEGV, si_code, (void __user *)address);
|
||||
else
|
||||
force_sig_fault(SIGSEGV, si_code, (void __user *)address);
|
||||
|
||||
local_irq_disable();
|
||||
}
|
||||
|
|
|
@ -504,10 +504,6 @@ void __init sme_enable(struct boot_params *bp)
|
|||
#define AMD_SME_BIT BIT(0)
|
||||
#define AMD_SEV_BIT BIT(1)
|
||||
|
||||
/* Check the SEV MSR whether SEV or SME is enabled */
|
||||
sev_status = __rdmsr(MSR_AMD64_SEV);
|
||||
feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
|
||||
|
||||
/*
|
||||
* Check for the SME/SEV feature:
|
||||
* CPUID Fn8000_001F[EAX]
|
||||
|
@ -519,11 +515,16 @@ void __init sme_enable(struct boot_params *bp)
|
|||
eax = 0x8000001f;
|
||||
ecx = 0;
|
||||
native_cpuid(&eax, &ebx, &ecx, &edx);
|
||||
if (!(eax & feature_mask))
|
||||
/* Check whether SEV or SME is supported */
|
||||
if (!(eax & (AMD_SEV_BIT | AMD_SME_BIT)))
|
||||
return;
|
||||
|
||||
me_mask = 1UL << (ebx & 0x3f);
|
||||
|
||||
/* Check the SEV MSR whether SEV or SME is enabled */
|
||||
sev_status = __rdmsr(MSR_AMD64_SEV);
|
||||
feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
|
||||
|
||||
/* Check if memory encryption is enabled */
|
||||
if (feature_mask == AMD_SME_BIT) {
|
||||
/*
|
||||
|
|
|
@ -450,6 +450,18 @@ void __init efi_free_boot_services(void)
|
|||
size -= rm_size;
|
||||
}
|
||||
|
||||
/*
|
||||
* Don't free memory under 1M for two reasons:
|
||||
* - BIOS might clobber it
|
||||
* - Crash kernel needs it to be reserved
|
||||
*/
|
||||
if (start + size < SZ_1M)
|
||||
continue;
|
||||
if (start < SZ_1M) {
|
||||
size -= (SZ_1M - start);
|
||||
start = SZ_1M;
|
||||
}
|
||||
|
||||
memblock_free_late(start, size);
|
||||
}
|
||||
|
||||
|
|
|
@ -29,14 +29,16 @@ void __init reserve_real_mode(void)
|
|||
|
||||
/* Has to be under 1M so we can execute real-mode AP code. */
|
||||
mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
|
||||
if (!mem) {
|
||||
if (!mem)
|
||||
pr_info("No sub-1M memory is available for the trampoline\n");
|
||||
return;
|
||||
}
|
||||
else
|
||||
set_real_mode_mem(mem);
|
||||
|
||||
memblock_reserve(mem, size);
|
||||
set_real_mode_mem(mem);
|
||||
crash_reserve_low_1M();
|
||||
/*
|
||||
* Unconditionally reserve the entire fisrt 1M, see comment in
|
||||
* setup_arch().
|
||||
*/
|
||||
memblock_reserve(0, SZ_1M);
|
||||
}
|
||||
|
||||
static void sme_sev_setup_real_mode(struct trampoline_header *th)
|
||||
|
|
|
@ -233,7 +233,8 @@ async_xor_offs(struct page *dest, unsigned int offset,
|
|||
if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
|
||||
src_cnt--;
|
||||
src_list++;
|
||||
src_offs++;
|
||||
if (src_offs)
|
||||
src_offs++;
|
||||
}
|
||||
|
||||
/* wait for any prerequisite operations */
|
||||
|
|
|
@ -285,6 +285,14 @@ static void acpi_ut_delete_internal_obj(union acpi_operand_object *object)
|
|||
}
|
||||
break;
|
||||
|
||||
case ACPI_TYPE_LOCAL_ADDRESS_HANDLER:
|
||||
|
||||
ACPI_DEBUG_PRINT((ACPI_DB_ALLOCATIONS,
|
||||
"***** Address handler %p\n", object));
|
||||
|
||||
acpi_os_delete_mutex(object->address_space.context_mutex);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
break;
|
||||
|
|
|
@ -330,32 +330,21 @@ static void acpi_bus_osc_negotiate_platform_control(void)
|
|||
if (ACPI_FAILURE(acpi_run_osc(handle, &context)))
|
||||
return;
|
||||
|
||||
capbuf_ret = context.ret.pointer;
|
||||
if (context.ret.length <= OSC_SUPPORT_DWORD) {
|
||||
kfree(context.ret.pointer);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now run _OSC again with query flag clear and with the caps
|
||||
* supported by both the OS and the platform.
|
||||
*/
|
||||
capbuf[OSC_QUERY_DWORD] = 0;
|
||||
capbuf[OSC_SUPPORT_DWORD] = capbuf_ret[OSC_SUPPORT_DWORD];
|
||||
kfree(context.ret.pointer);
|
||||
|
||||
/* Now run _OSC again with query flag clear */
|
||||
capbuf[OSC_QUERY_DWORD] = 0;
|
||||
|
||||
if (ACPI_FAILURE(acpi_run_osc(handle, &context)))
|
||||
return;
|
||||
|
||||
capbuf_ret = context.ret.pointer;
|
||||
if (context.ret.length > OSC_SUPPORT_DWORD) {
|
||||
osc_sb_apei_support_acked =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_APEI_SUPPORT;
|
||||
osc_pc_lpi_support_confirmed =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_PCLPI_SUPPORT;
|
||||
osc_sb_native_usb4_support_confirmed =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_NATIVE_USB4_SUPPORT;
|
||||
}
|
||||
osc_sb_apei_support_acked =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_APEI_SUPPORT;
|
||||
osc_pc_lpi_support_confirmed =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_PCLPI_SUPPORT;
|
||||
osc_sb_native_usb4_support_confirmed =
|
||||
capbuf_ret[OSC_SUPPORT_DWORD] & OSC_SB_NATIVE_USB4_SUPPORT;
|
||||
|
||||
kfree(context.ret.pointer);
|
||||
}
|
||||
|
|
|
@ -1009,10 +1009,8 @@ static void acpi_sleep_hibernate_setup(void)
|
|||
return;
|
||||
|
||||
acpi_get_table(ACPI_SIG_FACS, 1, (struct acpi_table_header **)&facs);
|
||||
if (facs) {
|
||||
if (facs)
|
||||
s4_hardware_signature = facs->hardware_signature;
|
||||
acpi_put_table((struct acpi_table_header *)facs);
|
||||
}
|
||||
}
|
||||
#else /* !CONFIG_HIBERNATION */
|
||||
static inline void acpi_sleep_hibernate_setup(void) {}
|
||||
|
|
|
@ -218,14 +218,14 @@ static int memory_block_offline(struct memory_block *mem)
|
|||
struct zone *zone;
|
||||
int ret;
|
||||
|
||||
zone = page_zone(pfn_to_page(start_pfn));
|
||||
|
||||
/*
|
||||
* Unaccount before offlining, such that unpopulated zone and kthreads
|
||||
* can properly be torn down in offline_pages().
|
||||
*/
|
||||
if (nr_vmemmap_pages)
|
||||
if (nr_vmemmap_pages) {
|
||||
zone = page_zone(pfn_to_page(start_pfn));
|
||||
adjust_present_page_count(zone, -nr_vmemmap_pages);
|
||||
}
|
||||
|
||||
ret = offline_pages(start_pfn + nr_vmemmap_pages,
|
||||
nr_pages - nr_vmemmap_pages);
|
||||
|
|
|
@ -1879,29 +1879,18 @@ static int lo_compat_ioctl(struct block_device *bdev, fmode_t mode,
|
|||
|
||||
static int lo_open(struct block_device *bdev, fmode_t mode)
|
||||
{
|
||||
struct loop_device *lo;
|
||||
struct loop_device *lo = bdev->bd_disk->private_data;
|
||||
int err;
|
||||
|
||||
/*
|
||||
* take loop_ctl_mutex to protect lo pointer from race with
|
||||
* loop_control_ioctl(LOOP_CTL_REMOVE), however, to reduce contention
|
||||
* release it prior to updating lo->lo_refcnt.
|
||||
*/
|
||||
err = mutex_lock_killable(&loop_ctl_mutex);
|
||||
if (err)
|
||||
return err;
|
||||
lo = bdev->bd_disk->private_data;
|
||||
if (!lo) {
|
||||
mutex_unlock(&loop_ctl_mutex);
|
||||
return -ENXIO;
|
||||
}
|
||||
err = mutex_lock_killable(&lo->lo_mutex);
|
||||
mutex_unlock(&loop_ctl_mutex);
|
||||
if (err)
|
||||
return err;
|
||||
atomic_inc(&lo->lo_refcnt);
|
||||
if (lo->lo_state == Lo_deleting)
|
||||
err = -ENXIO;
|
||||
else
|
||||
atomic_inc(&lo->lo_refcnt);
|
||||
mutex_unlock(&lo->lo_mutex);
|
||||
return 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
static void lo_release(struct gendisk *disk, fmode_t mode)
|
||||
|
@ -2285,7 +2274,7 @@ static long loop_control_ioctl(struct file *file, unsigned int cmd,
|
|||
mutex_unlock(&lo->lo_mutex);
|
||||
break;
|
||||
}
|
||||
lo->lo_disk->private_data = NULL;
|
||||
lo->lo_state = Lo_deleting;
|
||||
mutex_unlock(&lo->lo_mutex);
|
||||
idr_remove(&loop_index_idr, lo->lo_number);
|
||||
loop_remove(lo);
|
||||
|
|
|
@ -22,6 +22,7 @@ enum {
|
|||
Lo_unbound,
|
||||
Lo_bound,
|
||||
Lo_rundown,
|
||||
Lo_deleting,
|
||||
};
|
||||
|
||||
struct loop_func_table;
|
||||
|
|
|
@ -388,6 +388,8 @@ static const struct usb_device_id blacklist_table[] = {
|
|||
/* Realtek 8822CE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0bda, 0xb00c), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x0bda, 0xc822), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
|
||||
/* Realtek 8852AE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0bda, 0xc852), .driver_info = BTUSB_REALTEK |
|
||||
|
@ -2527,10 +2529,17 @@ static int btusb_intel_download_firmware_newgen(struct hci_dev *hdev,
|
|||
}
|
||||
|
||||
btusb_setup_intel_newgen_get_fw_name(ver, fwname, sizeof(fwname), "sfi");
|
||||
err = request_firmware(&fw, fwname, &hdev->dev);
|
||||
err = firmware_request_nowarn(&fw, fwname, &hdev->dev);
|
||||
if (err < 0) {
|
||||
if (!test_bit(BTUSB_BOOTLOADER, &data->flags)) {
|
||||
/* Firmware has already been loaded */
|
||||
set_bit(BTUSB_FIRMWARE_LOADED, &data->flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
bt_dev_err(hdev, "Failed to load Intel firmware file %s (%d)",
|
||||
fwname, err);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -2680,12 +2689,24 @@ download:
|
|||
err = btusb_setup_intel_new_get_fw_name(ver, params, fwname,
|
||||
sizeof(fwname), "sfi");
|
||||
if (err < 0) {
|
||||
if (!test_bit(BTUSB_BOOTLOADER, &data->flags)) {
|
||||
/* Firmware has already been loaded */
|
||||
set_bit(BTUSB_FIRMWARE_LOADED, &data->flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
bt_dev_err(hdev, "Unsupported Intel firmware naming");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = request_firmware(&fw, fwname, &hdev->dev);
|
||||
err = firmware_request_nowarn(&fw, fwname, &hdev->dev);
|
||||
if (err < 0) {
|
||||
if (!test_bit(BTUSB_BOOTLOADER, &data->flags)) {
|
||||
/* Firmware has already been loaded */
|
||||
set_bit(BTUSB_FIRMWARE_LOADED, &data->flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
bt_dev_err(hdev, "Failed to load Intel firmware file %s (%d)",
|
||||
fwname, err);
|
||||
return err;
|
||||
|
|
|
@ -311,8 +311,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
|
|||
MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 1),
|
||||
MHI_CHANNEL_CONFIG_UL(12, "MBIM", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(32, "AT", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(33, "AT", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
|
||||
MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
|
||||
};
|
||||
|
@ -708,7 +708,7 @@ static void mhi_pci_remove(struct pci_dev *pdev)
|
|||
struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
|
||||
struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
|
||||
|
||||
del_timer(&mhi_pdev->health_check_timer);
|
||||
del_timer_sync(&mhi_pdev->health_check_timer);
|
||||
cancel_work_sync(&mhi_pdev->recovery_work);
|
||||
|
||||
if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
|
||||
|
@ -935,9 +935,43 @@ static int __maybe_unused mhi_pci_resume(struct device *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __maybe_unused mhi_pci_freeze(struct device *dev)
|
||||
{
|
||||
struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev);
|
||||
struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
|
||||
|
||||
/* We want to stop all operations, hibernation does not guarantee that
|
||||
* device will be in the same state as before freezing, especially if
|
||||
* the intermediate restore kernel reinitializes MHI device with new
|
||||
* context.
|
||||
*/
|
||||
if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
|
||||
mhi_power_down(mhi_cntrl, false);
|
||||
mhi_unprepare_after_power_down(mhi_cntrl);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused mhi_pci_restore(struct device *dev)
|
||||
{
|
||||
struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev);
|
||||
|
||||
/* Reinitialize the device */
|
||||
queue_work(system_long_wq, &mhi_pdev->recovery_work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops mhi_pci_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(mhi_pci_runtime_suspend, mhi_pci_runtime_resume, NULL)
|
||||
SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume)
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
.suspend = mhi_pci_suspend,
|
||||
.resume = mhi_pci_resume,
|
||||
.freeze = mhi_pci_freeze,
|
||||
.thaw = mhi_pci_restore,
|
||||
.restore = mhi_pci_restore,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct pci_driver mhi_pci_driver = {
|
||||
|
|
|
@ -1334,6 +1334,34 @@ err_allow_idle:
|
|||
return error;
|
||||
}
|
||||
|
||||
static int sysc_reinit_module(struct sysc *ddata, bool leave_enabled)
|
||||
{
|
||||
struct device *dev = ddata->dev;
|
||||
int error;
|
||||
|
||||
/* Disable target module if it is enabled */
|
||||
if (ddata->enabled) {
|
||||
error = sysc_runtime_suspend(dev);
|
||||
if (error)
|
||||
dev_warn(dev, "reinit suspend failed: %i\n", error);
|
||||
}
|
||||
|
||||
/* Enable target module */
|
||||
error = sysc_runtime_resume(dev);
|
||||
if (error)
|
||||
dev_warn(dev, "reinit resume failed: %i\n", error);
|
||||
|
||||
if (leave_enabled)
|
||||
return error;
|
||||
|
||||
/* Disable target module if no leave_enabled was set */
|
||||
error = sysc_runtime_suspend(dev);
|
||||
if (error)
|
||||
dev_warn(dev, "reinit suspend failed: %i\n", error);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static int __maybe_unused sysc_noirq_suspend(struct device *dev)
|
||||
{
|
||||
struct sysc *ddata;
|
||||
|
@ -1344,12 +1372,18 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
|
|||
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
|
||||
return 0;
|
||||
|
||||
return pm_runtime_force_suspend(dev);
|
||||
if (!ddata->enabled)
|
||||
return 0;
|
||||
|
||||
ddata->needs_resume = 1;
|
||||
|
||||
return sysc_runtime_suspend(dev);
|
||||
}
|
||||
|
||||
static int __maybe_unused sysc_noirq_resume(struct device *dev)
|
||||
{
|
||||
struct sysc *ddata;
|
||||
int error = 0;
|
||||
|
||||
ddata = dev_get_drvdata(dev);
|
||||
|
||||
|
@ -1357,7 +1391,19 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev)
|
|||
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
|
||||
return 0;
|
||||
|
||||
return pm_runtime_force_resume(dev);
|
||||
if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_RESUME) {
|
||||
error = sysc_reinit_module(ddata, ddata->needs_resume);
|
||||
if (error)
|
||||
dev_warn(dev, "noirq_resume failed: %i\n", error);
|
||||
} else if (ddata->needs_resume) {
|
||||
error = sysc_runtime_resume(dev);
|
||||
if (error)
|
||||
dev_warn(dev, "noirq_resume failed: %i\n", error);
|
||||
}
|
||||
|
||||
ddata->needs_resume = 0;
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops sysc_pm_ops = {
|
||||
|
@ -1408,9 +1454,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
|||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
/* Uarts on omap4 and later */
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
|
||||
/* Quirks that need to be set based on the module address */
|
||||
SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
|
||||
|
@ -1459,6 +1505,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
|||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK("tptc", 0, 0, -ENODEV, -ENODEV, 0x40007c00, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK("sata", 0, 0xfc, 0x1100, -ENODEV, 0x5e412000, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff,
|
||||
|
@ -1466,7 +1514,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
|||
SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
|
||||
0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY |
|
||||
SYSC_QUIRK_REINIT_ON_RESUME),
|
||||
SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
|
||||
SYSC_MODULE_QUIRK_WDT),
|
||||
/* PRUSS on am3, am4 and am5 */
|
||||
|
@ -1524,7 +1573,6 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
|||
SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000400, 0xffffffff, 0),
|
||||
SYSC_QUIRK("rfbi", 0x4832a800, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
||||
SYSC_QUIRK("rfbi", 0x58002000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
||||
SYSC_QUIRK("sata", 0, 0xfc, 0x1100, -ENODEV, 0x5e412000, 0xffffffff, 0),
|
||||
SYSC_QUIRK("scm", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0),
|
||||
SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4e8b0100, 0xffffffff, 0),
|
||||
SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4f000100, 0xffffffff, 0),
|
||||
|
|
|
@ -745,12 +745,12 @@ static int __init idxd_init_module(void)
|
|||
* If the CPU does not support MOVDIR64B or ENQCMDS, there's no point in
|
||||
* enumerating the device. We can not utilize it.
|
||||
*/
|
||||
if (!boot_cpu_has(X86_FEATURE_MOVDIR64B)) {
|
||||
if (!cpu_feature_enabled(X86_FEATURE_MOVDIR64B)) {
|
||||
pr_warn("idxd driver failed to load without MOVDIR64B.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!boot_cpu_has(X86_FEATURE_ENQCMD))
|
||||
if (!cpu_feature_enabled(X86_FEATURE_ENQCMD))
|
||||
pr_warn("Platform does not have ENQCMD(S) support.\n");
|
||||
else
|
||||
support_enqcmd = true;
|
||||
|
|
|
@ -276,8 +276,7 @@ static int cper_dimm_err_location(struct cper_mem_err_compact *mem, char *msg)
|
|||
if (!msg || !(mem->validation_bits & CPER_MEM_VALID_MODULE_HANDLE))
|
||||
return 0;
|
||||
|
||||
n = 0;
|
||||
len = CPER_REC_LEN - 1;
|
||||
len = CPER_REC_LEN;
|
||||
dmi_memdev_name(mem->mem_dev_handle, &bank, &device);
|
||||
if (bank && device)
|
||||
n = snprintf(msg, len, "DIMM location: %s %s ", bank, device);
|
||||
|
@ -286,7 +285,6 @@ static int cper_dimm_err_location(struct cper_mem_err_compact *mem, char *msg)
|
|||
"DIMM location: not present. DMI handle: 0x%.4x ",
|
||||
mem->mem_dev_handle);
|
||||
|
||||
msg[n] = '\0';
|
||||
return n;
|
||||
}
|
||||
|
||||
|
|
|
@ -98,6 +98,9 @@ u64 __init efi_get_fdt_params(struct efi_memory_map_data *mm)
|
|||
BUILD_BUG_ON(ARRAY_SIZE(target) != ARRAY_SIZE(name));
|
||||
BUILD_BUG_ON(ARRAY_SIZE(target) != ARRAY_SIZE(dt_params[0].params));
|
||||
|
||||
if (!fdt)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dt_params); i++) {
|
||||
node = fdt_path_offset(fdt, dt_params[i].path);
|
||||
if (node < 0)
|
||||
|
|
|
@ -103,7 +103,7 @@ static int find_file_option(const efi_char16_t *cmdline, int cmdline_len,
|
|||
return 0;
|
||||
|
||||
/* Skip any leading slashes */
|
||||
while (cmdline[i] == L'/' || cmdline[i] == L'\\')
|
||||
while (i < cmdline_len && (cmdline[i] == L'/' || cmdline[i] == L'\\'))
|
||||
i++;
|
||||
|
||||
while (--result_len > 0 && i < cmdline_len) {
|
||||
|
|
|
@ -67,11 +67,6 @@ static bool entry_is_valid(const efi_memory_desc_t *in, efi_memory_desc_t *out)
|
|||
return false;
|
||||
}
|
||||
|
||||
if (!(in->attribute & (EFI_MEMORY_RO | EFI_MEMORY_XP))) {
|
||||
pr_warn("Entry attributes invalid: RO and XP bits both cleared\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (PAGE_SIZE > EFI_PAGE_SIZE &&
|
||||
(!PAGE_ALIGNED(in->phys_addr) ||
|
||||
!PAGE_ALIGNED(in->num_pages << EFI_PAGE_SHIFT))) {
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/of_device.h>
|
||||
|
||||
#define WCD_PIN_MASK(p) BIT(p - 1)
|
||||
#define WCD_PIN_MASK(p) BIT(p)
|
||||
#define WCD_REG_DIR_CTL_OFFSET 0x42
|
||||
#define WCD_REG_VAL_CTL_OFFSET 0x43
|
||||
#define WCD934X_NPINS 5
|
||||
|
|
|
@ -337,7 +337,6 @@ static int amdgpu_ctx_query2(struct amdgpu_device *adev,
|
|||
{
|
||||
struct amdgpu_ctx *ctx;
|
||||
struct amdgpu_ctx_mgr *mgr;
|
||||
unsigned long ras_counter;
|
||||
|
||||
if (!fpriv)
|
||||
return -EINVAL;
|
||||
|
@ -362,21 +361,6 @@ static int amdgpu_ctx_query2(struct amdgpu_device *adev,
|
|||
if (atomic_read(&ctx->guilty))
|
||||
out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_GUILTY;
|
||||
|
||||
/*query ue count*/
|
||||
ras_counter = amdgpu_ras_query_error_count(adev, false);
|
||||
/*ras counter is monotonic increasing*/
|
||||
if (ras_counter != ctx->ras_counter_ue) {
|
||||
out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_RAS_UE;
|
||||
ctx->ras_counter_ue = ras_counter;
|
||||
}
|
||||
|
||||
/*query ce count*/
|
||||
ras_counter = amdgpu_ras_query_error_count(adev, true);
|
||||
if (ras_counter != ctx->ras_counter_ce) {
|
||||
out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_RAS_CE;
|
||||
ctx->ras_counter_ce = ras_counter;
|
||||
}
|
||||
|
||||
mutex_unlock(&mgr->lock);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -3118,7 +3118,9 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
|
|||
*/
|
||||
bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
|
||||
{
|
||||
if (amdgpu_sriov_vf(adev) || adev->enable_virtual_display)
|
||||
if (amdgpu_sriov_vf(adev) ||
|
||||
adev->enable_virtual_display ||
|
||||
(adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK))
|
||||
return false;
|
||||
|
||||
return amdgpu_device_asic_has_dc_support(adev->asic_type);
|
||||
|
|
|
@ -1057,7 +1057,7 @@ int amdgpu_display_gem_fb_init(struct drm_device *dev,
|
|||
|
||||
return 0;
|
||||
err:
|
||||
drm_err(dev, "Failed to init gem fb: %d\n", ret);
|
||||
drm_dbg_kms(dev, "Failed to init gem fb: %d\n", ret);
|
||||
rfb->base.obj[0] = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
@ -1094,7 +1094,7 @@ int amdgpu_display_gem_fb_verify_and_init(
|
|||
|
||||
return 0;
|
||||
err:
|
||||
drm_err(dev, "Failed to verify and init gem fb: %d\n", ret);
|
||||
drm_dbg_kms(dev, "Failed to verify and init gem fb: %d\n", ret);
|
||||
rfb->base.obj[0] = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -101,7 +101,8 @@ static int amdgpu_fru_read_eeprom(struct amdgpu_device *adev, uint32_t addrptr,
|
|||
int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
|
||||
{
|
||||
unsigned char buff[34];
|
||||
int addrptr = 0, size = 0;
|
||||
int addrptr, size;
|
||||
int len;
|
||||
|
||||
if (!is_fru_eeprom_supported(adev))
|
||||
return 0;
|
||||
|
@ -109,7 +110,7 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
|
|||
/* If algo exists, it means that the i2c_adapter's initialized */
|
||||
if (!adev->pm.smu_i2c.algo) {
|
||||
DRM_WARN("Cannot access FRU, EEPROM accessor not initialized");
|
||||
return 0;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* There's a lot of repetition here. This is due to the FRU having
|
||||
|
@ -128,7 +129,7 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
|
|||
size = amdgpu_fru_read_eeprom(adev, addrptr, buff);
|
||||
if (size < 1) {
|
||||
DRM_ERROR("Failed to read FRU Manufacturer, ret:%d", size);
|
||||
return size;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Increment the addrptr by the size of the field, and 1 due to the
|
||||
|
@ -138,43 +139,45 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
|
|||
size = amdgpu_fru_read_eeprom(adev, addrptr, buff);
|
||||
if (size < 1) {
|
||||
DRM_ERROR("Failed to read FRU product name, ret:%d", size);
|
||||
return size;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
len = size;
|
||||
/* Product name should only be 32 characters. Any more,
|
||||
* and something could be wrong. Cap it at 32 to be safe
|
||||
*/
|
||||
if (size > 32) {
|
||||
if (len >= sizeof(adev->product_name)) {
|
||||
DRM_WARN("FRU Product Number is larger than 32 characters. This is likely a mistake");
|
||||
size = 32;
|
||||
len = sizeof(adev->product_name) - 1;
|
||||
}
|
||||
/* Start at 2 due to buff using fields 0 and 1 for the address */
|
||||
memcpy(adev->product_name, &buff[2], size);
|
||||
adev->product_name[size] = '\0';
|
||||
memcpy(adev->product_name, &buff[2], len);
|
||||
adev->product_name[len] = '\0';
|
||||
|
||||
addrptr += size + 1;
|
||||
size = amdgpu_fru_read_eeprom(adev, addrptr, buff);
|
||||
if (size < 1) {
|
||||
DRM_ERROR("Failed to read FRU product number, ret:%d", size);
|
||||
return size;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
len = size;
|
||||
/* Product number should only be 16 characters. Any more,
|
||||
* and something could be wrong. Cap it at 16 to be safe
|
||||
*/
|
||||
if (size > 16) {
|
||||
if (len >= sizeof(adev->product_number)) {
|
||||
DRM_WARN("FRU Product Number is larger than 16 characters. This is likely a mistake");
|
||||
size = 16;
|
||||
len = sizeof(adev->product_number) - 1;
|
||||
}
|
||||
memcpy(adev->product_number, &buff[2], size);
|
||||
adev->product_number[size] = '\0';
|
||||
memcpy(adev->product_number, &buff[2], len);
|
||||
adev->product_number[len] = '\0';
|
||||
|
||||
addrptr += size + 1;
|
||||
size = amdgpu_fru_read_eeprom(adev, addrptr, buff);
|
||||
|
||||
if (size < 1) {
|
||||
DRM_ERROR("Failed to read FRU product version, ret:%d", size);
|
||||
return size;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
addrptr += size + 1;
|
||||
|
@ -182,18 +185,19 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
|
|||
|
||||
if (size < 1) {
|
||||
DRM_ERROR("Failed to read FRU serial number, ret:%d", size);
|
||||
return size;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
len = size;
|
||||
/* Serial number should only be 16 characters. Any more,
|
||||
* and something could be wrong. Cap it at 16 to be safe
|
||||
*/
|
||||
if (size > 16) {
|
||||
if (len >= sizeof(adev->serial)) {
|
||||
DRM_WARN("FRU Serial Number is larger than 16 characters. This is likely a mistake");
|
||||
size = 16;
|
||||
len = sizeof(adev->serial) - 1;
|
||||
}
|
||||
memcpy(adev->serial, &buff[2], size);
|
||||
adev->serial[size] = '\0';
|
||||
memcpy(adev->serial, &buff[2], len);
|
||||
adev->serial[len] = '\0';
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -100,7 +100,7 @@ static void amdgpu_bo_destroy(struct ttm_buffer_object *tbo)
|
|||
kfree(ubo->metadata);
|
||||
}
|
||||
|
||||
kfree(bo);
|
||||
kvfree(bo);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -552,7 +552,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
|
|||
BUG_ON(bp->bo_ptr_size < sizeof(struct amdgpu_bo));
|
||||
|
||||
*bo_ptr = NULL;
|
||||
bo = kzalloc(bp->bo_ptr_size, GFP_KERNEL);
|
||||
bo = kvzalloc(bp->bo_ptr_size, GFP_KERNEL);
|
||||
if (bo == NULL)
|
||||
return -ENOMEM;
|
||||
drm_gem_private_object_init(adev_to_drm(adev), &bo->tbo.base, size);
|
||||
|
|
|
@ -76,6 +76,7 @@ struct psp_ring
|
|||
uint64_t ring_mem_mc_addr;
|
||||
void *ring_mem_handle;
|
||||
uint32_t ring_size;
|
||||
uint32_t ring_wptr;
|
||||
};
|
||||
|
||||
/* More registers may will be supported */
|
||||
|
|
|
@ -173,6 +173,9 @@
|
|||
#define mmGC_THROTTLE_CTRL_Sienna_Cichlid 0x2030
|
||||
#define mmGC_THROTTLE_CTRL_Sienna_Cichlid_BASE_IDX 0
|
||||
|
||||
#define mmRLC_SPARE_INT_0_Sienna_Cichlid 0x4ca5
|
||||
#define mmRLC_SPARE_INT_0_Sienna_Cichlid_BASE_IDX 1
|
||||
|
||||
#define GFX_RLCG_GC_WRITE_OLD (0x8 << 28)
|
||||
#define GFX_RLCG_GC_WRITE (0x0 << 28)
|
||||
#define GFX_RLCG_GC_READ (0x1 << 28)
|
||||
|
@ -1480,8 +1483,15 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev, u32 offset, u32 v, uint32
|
|||
(adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG2) * 4;
|
||||
scratch_reg3 = adev->rmmio +
|
||||
(adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3) * 4;
|
||||
spare_int = adev->rmmio +
|
||||
(adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_BASE_IDX] + mmRLC_SPARE_INT) * 4;
|
||||
|
||||
if (adev->asic_type >= CHIP_SIENNA_CICHLID) {
|
||||
spare_int = adev->rmmio +
|
||||
(adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_0_Sienna_Cichlid_BASE_IDX]
|
||||
+ mmRLC_SPARE_INT_0_Sienna_Cichlid) * 4;
|
||||
} else {
|
||||
spare_int = adev->rmmio +
|
||||
(adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_BASE_IDX] + mmRLC_SPARE_INT) * 4;
|
||||
}
|
||||
|
||||
grbm_cntl = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_CNTL_BASE_IDX] + mmGRBM_GFX_CNTL;
|
||||
grbm_idx = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_INDEX_BASE_IDX] + mmGRBM_GFX_INDEX;
|
||||
|
@ -7349,9 +7359,15 @@ static int gfx_v10_0_hw_fini(void *handle)
|
|||
if (amdgpu_sriov_vf(adev)) {
|
||||
gfx_v10_0_cp_gfx_enable(adev, false);
|
||||
/* Program KIQ position of RLC_CP_SCHEDULERS during destroy */
|
||||
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
|
||||
tmp &= 0xffffff00;
|
||||
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
|
||||
if (adev->asic_type >= CHIP_SIENNA_CICHLID) {
|
||||
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);
|
||||
tmp &= 0xffffff00;
|
||||
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp);
|
||||
} else {
|
||||
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
|
||||
tmp &= 0xffffff00;
|
||||
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
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