ASoC: Fixes for v6.5
A lot of fixes here for the Qualcomm CODEC drivers, there was quite a bit of fragility with the SoundWire probe due to the combined DT and hotplug approach that the bus has which Johan Hovold fixed along with a bunch of other issues that came up in the process. Srivinvas Kandagatla also fixed some separate issues that have been lurking for a while in the Qualcomm AP side, and there's a good set of AMD fixes from Vijendar Mukunda too. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmS0S+wACgkQJNaLcl1U h9C/rwf7BgS6oDJUY3dbr+JkCb0ZFnDR583htibhJTG98hSzBDvTRPAeEa4yhzed MDkrW4S02EezRRtfyHwx4oLeyiarl6KOd2Rth+49nsF1uVzpTyyvcds/B7k38X0Y mOeO0PDfGxnSZa7kP7EQaQKXsKpA9jAInojRO1ontPpU2GKgB/+JduZ4LS6IqTGs bRQmAmeHeJcLSVJ83doVlseCvFTj3YUmhRscnxPDiwFdR7le07g8eV1iMex0Q9fr YQBAmZNtCZNntP/Wn0XF7fnvSu9MioMw4vymJsPElvSupOj4YGNnFUdO6JXRp5pH ZUlVji17AQ+VmNxi5BlHwX8XvJM8Vg== =kznt -----END PGP SIGNATURE----- Merge tag 'asoc-fix-v6.5-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v6.5 A lot of fixes here for the Qualcomm CODEC drivers, there was quite a bit of fragility with the SoundWire probe due to the combined DT and hotplug approach that the bus has which Johan Hovold fixed along with a bunch of other issues that came up in the process. Srivinvas Kandagatla also fixed some separate issues that have been lurking for a while in the Qualcomm AP side, and there's a good set of AMD fixes from Vijendar Mukunda too.
This commit is contained in:
Коммит
b2cb84d780
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@ -39,22 +39,4 @@ required:
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additionalProperties: false
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examples:
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- |
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sound {
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compatible = "audio-graph-card2";
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links = <&cpu_port>;
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};
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cpu {
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compatible = "cpu-driver";
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cpu_port: port { cpu_ep: endpoint { remote-endpoint = <&codec_ep>; }; };
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};
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codec {
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compatible = "codec-driver";
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port { codec_ep: endpoint { remote-endpoint = <&cpu_ep>; }; };
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};
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...
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|
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Google SC7180-Trogdor ASoC sound card driver
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maintainers:
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- Rohit kumar <rohitkr@codeaurora.org>
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- Rohit kumar <quic_rohkumar@quicinc.com>
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- Cheng-Yi Chiang <cychiang@chromium.org>
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description:
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|
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@ -8,7 +8,7 @@ title: Qualcomm Technologies Inc. LPASS CPU dai driver
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maintainers:
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- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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- Rohit kumar <rohitkr@codeaurora.org>
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- Rohit kumar <quic_rohkumar@quicinc.com>
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description: |
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Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
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@ -1865,9 +1865,11 @@ M: Martin Povišer <povik+lin@cutebit.org>
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L: asahi@lists.linux.dev
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/sound/adi,ssm3515.yaml
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F: Documentation/devicetree/bindings/sound/apple,*
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F: sound/soc/apple/*
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F: sound/soc/codecs/cs42l83-i2c.c
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F: sound/soc/codecs/ssm3515.c
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ARM/APPLE MACHINE SUPPORT
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M: Hector Martin <marcan@marcan.st>
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@ -173,7 +173,7 @@ int snd_amd_acp_find_config(struct pci_dev *pci);
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static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int direction)
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{
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u64 byte_count, low = 0, high = 0;
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u64 byte_count = 0, low = 0, high = 0;
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (dai_id) {
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@ -191,7 +191,7 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int
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break;
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default:
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dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
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return -EINVAL;
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goto POINTER_RETURN_BYTES;
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}
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} else {
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switch (dai_id) {
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@ -213,12 +213,13 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int
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break;
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default:
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dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
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return -EINVAL;
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goto POINTER_RETURN_BYTES;
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}
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}
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/* Get 64 bit value from two 32 bit registers */
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byte_count = (high << 32) | low;
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POINTER_RETURN_BYTES:
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return byte_count;
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}
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@ -116,8 +116,28 @@
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#define ACP63_SDW0_DMA_MAX_STREAMS 6
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#define ACP63_SDW1_DMA_MAX_STREAMS 2
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#define ACP_P1_AUDIO_TX_THRESHOLD 6
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/*
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* Below entries describes SDW0 instance DMA stream id and DMA irq bit mapping
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* in ACP_EXTENAL_INTR_CNTL register.
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* Stream id IRQ Bit
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* 0 (SDW0_AUDIO0_TX) 28
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* 1 (SDW0_AUDIO1_TX) 26
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* 2 (SDW0_AUDIO2_TX) 24
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* 3 (SDW0_AUDIO0_RX) 27
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* 4 (SDW0_AUDIO1_RX) 25
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* 5 (SDW0_AUDIO2_RX) 23
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*/
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#define SDW0_DMA_TX_IRQ_MASK(i) (ACP_AUDIO0_TX_THRESHOLD - (2 * (i)))
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#define SDW0_DMA_RX_IRQ_MASK(i) (ACP_AUDIO0_RX_THRESHOLD - (2 * (i)))
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#define SDW0_DMA_RX_IRQ_MASK(i) (ACP_AUDIO0_RX_THRESHOLD - (2 * ((i) - 3)))
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/*
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* Below entries describes SDW1 instance DMA stream id and DMA irq bit mapping
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* in ACP_EXTENAL_INTR_CNTL1 register.
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* Stream id IRQ Bit
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* 0 (SDW1_AUDIO1_TX) 6
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* 1 (SDW1_AUDIO1_RX) 5
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*/
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#define SDW1_DMA_IRQ_MASK(i) (ACP_P1_AUDIO_TX_THRESHOLD - (i))
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#define ACP_DELAY_US 5
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@ -257,7 +257,7 @@ static int sdw_amd_scan_controller(struct device *dev)
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&sdw_manager_bitmap, 1);
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if (ret) {
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dev_err(dev, "Failed to read mipi-sdw-manager-list: %d\n", ret);
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dev_dbg(dev, "Failed to read mipi-sdw-manager-list: %d\n", ret);
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return -EINVAL;
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}
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count = hweight32(sdw_manager_bitmap);
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@ -641,7 +641,7 @@ static int snd_acp63_probe(struct pci_dev *pci,
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ret = get_acp63_device_config(val, pci, adata);
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/* ACP PCI driver probe should be continued even PDM or SoundWire Devices are not found */
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if (ret) {
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dev_err(&pci->dev, "get acp device config failed:%d\n", ret);
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dev_dbg(&pci->dev, "get acp device config failed:%d\n", ret);
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goto skip_pdev_creation;
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}
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ret = create_acp63_platform_devs(pci, adata, addr);
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@ -30,7 +30,7 @@ static struct sdw_dma_ring_buf_reg sdw0_dma_ring_buf_reg[ACP63_SDW0_DMA_MAX_STRE
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ACP_AUDIO2_TX_LINEARPOSITIONCNTR_LOW, ACP_AUDIO2_TX_LINEARPOSITIONCNTR_HIGH},
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{ACP_AUDIO0_RX_DMA_SIZE, ACP_AUDIO0_RX_FIFOADDR, ACP_AUDIO0_RX_FIFOSIZE,
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ACP_AUDIO0_RX_RINGBUFSIZE, ACP_AUDIO0_RX_RINGBUFADDR, ACP_AUDIO0_RX_INTR_WATERMARK_SIZE,
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ACP_AUDIO0_TX_LINEARPOSITIONCNTR_LOW, ACP_AUDIO0_TX_LINEARPOSITIONCNTR_HIGH},
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ACP_AUDIO0_RX_LINEARPOSITIONCNTR_LOW, ACP_AUDIO0_RX_LINEARPOSITIONCNTR_HIGH},
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{ACP_AUDIO1_RX_DMA_SIZE, ACP_AUDIO1_RX_FIFOADDR, ACP_AUDIO1_RX_FIFOSIZE,
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ACP_AUDIO1_RX_RINGBUFSIZE, ACP_AUDIO1_RX_RINGBUFADDR, ACP_AUDIO1_RX_INTR_WATERMARK_SIZE,
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ACP_AUDIO1_RX_LINEARPOSITIONCNTR_LOW, ACP_AUDIO1_RX_LINEARPOSITIONCNTR_HIGH},
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@ -39,6 +39,11 @@ static struct sdw_dma_ring_buf_reg sdw0_dma_ring_buf_reg[ACP63_SDW0_DMA_MAX_STRE
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ACP_AUDIO2_RX_LINEARPOSITIONCNTR_LOW, ACP_AUDIO2_RX_LINEARPOSITIONCNTR_HIGH}
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};
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/*
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* SDW1 instance supports one TX stream and one RX stream.
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* For TX/RX streams DMA registers programming for SDW1 instance, it uses ACP_P1_AUDIO1 register
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* set as per hardware register documentation
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*/
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static struct sdw_dma_ring_buf_reg sdw1_dma_ring_buf_reg[ACP63_SDW1_DMA_MAX_STREAMS] = {
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{ACP_P1_AUDIO1_TX_DMA_SIZE, ACP_P1_AUDIO1_TX_FIFOADDR, ACP_P1_AUDIO1_TX_FIFOSIZE,
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ACP_P1_AUDIO1_TX_RINGBUFSIZE, ACP_P1_AUDIO1_TX_RINGBUFADDR,
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@ -59,6 +64,12 @@ static u32 sdw0_dma_enable_reg[ACP63_SDW0_DMA_MAX_STREAMS] = {
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ACP_SW0_AUDIO2_RX_EN,
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};
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/*
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* SDW1 instance supports one TX stream and one RX stream.
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* For TX/RX streams DMA enable register programming for SDW1 instance,
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* it uses ACP_SW1_AUDIO1_TX_EN and ACP_SW1_AUDIO1_RX_EN registers
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* as per hardware register documentation.
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*/
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static u32 sdw1_dma_enable_reg[ACP63_SDW1_DMA_MAX_STREAMS] = {
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ACP_SW1_AUDIO1_TX_EN,
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ACP_SW1_AUDIO1_RX_EN,
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@ -307,12 +318,13 @@ static u64 acp63_sdw_get_byte_count(struct acp_sdw_dma_stream *stream, void __io
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pos_high_reg = sdw1_dma_ring_buf_reg[stream->stream_id].pos_high_reg;
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break;
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default:
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return -EINVAL;
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goto POINTER_RETURN_BYTES;
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}
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if (pos_low_reg) {
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byte_count.bcount.high = readl(acp_base + pos_high_reg);
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byte_count.bcount.low = readl(acp_base + pos_low_reg);
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}
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POINTER_RETURN_BYTES:
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return byte_count.bytescount;
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}
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@ -715,6 +715,7 @@ config SND_SOC_CS35L41_I2C
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config SND_SOC_CS35L45
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tristate
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select REGMAP_IRQ
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config SND_SOC_CS35L45_SPI
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tristate "Cirrus Logic CS35L45 CODEC (SPI)"
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@ -1942,6 +1943,7 @@ config SND_SOC_WCD934X
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tristate "WCD9340/WCD9341 Codec"
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depends on COMMON_CLK
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depends on SLIMBUS
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select REGMAP_IRQ
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select REGMAP_SLIMBUS
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select SND_SOC_WCD_MBHC
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depends on MFD_WCD934X || COMPILE_TEST
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@ -53,7 +53,6 @@ static const struct reg_sequence init_list[] = {
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{RT5640_PR_BASE + 0x3d, 0x3600},
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{RT5640_PR_BASE + 0x12, 0x0aa8},
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{RT5640_PR_BASE + 0x14, 0x0aaa},
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{RT5640_PR_BASE + 0x20, 0x6110},
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{RT5640_PR_BASE + 0x21, 0xe0e0},
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{RT5640_PR_BASE + 0x23, 0x1804},
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};
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@ -2567,9 +2566,10 @@ static void rt5640_enable_jack_detect(struct snd_soc_component *component,
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if (jack_data && jack_data->use_platform_clock)
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rt5640->use_platform_clock = jack_data->use_platform_clock;
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ret = request_irq(rt5640->irq, rt5640_irq,
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IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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"rt5640", rt5640);
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ret = devm_request_threaded_irq(component->dev, rt5640->irq,
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NULL, rt5640_irq,
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IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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"rt5640", rt5640);
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if (ret) {
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dev_warn(component->dev, "Failed to reguest IRQ %d: %d\n", rt5640->irq, ret);
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rt5640_disable_jack_detect(component);
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|
@ -2622,8 +2622,9 @@ static void rt5640_enable_hda_jack_detect(
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|||
|
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rt5640->jack = jack;
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|
||||
ret = request_irq(rt5640->irq, rt5640_irq,
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IRQF_TRIGGER_RISING | IRQF_ONESHOT, "rt5640", rt5640);
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ret = devm_request_threaded_irq(component->dev, rt5640->irq,
|
||||
NULL, rt5640_irq, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
||||
"rt5640", rt5640);
|
||||
if (ret) {
|
||||
dev_warn(component->dev, "Failed to reguest IRQ %d: %d\n", rt5640->irq, ret);
|
||||
rt5640->irq = -ENXIO;
|
||||
|
|
|
@ -3950,7 +3950,11 @@ static int rt5645_i2c_probe(struct i2c_client *i2c)
|
|||
* read and power On.
|
||||
*/
|
||||
msleep(TIME_TO_POWER_MS);
|
||||
regmap_read(regmap, RT5645_VENDOR_ID2, &val);
|
||||
ret = regmap_read(regmap, RT5645_VENDOR_ID2, &val);
|
||||
if (ret < 0) {
|
||||
dev_err(&i2c->dev, "Failed to read: 0x%02X\n, ret = %d", RT5645_VENDOR_ID2, ret);
|
||||
goto err_enable;
|
||||
}
|
||||
|
||||
switch (val) {
|
||||
case RT5645_DEVICE_ID:
|
||||
|
|
|
@ -1454,7 +1454,7 @@ struct wcd_mbhc *wcd_mbhc_init(struct snd_soc_component *component,
|
|||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
mbhc = devm_kzalloc(dev, sizeof(*mbhc), GFP_KERNEL);
|
||||
mbhc = kzalloc(sizeof(*mbhc), GFP_KERNEL);
|
||||
if (!mbhc)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
|
@ -1474,61 +1474,76 @@ struct wcd_mbhc *wcd_mbhc_init(struct snd_soc_component *component,
|
|||
|
||||
INIT_WORK(&mbhc->correct_plug_swch, wcd_correct_swch_plug);
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->mbhc_sw_intr, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->mbhc_sw_intr, NULL,
|
||||
wcd_mbhc_mech_plug_detect_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"mbhc sw intr", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_mbhc;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->mbhc_btn_press_intr, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->mbhc_btn_press_intr, NULL,
|
||||
wcd_mbhc_btn_press_handler,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"Button Press detect", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_sw_intr;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->mbhc_btn_release_intr, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->mbhc_btn_release_intr, NULL,
|
||||
wcd_mbhc_btn_release_handler,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"Button Release detect", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_btn_press_intr;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->mbhc_hs_ins_intr, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->mbhc_hs_ins_intr, NULL,
|
||||
wcd_mbhc_adc_hs_ins_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"Elect Insert", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_btn_release_intr;
|
||||
|
||||
disable_irq_nosync(mbhc->intr_ids->mbhc_hs_ins_intr);
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->mbhc_hs_rem_intr, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->mbhc_hs_rem_intr, NULL,
|
||||
wcd_mbhc_adc_hs_rem_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"Elect Remove", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_hs_ins_intr;
|
||||
|
||||
disable_irq_nosync(mbhc->intr_ids->mbhc_hs_rem_intr);
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->hph_left_ocp, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->hph_left_ocp, NULL,
|
||||
wcd_mbhc_hphl_ocp_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"HPH_L OCP detect", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_hs_rem_intr;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, mbhc->intr_ids->hph_right_ocp, NULL,
|
||||
ret = request_threaded_irq(mbhc->intr_ids->hph_right_ocp, NULL,
|
||||
wcd_mbhc_hphr_ocp_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"HPH_R OCP detect", mbhc);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto err_free_hph_left_ocp;
|
||||
|
||||
return mbhc;
|
||||
err:
|
||||
|
||||
err_free_hph_left_ocp:
|
||||
free_irq(mbhc->intr_ids->hph_left_ocp, mbhc);
|
||||
err_free_hs_rem_intr:
|
||||
free_irq(mbhc->intr_ids->mbhc_hs_rem_intr, mbhc);
|
||||
err_free_hs_ins_intr:
|
||||
free_irq(mbhc->intr_ids->mbhc_hs_ins_intr, mbhc);
|
||||
err_free_btn_release_intr:
|
||||
free_irq(mbhc->intr_ids->mbhc_btn_release_intr, mbhc);
|
||||
err_free_btn_press_intr:
|
||||
free_irq(mbhc->intr_ids->mbhc_btn_press_intr, mbhc);
|
||||
err_free_sw_intr:
|
||||
free_irq(mbhc->intr_ids->mbhc_sw_intr, mbhc);
|
||||
err_free_mbhc:
|
||||
kfree(mbhc);
|
||||
|
||||
dev_err(dev, "Failed to request mbhc interrupts %d\n", ret);
|
||||
|
||||
return ERR_PTR(ret);
|
||||
|
@ -1537,9 +1552,19 @@ EXPORT_SYMBOL(wcd_mbhc_init);
|
|||
|
||||
void wcd_mbhc_deinit(struct wcd_mbhc *mbhc)
|
||||
{
|
||||
free_irq(mbhc->intr_ids->hph_right_ocp, mbhc);
|
||||
free_irq(mbhc->intr_ids->hph_left_ocp, mbhc);
|
||||
free_irq(mbhc->intr_ids->mbhc_hs_rem_intr, mbhc);
|
||||
free_irq(mbhc->intr_ids->mbhc_hs_ins_intr, mbhc);
|
||||
free_irq(mbhc->intr_ids->mbhc_btn_release_intr, mbhc);
|
||||
free_irq(mbhc->intr_ids->mbhc_btn_press_intr, mbhc);
|
||||
free_irq(mbhc->intr_ids->mbhc_sw_intr, mbhc);
|
||||
|
||||
mutex_lock(&mbhc->lock);
|
||||
wcd_cancel_hs_detect_plug(mbhc, &mbhc->correct_plug_swch);
|
||||
mutex_unlock(&mbhc->lock);
|
||||
|
||||
kfree(mbhc);
|
||||
}
|
||||
EXPORT_SYMBOL(wcd_mbhc_deinit);
|
||||
|
||||
|
|
|
@ -2642,7 +2642,7 @@ static int wcd934x_mbhc_micb_ctrl_threshold_mic(struct snd_soc_component *compon
|
|||
return rc;
|
||||
}
|
||||
|
||||
static inline void wcd934x_mbhc_get_result_params(struct wcd934x_codec *wcd934x,
|
||||
static void wcd934x_mbhc_get_result_params(struct wcd934x_codec *wcd934x,
|
||||
s16 *d1_a, u16 noff,
|
||||
int32_t *zdet)
|
||||
{
|
||||
|
@ -2683,7 +2683,7 @@ static inline void wcd934x_mbhc_get_result_params(struct wcd934x_codec *wcd934x,
|
|||
else if (x1 < minCode_param[noff])
|
||||
*zdet = WCD934X_ZDET_FLOATING_IMPEDANCE;
|
||||
|
||||
dev_info(wcd934x->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n",
|
||||
dev_dbg(wcd934x->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%di (milliohm)\n",
|
||||
__func__, d1, c1, x1, *zdet);
|
||||
ramp_down:
|
||||
i = 0;
|
||||
|
@ -2740,8 +2740,8 @@ z_right:
|
|||
*zr = zdet;
|
||||
}
|
||||
|
||||
static inline void wcd934x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component,
|
||||
int32_t *z_val, int flag_l_r)
|
||||
static void wcd934x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component,
|
||||
int32_t *z_val, int flag_l_r)
|
||||
{
|
||||
s16 q1;
|
||||
int q1_cal;
|
||||
|
@ -3044,6 +3044,17 @@ static int wcd934x_mbhc_init(struct snd_soc_component *component)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void wcd934x_mbhc_deinit(struct snd_soc_component *component)
|
||||
{
|
||||
struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component);
|
||||
|
||||
if (!wcd->mbhc)
|
||||
return;
|
||||
|
||||
wcd_mbhc_deinit(wcd->mbhc);
|
||||
}
|
||||
|
||||
static int wcd934x_comp_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
|
||||
|
@ -3077,6 +3088,7 @@ static void wcd934x_comp_remove(struct snd_soc_component *comp)
|
|||
{
|
||||
struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
|
||||
|
||||
wcd934x_mbhc_deinit(comp);
|
||||
wcd_clsh_ctrl_free(wcd->clsh_ctrl);
|
||||
}
|
||||
|
||||
|
|
|
@ -210,7 +210,7 @@ struct wcd938x_priv {
|
|||
};
|
||||
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(line_gain, 600, -3000);
|
||||
static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, -3000);
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(analog_gain, 0, 3000);
|
||||
|
||||
struct wcd938x_mbhc_zdet_param {
|
||||
|
@ -2124,10 +2124,11 @@ static int wcd938x_mbhc_micb_ctrl_threshold_mic(struct snd_soc_component *compon
|
|||
return wcd938x_mbhc_micb_adjust_voltage(component, micb_mv, MIC_BIAS_2);
|
||||
}
|
||||
|
||||
static inline void wcd938x_mbhc_get_result_params(struct wcd938x_priv *wcd938x,
|
||||
static void wcd938x_mbhc_get_result_params(struct snd_soc_component *component,
|
||||
s16 *d1_a, u16 noff,
|
||||
int32_t *zdet)
|
||||
{
|
||||
struct wcd938x_priv *wcd938x = snd_soc_component_get_drvdata(component);
|
||||
int i;
|
||||
int val, val1;
|
||||
s16 c1;
|
||||
|
@ -2154,8 +2155,8 @@ static inline void wcd938x_mbhc_get_result_params(struct wcd938x_priv *wcd938x,
|
|||
usleep_range(5000, 5050);
|
||||
|
||||
if (!c1 || !x1) {
|
||||
pr_err("%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
|
||||
__func__, c1, x1);
|
||||
dev_err(component->dev, "Impedance detect ramp error, c1=%d, x1=0x%x\n",
|
||||
c1, x1);
|
||||
goto ramp_down;
|
||||
}
|
||||
d1 = d1_a[c1];
|
||||
|
@ -2165,7 +2166,7 @@ static inline void wcd938x_mbhc_get_result_params(struct wcd938x_priv *wcd938x,
|
|||
else if (x1 < minCode_param[noff])
|
||||
*zdet = WCD938X_ZDET_FLOATING_IMPEDANCE;
|
||||
|
||||
pr_err("%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n",
|
||||
dev_dbg(component->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d (milliohm)\n",
|
||||
__func__, d1, c1, x1, *zdet);
|
||||
ramp_down:
|
||||
i = 0;
|
||||
|
@ -2210,7 +2211,7 @@ static void wcd938x_mbhc_zdet_ramp(struct snd_soc_component *component,
|
|||
WCD938X_ANA_MBHC_ZDET, 0x80, 0x80);
|
||||
dev_dbg(component->dev, "%s: ramp for HPH_L, noff = %d\n",
|
||||
__func__, zdet_param->noff);
|
||||
wcd938x_mbhc_get_result_params(wcd938x, d1_a, zdet_param->noff, &zdet);
|
||||
wcd938x_mbhc_get_result_params(component, d1_a, zdet_param->noff, &zdet);
|
||||
regmap_update_bits(wcd938x->regmap,
|
||||
WCD938X_ANA_MBHC_ZDET, 0x80, 0x00);
|
||||
|
||||
|
@ -2224,15 +2225,15 @@ z_right:
|
|||
WCD938X_ANA_MBHC_ZDET, 0x40, 0x40);
|
||||
dev_dbg(component->dev, "%s: ramp for HPH_R, noff = %d\n",
|
||||
__func__, zdet_param->noff);
|
||||
wcd938x_mbhc_get_result_params(wcd938x, d1_a, zdet_param->noff, &zdet);
|
||||
wcd938x_mbhc_get_result_params(component, d1_a, zdet_param->noff, &zdet);
|
||||
regmap_update_bits(wcd938x->regmap,
|
||||
WCD938X_ANA_MBHC_ZDET, 0x40, 0x00);
|
||||
|
||||
*zr = zdet;
|
||||
}
|
||||
|
||||
static inline void wcd938x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component,
|
||||
int32_t *z_val, int flag_l_r)
|
||||
static void wcd938x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component,
|
||||
int32_t *z_val, int flag_l_r)
|
||||
{
|
||||
s16 q1;
|
||||
int q1_cal;
|
||||
|
@ -2625,6 +2626,8 @@ static int wcd938x_mbhc_init(struct snd_soc_component *component)
|
|||
WCD938X_IRQ_HPHR_OCP_INT);
|
||||
|
||||
wcd938x->wcd_mbhc = wcd_mbhc_init(component, &mbhc_cb, intr_ids, wcd_mbhc_fields, true);
|
||||
if (IS_ERR(wcd938x->wcd_mbhc))
|
||||
return PTR_ERR(wcd938x->wcd_mbhc);
|
||||
|
||||
snd_soc_add_component_controls(component, impedance_detect_controls,
|
||||
ARRAY_SIZE(impedance_detect_controls));
|
||||
|
@ -2633,6 +2636,14 @@ static int wcd938x_mbhc_init(struct snd_soc_component *component)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void wcd938x_mbhc_deinit(struct snd_soc_component *component)
|
||||
{
|
||||
struct wcd938x_priv *wcd938x = snd_soc_component_get_drvdata(component);
|
||||
|
||||
wcd_mbhc_deinit(wcd938x->wcd_mbhc);
|
||||
}
|
||||
|
||||
/* END MBHC */
|
||||
|
||||
static const struct snd_kcontrol_new wcd938x_snd_controls[] = {
|
||||
|
@ -2652,8 +2663,8 @@ static const struct snd_kcontrol_new wcd938x_snd_controls[] = {
|
|||
wcd938x_get_swr_port, wcd938x_set_swr_port),
|
||||
SOC_SINGLE_EXT("DSD_R Switch", WCD938X_DSD_R, 0, 1, 0,
|
||||
wcd938x_get_swr_port, wcd938x_set_swr_port),
|
||||
SOC_SINGLE_TLV("HPHL Volume", WCD938X_HPH_L_EN, 0, 0x18, 0, line_gain),
|
||||
SOC_SINGLE_TLV("HPHR Volume", WCD938X_HPH_R_EN, 0, 0x18, 0, line_gain),
|
||||
SOC_SINGLE_TLV("HPHL Volume", WCD938X_HPH_L_EN, 0, 0x18, 1, line_gain),
|
||||
SOC_SINGLE_TLV("HPHR Volume", WCD938X_HPH_R_EN, 0, 0x18, 1, line_gain),
|
||||
WCD938X_EAR_PA_GAIN_TLV("EAR_PA Volume", WCD938X_ANA_EAR_COMPANDER_CTL,
|
||||
2, 0x10, 0, ear_pa_gain),
|
||||
SOC_SINGLE_EXT("ADC1 Switch", WCD938X_ADC1, 1, 1, 0,
|
||||
|
@ -3080,16 +3091,33 @@ static int wcd938x_irq_init(struct wcd938x_priv *wcd, struct device *dev)
|
|||
static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wcd938x_priv *wcd938x = snd_soc_component_get_drvdata(component);
|
||||
struct sdw_slave *tx_sdw_dev = wcd938x->tx_sdw_dev;
|
||||
struct device *dev = component->dev;
|
||||
unsigned long time_left;
|
||||
int ret, i;
|
||||
|
||||
time_left = wait_for_completion_timeout(&tx_sdw_dev->initialization_complete,
|
||||
msecs_to_jiffies(2000));
|
||||
if (!time_left) {
|
||||
dev_err(dev, "soundwire device init timeout\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
snd_soc_component_init_regmap(component, wcd938x->regmap);
|
||||
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
wcd938x->variant = snd_soc_component_read_field(component,
|
||||
WCD938X_DIGITAL_EFUSE_REG_0,
|
||||
WCD938X_ID_MASK);
|
||||
|
||||
wcd938x->clsh_info = wcd_clsh_ctrl_alloc(component, WCD938X);
|
||||
if (IS_ERR(wcd938x->clsh_info)) {
|
||||
pm_runtime_put(dev);
|
||||
return PTR_ERR(wcd938x->clsh_info);
|
||||
}
|
||||
|
||||
wcd938x_io_init(wcd938x);
|
||||
/* Set all interrupts as edge triggered */
|
||||
|
@ -3098,6 +3126,8 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
|||
(WCD938X_DIGITAL_INTR_LEVEL_0 + i), 0);
|
||||
}
|
||||
|
||||
pm_runtime_put(dev);
|
||||
|
||||
wcd938x->hphr_pdm_wd_int = regmap_irq_get_virq(wcd938x->irq_chip,
|
||||
WCD938X_IRQ_HPHR_PDM_WD_INT);
|
||||
wcd938x->hphl_pdm_wd_int = regmap_irq_get_virq(wcd938x->irq_chip,
|
||||
|
@ -3109,20 +3139,26 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
|||
ret = request_threaded_irq(wcd938x->hphr_pdm_wd_int, NULL, wcd938x_wd_handle_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"HPHR PDM WD INT", wcd938x);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to request HPHR WD interrupt (%d)\n", ret);
|
||||
goto err_free_clsh_ctrl;
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(wcd938x->hphl_pdm_wd_int, NULL, wcd938x_wd_handle_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"HPHL PDM WD INT", wcd938x);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to request HPHL WD interrupt (%d)\n", ret);
|
||||
goto err_free_hphr_pdm_wd_int;
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(wcd938x->aux_pdm_wd_int, NULL, wcd938x_wd_handle_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_RISING,
|
||||
"AUX PDM WD INT", wcd938x);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to request Aux WD interrupt (%d)\n", ret);
|
||||
goto err_free_hphl_pdm_wd_int;
|
||||
}
|
||||
|
||||
/* Disable watchdog interrupt for HPH and AUX */
|
||||
disable_irq_nosync(wcd938x->hphr_pdm_wd_int);
|
||||
|
@ -3137,7 +3173,7 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
|||
dev_err(component->dev,
|
||||
"%s: Failed to add snd ctrls for variant: %d\n",
|
||||
__func__, wcd938x->variant);
|
||||
goto err;
|
||||
goto err_free_aux_pdm_wd_int;
|
||||
}
|
||||
break;
|
||||
case WCD9385:
|
||||
|
@ -3147,7 +3183,7 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
|||
dev_err(component->dev,
|
||||
"%s: Failed to add snd ctrls for variant: %d\n",
|
||||
__func__, wcd938x->variant);
|
||||
goto err;
|
||||
goto err_free_aux_pdm_wd_int;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
|
@ -3155,12 +3191,38 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
|
|||
}
|
||||
|
||||
ret = wcd938x_mbhc_init(component);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(component->dev, "mbhc initialization failed\n");
|
||||
err:
|
||||
goto err_free_aux_pdm_wd_int;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_free_aux_pdm_wd_int:
|
||||
free_irq(wcd938x->aux_pdm_wd_int, wcd938x);
|
||||
err_free_hphl_pdm_wd_int:
|
||||
free_irq(wcd938x->hphl_pdm_wd_int, wcd938x);
|
||||
err_free_hphr_pdm_wd_int:
|
||||
free_irq(wcd938x->hphr_pdm_wd_int, wcd938x);
|
||||
err_free_clsh_ctrl:
|
||||
wcd_clsh_ctrl_free(wcd938x->clsh_info);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void wcd938x_soc_codec_remove(struct snd_soc_component *component)
|
||||
{
|
||||
struct wcd938x_priv *wcd938x = snd_soc_component_get_drvdata(component);
|
||||
|
||||
wcd938x_mbhc_deinit(component);
|
||||
|
||||
free_irq(wcd938x->aux_pdm_wd_int, wcd938x);
|
||||
free_irq(wcd938x->hphl_pdm_wd_int, wcd938x);
|
||||
free_irq(wcd938x->hphr_pdm_wd_int, wcd938x);
|
||||
|
||||
wcd_clsh_ctrl_free(wcd938x->clsh_info);
|
||||
}
|
||||
|
||||
static int wcd938x_codec_set_jack(struct snd_soc_component *comp,
|
||||
struct snd_soc_jack *jack, void *data)
|
||||
{
|
||||
|
@ -3177,6 +3239,7 @@ static int wcd938x_codec_set_jack(struct snd_soc_component *comp,
|
|||
static const struct snd_soc_component_driver soc_codec_dev_wcd938x = {
|
||||
.name = "wcd938x_codec",
|
||||
.probe = wcd938x_soc_codec_probe,
|
||||
.remove = wcd938x_soc_codec_remove,
|
||||
.controls = wcd938x_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wcd938x_snd_controls),
|
||||
.dapm_widgets = wcd938x_dapm_widgets,
|
||||
|
|
|
@ -507,12 +507,6 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
|
|||
savediv / 2 - 1);
|
||||
}
|
||||
|
||||
if (sai->soc_data->max_register >= FSL_SAI_MCTL) {
|
||||
/* SAI is in master mode at this point, so enable MCLK */
|
||||
regmap_update_bits(sai->regmap, FSL_SAI_MCTL,
|
||||
FSL_SAI_MCTL_MCLK_EN, FSL_SAI_MCTL_MCLK_EN);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -476,7 +476,7 @@ static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
|
|||
|
||||
static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
|
||||
{"HDMI Playback", NULL, "HDMI_RX"},
|
||||
{"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
|
||||
{"DISPLAY_PORT_RX_0 Playback", NULL, "DISPLAY_PORT_RX"},
|
||||
{"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
|
||||
{"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
|
||||
{"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
|
||||
|
|
|
@ -840,6 +840,7 @@ static const struct snd_soc_component_driver q6apm_fe_dai_component = {
|
|||
.pointer = q6apm_dai_pointer,
|
||||
.trigger = q6apm_dai_trigger,
|
||||
.compress_ops = &q6apm_dai_compress_ops,
|
||||
.use_dai_pcm_id = true,
|
||||
};
|
||||
|
||||
static int q6apm_dai_probe(struct platform_device *pdev)
|
||||
|
|
|
@ -511,6 +511,8 @@ static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
|
|||
|
||||
switch (hdr->opcode) {
|
||||
case DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2:
|
||||
if (!graph->ar_graph)
|
||||
break;
|
||||
client_event = APM_CLIENT_EVENT_DATA_WRITE_DONE;
|
||||
mutex_lock(&graph->lock);
|
||||
token = hdr->token & APM_WRITE_TOKEN_MASK;
|
||||
|
@ -544,6 +546,8 @@ static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op)
|
|||
wake_up(&graph->cmd_wait);
|
||||
break;
|
||||
case DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2:
|
||||
if (!graph->ar_graph)
|
||||
break;
|
||||
client_event = APM_CLIENT_EVENT_DATA_READ_DONE;
|
||||
mutex_lock(&graph->lock);
|
||||
rd_done = data->payload;
|
||||
|
@ -649,8 +653,9 @@ int q6apm_graph_close(struct q6apm_graph *graph)
|
|||
{
|
||||
struct audioreach_graph *ar_graph = graph->ar_graph;
|
||||
|
||||
gpr_free_port(graph->port);
|
||||
graph->ar_graph = NULL;
|
||||
kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph);
|
||||
gpr_free_port(graph->port);
|
||||
kfree(graph);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1277,8 +1277,8 @@ int audioreach_tplg_init(struct snd_soc_component *component)
|
|||
|
||||
ret = snd_soc_tplg_component_load(component, &audioreach_tplg_ops, fw);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "tplg component load failed%d\n", ret);
|
||||
ret = -EINVAL;
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "tplg component load failed: %d\n", ret);
|
||||
}
|
||||
|
||||
release_firmware(fw);
|
||||
|
|
|
@ -1988,8 +1988,10 @@ static int snd_soc_bind_card(struct snd_soc_card *card)
|
|||
/* probe all components used by DAI links on this card */
|
||||
ret = soc_probe_link_components(card);
|
||||
if (ret < 0) {
|
||||
dev_err(card->dev,
|
||||
"ASoC: failed to instantiate card %d\n", ret);
|
||||
if (ret != -EPROBE_DEFER) {
|
||||
dev_err(card->dev,
|
||||
"ASoC: failed to instantiate card %d\n", ret);
|
||||
}
|
||||
goto probe_end;
|
||||
}
|
||||
|
||||
|
|
|
@ -1732,7 +1732,8 @@ static int soc_tplg_fe_link_create(struct soc_tplg *tplg,
|
|||
|
||||
ret = snd_soc_add_pcm_runtimes(tplg->comp->card, link, 1);
|
||||
if (ret < 0) {
|
||||
dev_err(tplg->dev, "ASoC: adding FE link failed\n");
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(tplg->dev, "ASoC: adding FE link failed\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
@ -2492,8 +2493,11 @@ static int soc_tplg_process_headers(struct soc_tplg *tplg)
|
|||
/* load the header object */
|
||||
ret = soc_tplg_load_header(tplg, hdr);
|
||||
if (ret < 0) {
|
||||
dev_err(tplg->dev,
|
||||
"ASoC: topology: could not load header: %d\n", ret);
|
||||
if (ret != -EPROBE_DEFER) {
|
||||
dev_err(tplg->dev,
|
||||
"ASoC: topology: could not load header: %d\n",
|
||||
ret);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -217,6 +217,7 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr,
|
|||
unsigned int image_length)
|
||||
{
|
||||
struct snd_sof_dev *sdev = adata->dev;
|
||||
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);
|
||||
unsigned int tx_count, fw_qualifier, val;
|
||||
int ret;
|
||||
|
||||
|
@ -251,9 +252,12 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr,
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_SHA_DMA_COMMAND);
|
||||
if (ret)
|
||||
return ret;
|
||||
/* psp_send_cmd only required for renoir platform (rev - 3) */
|
||||
if (desc->rev == 3) {
|
||||
ret = psp_send_cmd(adata, MBOX_ACP_SHA_DMA_COMMAND);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER,
|
||||
fw_qualifier, fw_qualifier & DSP_FW_RUN_ENABLE,
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
//
|
||||
// tegra210_adx.c - Tegra210 ADX driver
|
||||
//
|
||||
// Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved.
|
||||
// Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/device.h>
|
||||
|
@ -175,10 +175,20 @@ static int tegra210_adx_get_byte_map(struct snd_kcontrol *kcontrol,
|
|||
mc = (struct soc_mixer_control *)kcontrol->private_value;
|
||||
enabled = adx->byte_mask[mc->reg / 32] & (1 << (mc->reg % 32));
|
||||
|
||||
/*
|
||||
* TODO: Simplify this logic to just return from bytes_map[]
|
||||
*
|
||||
* Presently below is required since bytes_map[] is
|
||||
* tightly packed and cannot store the control value of 256.
|
||||
* Byte mask state is used to know if 256 needs to be returned.
|
||||
* Note that for control value of 256, the put() call stores 0
|
||||
* in the bytes_map[] and disables the corresponding bit in
|
||||
* byte_mask[].
|
||||
*/
|
||||
if (enabled)
|
||||
ucontrol->value.integer.value[0] = bytes_map[mc->reg];
|
||||
else
|
||||
ucontrol->value.integer.value[0] = 0;
|
||||
ucontrol->value.integer.value[0] = 256;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -192,19 +202,19 @@ static int tegra210_adx_put_byte_map(struct snd_kcontrol *kcontrol,
|
|||
int value = ucontrol->value.integer.value[0];
|
||||
struct soc_mixer_control *mc =
|
||||
(struct soc_mixer_control *)kcontrol->private_value;
|
||||
unsigned int mask_val = adx->byte_mask[mc->reg / 32];
|
||||
|
||||
if (value == bytes_map[mc->reg])
|
||||
if (value >= 0 && value <= 255)
|
||||
mask_val |= (1 << (mc->reg % 32));
|
||||
else
|
||||
mask_val &= ~(1 << (mc->reg % 32));
|
||||
|
||||
if (mask_val == adx->byte_mask[mc->reg / 32])
|
||||
return 0;
|
||||
|
||||
if (value >= 0 && value <= 255) {
|
||||
/* update byte map and enable slot */
|
||||
bytes_map[mc->reg] = value;
|
||||
adx->byte_mask[mc->reg / 32] |= (1 << (mc->reg % 32));
|
||||
} else {
|
||||
/* reset byte map and disable slot */
|
||||
bytes_map[mc->reg] = 0;
|
||||
adx->byte_mask[mc->reg / 32] &= ~(1 << (mc->reg % 32));
|
||||
}
|
||||
/* Update byte map and slot */
|
||||
bytes_map[mc->reg] = value % 256;
|
||||
adx->byte_mask[mc->reg / 32] = mask_val;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
//
|
||||
// tegra210_amx.c - Tegra210 AMX driver
|
||||
//
|
||||
// Copyright (c) 2021 NVIDIA CORPORATION. All rights reserved.
|
||||
// Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/device.h>
|
||||
|
@ -203,10 +203,20 @@ static int tegra210_amx_get_byte_map(struct snd_kcontrol *kcontrol,
|
|||
else
|
||||
enabled = amx->byte_mask[0] & (1 << reg);
|
||||
|
||||
/*
|
||||
* TODO: Simplify this logic to just return from bytes_map[]
|
||||
*
|
||||
* Presently below is required since bytes_map[] is
|
||||
* tightly packed and cannot store the control value of 256.
|
||||
* Byte mask state is used to know if 256 needs to be returned.
|
||||
* Note that for control value of 256, the put() call stores 0
|
||||
* in the bytes_map[] and disables the corresponding bit in
|
||||
* byte_mask[].
|
||||
*/
|
||||
if (enabled)
|
||||
ucontrol->value.integer.value[0] = bytes_map[reg];
|
||||
else
|
||||
ucontrol->value.integer.value[0] = 0;
|
||||
ucontrol->value.integer.value[0] = 256;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -221,25 +231,19 @@ static int tegra210_amx_put_byte_map(struct snd_kcontrol *kcontrol,
|
|||
unsigned char *bytes_map = (unsigned char *)&amx->map;
|
||||
int reg = mc->reg;
|
||||
int value = ucontrol->value.integer.value[0];
|
||||
unsigned int mask_val = amx->byte_mask[reg / 32];
|
||||
|
||||
if (value == bytes_map[reg])
|
||||
if (value >= 0 && value <= 255)
|
||||
mask_val |= (1 << (reg % 32));
|
||||
else
|
||||
mask_val &= ~(1 << (reg % 32));
|
||||
|
||||
if (mask_val == amx->byte_mask[reg / 32])
|
||||
return 0;
|
||||
|
||||
if (value >= 0 && value <= 255) {
|
||||
/* Update byte map and enable slot */
|
||||
bytes_map[reg] = value;
|
||||
if (reg > 31)
|
||||
amx->byte_mask[1] |= (1 << (reg - 32));
|
||||
else
|
||||
amx->byte_mask[0] |= (1 << reg);
|
||||
} else {
|
||||
/* Reset byte map and disable slot */
|
||||
bytes_map[reg] = 0;
|
||||
if (reg > 31)
|
||||
amx->byte_mask[1] &= ~(1 << (reg - 32));
|
||||
else
|
||||
amx->byte_mask[0] &= ~(1 << reg);
|
||||
}
|
||||
/* Update byte map and slot */
|
||||
bytes_map[reg] = value % 256;
|
||||
amx->byte_mask[reg / 32] = mask_val;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
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