regmap: Updates for v3.7
A quiet release for the regmap core, essentially all the activity is in the shared interrupt controller which is being more and more widely used and has been enhanced to support a wider range of masking types and wake handling methods, plus integration with runtime PM for devices making aggressive use of that. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQXeGvAAoJEOoSHmUN5Tg4kT8P/A9vmvBUdqGDrjpZh54c5r4u lhefKwhvJLKvrakZyrlc1vcRs21Zf8w92bRQNVkkBuWaCSCcfwUgMTDvzm8un7sa KJLohCFMAnaao8StmM14T/p8qoMlsrCD1BfngWRke5jhdj+i9SAgrOep+3vmACRt A44G53Sj2ff0LCcJXLSrsHhexTERqg2/We2haDlVDsmwRXOmfpxPGfM7TO/0mBox 4XeogIIPsfg9PizR3kuAawSA4tIOu0NaKOYnj/o9HohJwIBEZ5ua1WQg+zXj72F/ 3TbDiYqhB4qkDPErp3MRd9JDp2Au88763LmR4VByFoHnjUu7OV/eITFGE7U0DIbg gCcmdIBKJN4r06x2wX/dIF202sCiQTvenYFowmHcaL/imXGesPFH3zZjDNVVwDbb I7JgzFxyTuSxY2ZfMGL0UHQflucaTGNbdvm6bWrx1l+ZmUg01q4ugi2cSJ/wkzUu Gi5UdmhFw9y2hhYgkxR35Ke6sBsiMFBh92K35x5Vp+R0nVINGOJeMBxNRdst2s1i 4PI5nWkS0tNDkRI5LXl1mRbO+aGyCyHK22qsRfEFifHTXvbyFmSy64xXPh6AWkk/ fWuJjgXa3U5aV0LL/VGJCtcrjLRQnKZDwYsIfC49h0yFNvNTy+AYUvouc8TtTUUj p9j1bFbR79h7HeUeLLns =l7V7 -----END PGP SIGNATURE----- Merge tag 'regmap-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "A quiet release for the regmap core, essentially all the activity is in the shared interrupt controller which is being more and more widely used and has been enhanced to support a wider range of masking types and wake handling methods, plus integration with runtime PM for devices making aggressive use of that." * tag 'regmap-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: regmap: no need primary handler for nested irq regmap: irq: Add mask invert flag for enable register mfd: wm8994: Flag the interrupt block as requiring runtime PM be enabled regmap: irq: Enable devices for runtime PM while handling interrupts regmap: irq: initialize all irqs to wake disabled regmap: set MASK_ON_SUSPEND/SKIP_SET_WAKE if no wake_base regmap: name irq_chip based on regmap_irq_chip's name regmap: store irq_chip inside regmap_irq_chip_data regmap: irq: Only update mask bits when doing initial mask regmap: fix some error messages to take account of irq_reg_stride regmap: Don't lock in regmap_reinit_cache()
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Коммит
b34e5f55a1
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@ -16,12 +16,14 @@
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include "internal.h"
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struct regmap_irq_chip_data {
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struct mutex lock;
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struct irq_chip irq_chip;
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struct regmap *map;
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const struct regmap_irq_chip *chip;
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@ -59,6 +61,14 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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struct regmap *map = d->map;
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int i, ret;
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u32 reg;
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if (d->chip->runtime_pm) {
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ret = pm_runtime_get_sync(map->dev);
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if (ret < 0)
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dev_err(map->dev, "IRQ sync failed to resume: %d\n",
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ret);
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}
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/*
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* If there's been a change in the mask write it back to the
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@ -66,15 +76,22 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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* suppress pointless writes.
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*/
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for (i = 0; i < d->chip->num_regs; i++) {
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ret = regmap_update_bits(d->map, d->chip->mask_base +
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(i * map->reg_stride *
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d->irq_reg_stride),
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reg = d->chip->mask_base +
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->chip->mask_invert)
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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else
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], d->mask_buf[i]);
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if (ret != 0)
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dev_err(d->map->dev, "Failed to sync masks in %x\n",
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d->chip->mask_base + (i * map->reg_stride));
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reg);
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}
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if (d->chip->runtime_pm)
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pm_runtime_put(map->dev);
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/* If we've changed our wakeup count propagate it to the parent */
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if (d->wake_count < 0)
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for (i = d->wake_count; i < 0; i++)
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@ -128,8 +145,7 @@ static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
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return 0;
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}
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static struct irq_chip regmap_irq_chip = {
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.name = "regmap",
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static const struct irq_chip regmap_irq_chip = {
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.irq_bus_lock = regmap_irq_lock,
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.irq_bus_sync_unlock = regmap_irq_sync_unlock,
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.irq_disable = regmap_irq_disable,
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@ -144,6 +160,16 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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struct regmap *map = data->map;
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int ret, i;
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bool handled = false;
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u32 reg;
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if (chip->runtime_pm) {
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ret = pm_runtime_get_sync(map->dev);
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if (ret < 0) {
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dev_err(map->dev, "IRQ thread failed to resume: %d\n",
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ret);
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return IRQ_NONE;
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}
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}
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/*
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* Ignore masked IRQs and ack if we need to; we ack early so
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@ -160,20 +186,20 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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if (ret != 0) {
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dev_err(map->dev, "Failed to read IRQ status: %d\n",
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ret);
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if (chip->runtime_pm)
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pm_runtime_put(map->dev);
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return IRQ_NONE;
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}
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data->status_buf[i] &= ~data->mask_buf[i];
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if (data->status_buf[i] && chip->ack_base) {
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ret = regmap_write(map, chip->ack_base +
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(i * map->reg_stride *
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data->irq_reg_stride),
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data->status_buf[i]);
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reg = chip->ack_base +
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(i * map->reg_stride * data->irq_reg_stride);
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ret = regmap_write(map, reg, data->status_buf[i]);
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if (ret != 0)
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dev_err(map->dev, "Failed to ack 0x%x: %d\n",
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chip->ack_base + (i * map->reg_stride),
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ret);
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reg, ret);
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}
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}
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@ -185,6 +211,9 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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}
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}
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if (chip->runtime_pm)
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pm_runtime_put(map->dev);
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if (handled)
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return IRQ_HANDLED;
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else
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@ -197,7 +226,7 @@ static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
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struct regmap_irq_chip_data *data = h->host_data;
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irq_set_chip_data(virq, data);
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irq_set_chip_and_handler(virq, ®map_irq_chip, handle_edge_irq);
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irq_set_chip(virq, &data->irq_chip);
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irq_set_nested_thread(virq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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@ -238,6 +267,7 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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struct regmap_irq_chip_data *d;
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int i;
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int ret = -ENOMEM;
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u32 reg;
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for (i = 0; i < chip->num_irqs; i++) {
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if (chip->irqs[i].reg_offset % map->reg_stride)
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@ -284,6 +314,13 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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goto err_alloc;
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}
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d->irq_chip = regmap_irq_chip;
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d->irq_chip.name = chip->name;
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if (!chip->wake_base) {
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d->irq_chip.irq_set_wake = NULL;
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d->irq_chip.flags |= IRQCHIP_MASK_ON_SUSPEND |
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IRQCHIP_SKIP_SET_WAKE;
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}
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d->irq = irq;
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d->map = map;
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d->chip = chip;
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@ -303,16 +340,37 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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/* Mask all the interrupts by default */
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for (i = 0; i < chip->num_regs; i++) {
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d->mask_buf[i] = d->mask_buf_def[i];
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ret = regmap_write(map, chip->mask_base + (i * map->reg_stride
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* d->irq_reg_stride),
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d->mask_buf[i]);
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reg = chip->mask_base +
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(i * map->reg_stride * d->irq_reg_stride);
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if (chip->mask_invert)
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ret = regmap_update_bits(map, reg,
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d->mask_buf[i], ~d->mask_buf[i]);
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else
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ret = regmap_update_bits(map, reg,
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d->mask_buf[i], d->mask_buf[i]);
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if (ret != 0) {
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dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
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chip->mask_base + (i * map->reg_stride), ret);
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reg, ret);
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goto err_alloc;
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}
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}
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/* Wake is disabled by default */
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if (d->wake_buf) {
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for (i = 0; i < chip->num_regs; i++) {
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d->wake_buf[i] = d->mask_buf_def[i];
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reg = chip->wake_base +
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(i * map->reg_stride * d->irq_reg_stride);
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ret = regmap_update_bits(map, reg, d->wake_buf[i],
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d->wake_buf[i]);
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if (ret != 0) {
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dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
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reg, ret);
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goto err_alloc;
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}
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}
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}
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if (irq_base)
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d->domain = irq_domain_add_legacy(map->dev->of_node,
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chip->num_irqs, irq_base, 0,
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@ -659,13 +659,12 @@ EXPORT_SYMBOL_GPL(devm_regmap_init);
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* new cache. This can be used to restore the cache to defaults or to
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* update the cache configuration to reflect runtime discovery of the
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* hardware.
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*
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* No explicit locking is done here, the user needs to ensure that
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* this function will not race with other calls to regmap.
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*/
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int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
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{
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int ret;
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map->lock(map);
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regcache_exit(map);
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regmap_debugfs_exit(map);
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@ -681,11 +680,7 @@ int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
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map->cache_bypass = false;
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map->cache_only = false;
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ret = regcache_init(map, config);
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map->unlock(map);
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return ret;
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return regcache_init(map, config);
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}
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EXPORT_SYMBOL_GPL(regmap_reinit_cache);
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@ -135,6 +135,7 @@ static struct regmap_irq_chip wm8994_irq_chip = {
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.status_base = WM8994_INTERRUPT_STATUS_1,
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.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
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.ack_base = WM8994_INTERRUPT_STATUS_1,
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.runtime_pm = true,
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};
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int wm8994_irq_init(struct wm8994 *wm8994)
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@ -285,6 +285,7 @@ struct regmap_irq {
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* @wake_base: Base address for wake enables. If zero unsupported.
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* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
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* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
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*
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* @num_regs: Number of registers in each control bank.
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* @irqs: Descriptors for individual IRQs. Interrupt numbers are
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@ -299,6 +300,8 @@ struct regmap_irq_chip {
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unsigned int ack_base;
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unsigned int wake_base;
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unsigned int irq_reg_stride;
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unsigned int mask_invert;
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bool runtime_pm;
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int num_regs;
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