x86/apic: Remove init_bsp_APIC()
init_bsp_APIC() which works for the virtual wire mode is used in ISA irq initialization at boot time. With the new APIC interrupt delivery mode scheme, which initializes the APIC before the first interrupt is expected, init_bsp_APIC() is not longer required and can be removed. Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: yinghai@kernel.org Cc: bhe@redhat.com Link: https://lkml.kernel.org/r/1505293975-26005-13-git-send-email-douly.fnst@cn.fujitsu.com
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@ -136,7 +136,6 @@ extern void disconnect_bsp_APIC(int virt_wire_setup);
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extern void disable_local_APIC(void);
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extern void disable_local_APIC(void);
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extern void lapic_shutdown(void);
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extern void lapic_shutdown(void);
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extern void sync_Arb_IDs(void);
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extern void sync_Arb_IDs(void);
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extern void init_bsp_APIC(void);
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extern void apic_intr_mode_init(void);
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extern void apic_intr_mode_init(void);
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extern void setup_local_APIC(void);
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extern void setup_local_APIC(void);
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extern void init_apic_mappings(void);
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extern void init_apic_mappings(void);
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@ -1282,55 +1282,6 @@ static int __init apic_intr_mode_select(void)
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return APIC_SYMMETRIC_IO;
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return APIC_SYMMETRIC_IO;
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}
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}
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/*
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* An initial setup of the virtual wire mode.
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*/
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void __init init_bsp_APIC(void)
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{
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unsigned int value;
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/*
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* Don't do the setup now if we have a SMP BIOS as the
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* through-I/O-APIC virtual wire mode might be active.
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*/
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if (smp_found_config || !boot_cpu_has(X86_FEATURE_APIC))
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return;
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/*
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* Do not trust the local APIC being empty at bootup.
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*/
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clear_local_APIC();
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/*
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* Enable APIC.
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*/
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value = apic_read(APIC_SPIV);
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value &= ~APIC_VECTOR_MASK;
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value |= APIC_SPIV_APIC_ENABLED;
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#ifdef CONFIG_X86_32
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/* This bit is reserved on P4/Xeon and should be cleared */
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
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(boot_cpu_data.x86 == 15))
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value &= ~APIC_SPIV_FOCUS_DISABLED;
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else
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#endif
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value |= APIC_SPIV_FOCUS_DISABLED;
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value |= SPURIOUS_APIC_VECTOR;
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apic_write(APIC_SPIV, value);
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/*
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* Set up the virtual wire mode.
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*/
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apic_write(APIC_LVT0, APIC_DM_EXTINT);
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value = APIC_DM_NMI;
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if (!lapic_is_integrated()) /* 82489DX */
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value |= APIC_LVT_LEVEL_TRIGGER;
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if (apic_extnmi == APIC_EXTNMI_NONE)
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value |= APIC_LVT_MASKED;
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apic_write(APIC_LVT1, value);
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}
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/* Init the interrupt delivery mode for the BSP */
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/* Init the interrupt delivery mode for the BSP */
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void __init apic_intr_mode_init(void)
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void __init apic_intr_mode_init(void)
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{
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{
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@ -60,9 +60,6 @@ void __init init_ISA_irqs(void)
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struct irq_chip *chip = legacy_pic->chip;
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struct irq_chip *chip = legacy_pic->chip;
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int i;
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int i;
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
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init_bsp_APIC();
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#endif
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legacy_pic->init(0);
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legacy_pic->init(0);
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for (i = 0; i < nr_legacy_irqs(); i++)
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for (i = 0; i < nr_legacy_irqs(); i++)
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