drm: fix all sparse warning on 32-bit x86
Finally cleaned up the sparse warnings for the drm. Signed-off-by: Dave Airlie <airlied@linux.ie>
This commit is contained in:
Родитель
689b9d74b1
Коммит
b3a8363989
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@ -117,9 +117,9 @@ static __inline__ unsigned int HandleID(unsigned long lhandle,
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* type. Adds the map to the map list drm_device::maplist. Adds MTRR's where
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* applicable and if supported by the kernel.
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*/
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int drm_addmap_core(drm_device_t * dev, unsigned int offset,
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unsigned int size, drm_map_type_t type,
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drm_map_flags_t flags, drm_map_list_t ** maplist)
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static int drm_addmap_core(drm_device_t * dev, unsigned int offset,
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unsigned int size, drm_map_type_t type,
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drm_map_flags_t flags, drm_map_list_t ** maplist)
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{
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drm_map_t *map;
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drm_map_list_t *list;
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@ -232,7 +232,7 @@ int drm_getsareactx(struct inode *inode, struct file *filp,
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map = dev->context_sareas[request.ctx_id];
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up(&dev->struct_sem);
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request.handle = 0;
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request.handle = NULL;
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list_for_each_entry(_entry, &dev->maplist->head, head) {
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if (_entry->map == map) {
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request.handle =
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@ -240,7 +240,7 @@ int drm_getsareactx(struct inode *inode, struct file *filp,
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break;
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}
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}
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if (request.handle == 0)
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if (request.handle == NULL)
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return -EINVAL;
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if (copy_to_user(argp, &request, sizeof(request)))
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@ -74,9 +74,6 @@ static struct pci_device_id pciidlist[] = {
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i810_PCI_IDS
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};
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extern drm_ioctl_desc_t i810_ioctls[];
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extern int i810_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
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@ -121,6 +121,9 @@ extern void i810_driver_pretakedown(drm_device_t * dev);
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extern void i810_driver_prerelease(drm_device_t * dev, DRMFILE filp);
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extern int i810_driver_device_is_agp(drm_device_t * dev);
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extern drm_ioctl_desc_t i810_ioctls[];
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extern int i810_max_ioctl;
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#define I810_BASE(reg) ((unsigned long) \
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dev_priv->mmio_map->handle)
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#define I810_ADDR(reg) (I810_BASE(reg) + reg)
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@ -75,9 +75,6 @@ static struct pci_device_id pciidlist[] = {
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i830_PCI_IDS
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};
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extern drm_ioctl_desc_t i830_ioctls[];
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extern int i830_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
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@ -120,6 +120,9 @@ typedef struct drm_i830_private {
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} drm_i830_private_t;
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extern drm_ioctl_desc_t i830_ioctls[];
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extern int i830_max_ioctl;
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/* i830_dma.c */
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extern void i830_reclaim_buffers(drm_device_t * dev, struct file *filp);
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@ -139,15 +142,10 @@ extern int i830_driver_dma_quiescent(drm_device_t * dev);
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extern void i830_driver_prerelease(drm_device_t * dev, DRMFILE filp);
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extern int i830_driver_device_is_agp(drm_device_t * dev);
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#define I830_BASE(reg) ((unsigned long) \
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dev_priv->mmio_map->handle)
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#define I830_ADDR(reg) (I830_BASE(reg) + reg)
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#define I830_DEREF(reg) *(__volatile__ unsigned int *)I830_ADDR(reg)
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#define I830_READ(reg) readl((volatile u32 *)I830_ADDR(reg))
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#define I830_WRITE(reg,val) writel(val, (volatile u32 *)I830_ADDR(reg))
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#define I830_DEREF16(reg) *(__volatile__ u16 *)I830_ADDR(reg)
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#define I830_READ16(reg) I830_DEREF16(reg)
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#define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0)
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#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg)
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#define I830_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val)
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#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg)
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#define I830_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, reg, val)
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#define I830_VERBOSE 0
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@ -69,9 +69,6 @@ static struct pci_device_id pciidlist[] = {
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i915_PCI_IDS
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};
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extern drm_ioctl_desc_t i915_ioctls[];
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extern int i915_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
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@ -99,6 +99,9 @@ typedef struct drm_i915_private {
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struct mem_block *agp_heap;
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} drm_i915_private_t;
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extern drm_ioctl_desc_t i915_ioctls[];
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extern int i915_max_ioctl;
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/* i915_dma.c */
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extern void i915_kernel_lost_context(drm_device_t * dev);
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extern void i915_driver_pretakedown(drm_device_t * dev);
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@ -78,9 +78,6 @@ static struct pci_device_id pciidlist[] = {
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mga_PCI_IDS
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};
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extern drm_ioctl_desc_t mga_ioctls[];
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extern int mga_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
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@ -151,7 +148,7 @@ MODULE_LICENSE("GPL and additional rights");
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* \returns
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* If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
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*/
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int mga_driver_device_is_agp(drm_device_t * dev)
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static int mga_driver_device_is_agp(drm_device_t * dev)
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{
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const struct pci_dev *const pdev = dev->pdev;
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@ -148,6 +148,9 @@ typedef struct drm_mga_private {
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unsigned int agp_pages;
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} drm_mga_private_t;
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extern drm_ioctl_desc_t mga_ioctls[];
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extern int mga_max_ioctl;
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/* mga_dma.c */
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extern int mga_driver_preinit(drm_device_t * dev, unsigned long flags);
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extern int mga_dma_bootstrap(DRM_IOCTL_ARGS);
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@ -66,9 +66,6 @@ static struct pci_device_id pciidlist[] = {
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r128_PCI_IDS
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};
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extern drm_ioctl_desc_t r128_ioctls[];
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extern int r128_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
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@ -128,6 +128,9 @@ typedef struct drm_r128_buf_priv {
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drm_r128_freelist_t *list_entry;
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} drm_r128_buf_priv_t;
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extern drm_ioctl_desc_t r128_ioctls[];
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extern int r128_max_ioctl;
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/* r128_cce.c */
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extern int r128_cce_init(DRM_IOCTL_ARGS);
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extern int r128_cce_start(DRM_IOCTL_ARGS);
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@ -53,7 +53,7 @@ static const int r300_cliprect_cntl[4] = {
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* buffer, starting with index n.
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*/
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static int r300_emit_cliprects(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf, int n)
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drm_radeon_kcmd_buffer_t * cmdbuf, int n)
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{
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drm_clip_rect_t box;
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int nr;
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@ -131,7 +131,7 @@ static int r300_emit_cliprects(drm_radeon_private_t * dev_priv,
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return 0;
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}
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u8 r300_reg_flags[0x10000 >> 2];
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static u8 r300_reg_flags[0x10000 >> 2];
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void r300_init_reg_flags(void)
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{
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@ -260,7 +260,7 @@ static __inline__ int r300_check_offset(drm_radeon_private_t * dev_priv,
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static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
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dev_priv,
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drm_radeon_cmd_buffer_t
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drm_radeon_kcmd_buffer_t
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* cmdbuf,
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drm_r300_cmd_header_t
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header)
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@ -281,7 +281,7 @@ static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
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return DRM_ERR(EINVAL);
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}
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for (i = 0; i < sz; i++) {
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values[i] = ((int __user *)cmdbuf->buf)[i];
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values[i] = ((int *)cmdbuf->buf)[i];
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switch (r300_reg_flags[(reg >> 2) + i]) {
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case MARK_SAFE:
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break;
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@ -318,7 +318,7 @@ static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
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* Note that checks are performed on contents and addresses of the registers
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*/
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static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf,
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drm_radeon_kcmd_buffer_t * cmdbuf,
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drm_r300_cmd_header_t header)
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{
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int reg;
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@ -349,7 +349,7 @@ static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
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BEGIN_RING(1 + sz);
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OUT_RING(CP_PACKET0(reg, sz - 1));
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OUT_RING_TABLE((int __user *)cmdbuf->buf, sz);
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OUT_RING_TABLE((int *)cmdbuf->buf, sz);
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ADVANCE_RING();
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cmdbuf->buf += sz * 4;
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@ -364,7 +364,7 @@ static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
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* Called by r300_do_cp_cmdbuf.
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*/
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static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf,
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drm_radeon_kcmd_buffer_t * cmdbuf,
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drm_r300_cmd_header_t header)
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{
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int sz;
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@ -386,7 +386,7 @@ static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
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OUT_RING_REG(R300_VAP_PVS_WAITIDLE, 0);
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OUT_RING_REG(R300_VAP_PVS_UPLOAD_ADDRESS, addr);
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OUT_RING(CP_PACKET0_TABLE(R300_VAP_PVS_UPLOAD_DATA, sz * 4 - 1));
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OUT_RING_TABLE((int __user *)cmdbuf->buf, sz * 4);
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OUT_RING_TABLE((int *)cmdbuf->buf, sz * 4);
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ADVANCE_RING();
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@ -401,7 +401,7 @@ static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
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* Called by r300_emit_packet3.
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*/
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static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf)
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drm_radeon_kcmd_buffer_t * cmdbuf)
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{
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RING_LOCALS;
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@ -412,7 +412,7 @@ static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
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OUT_RING(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8));
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OUT_RING(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING |
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(1 << R300_PRIM_NUM_VERTICES_SHIFT));
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OUT_RING_TABLE((int __user *)cmdbuf->buf, 8);
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OUT_RING_TABLE((int *)cmdbuf->buf, 8);
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ADVANCE_RING();
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cmdbuf->buf += 8 * 4;
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@ -422,7 +422,7 @@ static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
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}
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static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf,
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drm_radeon_kcmd_buffer_t * cmdbuf,
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u32 header)
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{
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int count, i, k;
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@ -490,7 +490,7 @@ static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t * dev_priv,
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}
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static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf)
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drm_radeon_kcmd_buffer_t * cmdbuf)
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{
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u32 header;
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int count;
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@ -503,7 +503,7 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
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We need to be smarter. */
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/* obtain first word - actual packet3 header */
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header = *(u32 __user *) cmdbuf->buf;
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header = *(u32 *) cmdbuf->buf;
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/* Is it packet 3 ? */
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if ((header >> 30) != 0x3) {
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@ -541,7 +541,7 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
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BEGIN_RING(count + 2);
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OUT_RING(header);
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OUT_RING_TABLE((int __user *)(cmdbuf->buf + 4), count + 1);
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OUT_RING_TABLE((int *)(cmdbuf->buf + 4), count + 1);
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ADVANCE_RING();
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cmdbuf->buf += (count + 2) * 4;
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@ -555,12 +555,12 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
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* Called by r300_do_cp_cmdbuf.
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*/
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static __inline__ int r300_emit_packet3(drm_radeon_private_t * dev_priv,
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drm_radeon_cmd_buffer_t * cmdbuf,
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drm_radeon_kcmd_buffer_t * cmdbuf,
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drm_r300_cmd_header_t header)
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{
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int n;
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int ret;
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char __user *orig_buf = cmdbuf->buf;
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char *orig_buf = cmdbuf->buf;
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int orig_bufsz = cmdbuf->bufsz;
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/* This is a do-while-loop so that we run the interior at least once,
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@ -659,7 +659,7 @@ static void r300_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
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*/
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int r300_do_cp_cmdbuf(drm_device_t * dev,
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DRMFILE filp,
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drm_file_t * filp_priv, drm_radeon_cmd_buffer_t * cmdbuf)
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drm_file_t * filp_priv, drm_radeon_kcmd_buffer_t * cmdbuf)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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drm_device_dma_t *dma = dev->dma;
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@ -71,9 +71,6 @@ static struct pci_device_id pciidlist[] = {
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radeon_PCI_IDS
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};
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extern drm_ioctl_desc_t radeon_ioctls[];
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extern int radeon_max_ioctl;
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static struct drm_driver driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
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@ -281,7 +281,17 @@ typedef struct drm_radeon_buf_priv {
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u32 age;
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} drm_radeon_buf_priv_t;
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typedef struct drm_radeon_kcmd_buffer {
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int bufsz;
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char *buf;
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int nbox;
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drm_clip_rect_t __user *boxes;
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} drm_radeon_kcmd_buffer_t;
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extern int radeon_no_wb;
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extern drm_ioctl_desc_t radeon_ioctls[];
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extern int radeon_max_ioctl;
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/* radeon_cp.c */
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extern int radeon_cp_init(DRM_IOCTL_ARGS);
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extern int radeon_cp_start(DRM_IOCTL_ARGS);
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@ -340,7 +350,7 @@ extern void r300_init_reg_flags(void);
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extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
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drm_file_t * filp_priv,
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drm_radeon_cmd_buffer_t * cmdbuf);
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drm_radeon_kcmd_buffer_t * cmdbuf);
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/* Flags for stats.boxes
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*/
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@ -40,7 +40,7 @@
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static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
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dev_priv,
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drm_file_t * filp_priv,
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u32 * offset)
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u32 *offset)
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{
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u32 off = *offset;
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struct drm_radeon_driver_file_fields *radeon_priv;
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@ -66,7 +66,7 @@ static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
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static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
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dev_priv,
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drm_file_t * filp_priv,
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int id, u32 __user * data)
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int id, u32 *data)
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{
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switch (id) {
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@ -240,8 +240,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
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static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t *
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dev_priv,
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drm_file_t * filp_priv,
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drm_radeon_cmd_buffer_t *
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cmdbuf,
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drm_radeon_kcmd_buffer_t *cmdbuf,
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unsigned int *cmdsz)
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{
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u32 *cmd = (u32 *) cmdbuf->buf;
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@ -2564,7 +2563,7 @@ static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
|
|||
static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
|
||||
drm_file_t * filp_priv,
|
||||
drm_radeon_cmd_header_t header,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf)
|
||||
drm_radeon_kcmd_buffer_t *cmdbuf)
|
||||
{
|
||||
int id = (int)header.packet.packet_id;
|
||||
int sz, reg;
|
||||
|
@ -2599,7 +2598,7 @@ static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
|
|||
|
||||
static __inline__ int radeon_emit_scalars(drm_radeon_private_t * dev_priv,
|
||||
drm_radeon_cmd_header_t header,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf)
|
||||
drm_radeon_kcmd_buffer_t * cmdbuf)
|
||||
{
|
||||
int sz = header.scalars.count;
|
||||
int start = header.scalars.offset;
|
||||
|
@ -2621,7 +2620,7 @@ static __inline__ int radeon_emit_scalars(drm_radeon_private_t * dev_priv,
|
|||
*/
|
||||
static __inline__ int radeon_emit_scalars2(drm_radeon_private_t * dev_priv,
|
||||
drm_radeon_cmd_header_t header,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf)
|
||||
drm_radeon_kcmd_buffer_t * cmdbuf)
|
||||
{
|
||||
int sz = header.scalars.count;
|
||||
int start = ((unsigned int)header.scalars.offset) + 0x100;
|
||||
|
@ -2641,7 +2640,7 @@ static __inline__ int radeon_emit_scalars2(drm_radeon_private_t * dev_priv,
|
|||
|
||||
static __inline__ int radeon_emit_vectors(drm_radeon_private_t * dev_priv,
|
||||
drm_radeon_cmd_header_t header,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf)
|
||||
drm_radeon_kcmd_buffer_t * cmdbuf)
|
||||
{
|
||||
int sz = header.vectors.count;
|
||||
int start = header.vectors.offset;
|
||||
|
@ -2662,7 +2661,7 @@ static __inline__ int radeon_emit_vectors(drm_radeon_private_t * dev_priv,
|
|||
|
||||
static int radeon_emit_packet3(drm_device_t * dev,
|
||||
drm_file_t * filp_priv,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf)
|
||||
drm_radeon_kcmd_buffer_t *cmdbuf)
|
||||
{
|
||||
drm_radeon_private_t *dev_priv = dev->dev_private;
|
||||
unsigned int cmdsz;
|
||||
|
@ -2688,7 +2687,7 @@ static int radeon_emit_packet3(drm_device_t * dev,
|
|||
|
||||
static int radeon_emit_packet3_cliprect(drm_device_t * dev,
|
||||
drm_file_t * filp_priv,
|
||||
drm_radeon_cmd_buffer_t * cmdbuf,
|
||||
drm_radeon_kcmd_buffer_t *cmdbuf,
|
||||
int orig_nbox)
|
||||
{
|
||||
drm_radeon_private_t *dev_priv = dev->dev_private;
|
||||
|
@ -2785,7 +2784,7 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
|
|||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_t *buf = NULL;
|
||||
int idx;
|
||||
drm_radeon_cmd_buffer_t cmdbuf;
|
||||
drm_radeon_kcmd_buffer_t cmdbuf;
|
||||
drm_radeon_cmd_header_t header;
|
||||
int orig_nbox, orig_bufsz;
|
||||
char *kbuf = NULL;
|
||||
|
@ -2819,7 +2818,7 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
|
|||
kbuf = drm_alloc(cmdbuf.bufsz, DRM_MEM_DRIVER);
|
||||
if (kbuf == NULL)
|
||||
return DRM_ERR(ENOMEM);
|
||||
if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz)) {
|
||||
if (DRM_COPY_FROM_USER(kbuf, (void __user *)cmdbuf.buf, cmdbuf.bufsz)) {
|
||||
drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
|
||||
return DRM_ERR(EFAULT);
|
||||
}
|
||||
|
|
|
@ -59,9 +59,6 @@ static struct pci_device_id pciidlist[] = {
|
|||
savage_PCI_IDS
|
||||
};
|
||||
|
||||
extern drm_ioctl_desc_t savage_ioctls[];
|
||||
extern int savage_max_ioctl;
|
||||
|
||||
static struct drm_driver driver = {
|
||||
.driver_features =
|
||||
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_PCI_DMA,
|
||||
|
|
|
@ -104,6 +104,9 @@ enum savage_family {
|
|||
S3_LAST
|
||||
};
|
||||
|
||||
extern drm_ioctl_desc_t savage_ioctls[];
|
||||
extern int savage_max_ioctl;
|
||||
|
||||
#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
|
||||
|
||||
#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
|
||||
|
|
|
@ -816,10 +816,8 @@ static int savage_dispatch_clear(drm_savage_private_t * dev_priv,
|
|||
if (nbox == 0)
|
||||
return 0;
|
||||
|
||||
DRM_GET_USER_UNCHECKED(mask, &((const drm_savage_cmd_header_t *)data)
|
||||
->clear1.mask);
|
||||
DRM_GET_USER_UNCHECKED(value, &((const drm_savage_cmd_header_t *)data)
|
||||
->clear1.value);
|
||||
DRM_GET_USER_UNCHECKED(mask, &data->clear1.mask);
|
||||
DRM_GET_USER_UNCHECKED(value, &data->clear1.value);
|
||||
|
||||
clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
|
||||
BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;
|
||||
|
|
|
@ -61,9 +61,6 @@ static struct pci_device_id pciidlist[] = {
|
|||
sisdrv_PCI_IDS
|
||||
};
|
||||
|
||||
extern drm_ioctl_desc_t sis_ioctls[];
|
||||
extern int sis_max_ioctl;
|
||||
|
||||
static struct drm_driver driver = {
|
||||
.driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR,
|
||||
.context_ctor = sis_init_context,
|
||||
|
|
|
@ -49,4 +49,7 @@ typedef struct drm_sis_private {
|
|||
extern int sis_init_context(drm_device_t * dev, int context);
|
||||
extern int sis_final_context(drm_device_t * dev, int context);
|
||||
|
||||
extern drm_ioctl_desc_t sis_ioctls[];
|
||||
extern int sis_max_ioctl;
|
||||
|
||||
#endif
|
||||
|
|
|
@ -112,4 +112,7 @@ extern void via_init_futex(drm_via_private_t * dev_priv);
|
|||
extern void via_cleanup_futex(drm_via_private_t * dev_priv);
|
||||
extern void via_release_futex(drm_via_private_t * dev_priv, int context);
|
||||
|
||||
extern int via_parse_command_stream(drm_device_t * dev, const uint32_t * buf,
|
||||
unsigned int size);
|
||||
|
||||
#endif
|
||||
|
|
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