MIPS: Netlogic: Update function to read DRAM BARs
Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent with the rest of the functions in the file. Pass the the size of the array 'dram_map' to the function, and ensure that it does not write past the end of the array. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -89,7 +89,7 @@ void xlp_wakeup_secondary_cpus(void);
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void xlp_mmu_init(void);
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void xlp_mmu_init(void);
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void nlm_hal_init(void);
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void nlm_hal_init(void);
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int xlp_get_dram_map(int n, uint64_t *dram_map);
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int nlm_get_dram_map(int node, uint64_t *dram_map, int nentries);
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struct pci_dev;
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struct pci_dev;
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int xlp_socdev_to_node(const struct pci_dev *dev);
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int xlp_socdev_to_node(const struct pci_dev *dev);
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@ -449,19 +449,21 @@ unsigned int nlm_get_cpu_frequency(void)
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/*
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/*
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* Fills upto 8 pairs of entries containing the DRAM map of a node
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* Fills upto 8 pairs of entries containing the DRAM map of a node
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* if n < 0, get dram map for all nodes
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* if node < 0, get dram map for all nodes
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*/
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*/
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int xlp_get_dram_map(int n, uint64_t *dram_map)
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int nlm_get_dram_map(int node, uint64_t *dram_map, int nentries)
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{
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{
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uint64_t bridgebase, base, lim;
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uint64_t bridgebase, base, lim;
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uint32_t val;
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uint32_t val;
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unsigned int barreg, limreg, xlatreg;
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unsigned int barreg, limreg, xlatreg;
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int i, node, rv;
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int i, n, rv;
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/* Look only at mapping on Node 0, we don't handle crazy configs */
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/* Look only at mapping on Node 0, we don't handle crazy configs */
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bridgebase = nlm_get_bridge_regbase(0);
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bridgebase = nlm_get_bridge_regbase(0);
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rv = 0;
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rv = 0;
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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if (rv + 1 >= nentries)
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break;
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if (cpu_is_xlp9xx()) {
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if (cpu_is_xlp9xx()) {
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barreg = BRIDGE_9XX_DRAM_BAR(i);
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barreg = BRIDGE_9XX_DRAM_BAR(i);
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limreg = BRIDGE_9XX_DRAM_LIMIT(i);
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limreg = BRIDGE_9XX_DRAM_LIMIT(i);
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@ -471,10 +473,10 @@ int xlp_get_dram_map(int n, uint64_t *dram_map)
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limreg = BRIDGE_DRAM_LIMIT(i);
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limreg = BRIDGE_DRAM_LIMIT(i);
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xlatreg = BRIDGE_DRAM_NODE_TRANSLN(i);
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xlatreg = BRIDGE_DRAM_NODE_TRANSLN(i);
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}
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}
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if (n >= 0) {
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if (node >= 0) {
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/* node specified, get node mapping of BAR */
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/* node specified, get node mapping of BAR */
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val = nlm_read_bridge_reg(bridgebase, xlatreg);
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val = nlm_read_bridge_reg(bridgebase, xlatreg);
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node = (val >> 1) & 0x3;
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n = (val >> 1) & 0x3;
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if (n != node)
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if (n != node)
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continue;
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continue;
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}
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}
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@ -81,7 +81,7 @@ static void __init xlp_init_mem_from_bars(void)
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uint64_t map[16];
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uint64_t map[16];
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int i, n;
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int i, n;
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n = xlp_get_dram_map(-1, map); /* -1: info for all nodes */
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n = nlm_get_dram_map(-1, map, ARRAY_SIZE(map)); /* -1 : all nodes */
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for (i = 0; i < n; i += 2) {
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for (i = 0; i < n; i += 2) {
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/* exclude 0x1000_0000-0x2000_0000, u-boot device */
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/* exclude 0x1000_0000-0x2000_0000, u-boot device */
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if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
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if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
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