qla4xxx: Add support of 0xFF capture mask for minidump
Signed-off-by: Tej Parkash <tej.parkash@qlogic.com> Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: Christoph Hellwig <hch@lst.de>
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a511b4afcb
Коммит
b410982c98
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@ -1415,6 +1415,9 @@ struct ql_iscsi_stats {
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#define QLA83XX_DBG_OCM_WNDREG_ARRAY_LEN 16
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#define QLA83XX_SS_OCM_WNDREG_INDEX 3
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#define QLA83XX_SS_PCI_INDEX 0
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#define QLA8022_TEMPLATE_CAP_OFFSET 172
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#define QLA83XX_TEMPLATE_CAP_OFFSET 268
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#define QLA80XX_TEMPLATE_RESERVED_BITS 16
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struct qla4_8xxx_minidump_template_hdr {
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uint32_t entry_type;
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@ -1434,6 +1437,7 @@ struct qla4_8xxx_minidump_template_hdr {
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uint32_t saved_state_array[QLA8XXX_DBG_STATE_ARRAY_LEN];
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uint32_t capture_size_array[QLA8XXX_DBG_CAP_SIZE_ARRAY_LEN];
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uint32_t ocm_window_reg[QLA83XX_DBG_OCM_WNDREG_ARRAY_LEN];
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uint32_t capabilities[QLA80XX_TEMPLATE_RESERVED_BITS];
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};
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#endif /* _QLA4X_FW_H */
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@ -282,6 +282,25 @@ qla4xxx_wait_for_ip_config(struct scsi_qla_host *ha)
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return ipv4_wait|ipv6_wait;
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}
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static int qla4_80xx_is_minidump_dma_capable(struct scsi_qla_host *ha,
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struct qla4_8xxx_minidump_template_hdr *md_hdr)
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{
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int offset = (is_qla8022(ha)) ? QLA8022_TEMPLATE_CAP_OFFSET :
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QLA83XX_TEMPLATE_CAP_OFFSET;
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int rval = 1;
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uint32_t *cap_offset;
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cap_offset = (uint32_t *)((char *)md_hdr + offset);
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if (!(le32_to_cpu(*cap_offset) & BIT_0)) {
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ql4_printk(KERN_INFO, ha, "PEX DMA Not supported %d\n",
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*cap_offset);
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rval = 0;
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}
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return rval;
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}
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/**
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* qla4xxx_alloc_fw_dump - Allocate memory for minidump data.
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* @ha: pointer to host adapter structure.
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@ -294,6 +313,7 @@ void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)
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void *md_tmp;
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dma_addr_t md_tmp_dma;
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struct qla4_8xxx_minidump_template_hdr *md_hdr;
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int dma_capable;
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if (ha->fw_dump) {
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ql4_printk(KERN_WARNING, ha,
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@ -326,13 +346,19 @@ void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)
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md_hdr = (struct qla4_8xxx_minidump_template_hdr *)md_tmp;
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dma_capable = qla4_80xx_is_minidump_dma_capable(ha, md_hdr);
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capture_debug_level = md_hdr->capture_debug_level;
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/* Get capture mask based on module loadtime setting. */
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if (ql4xmdcapmask >= 0x3 && ql4xmdcapmask <= 0x7F)
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if ((ql4xmdcapmask >= 0x3 && ql4xmdcapmask <= 0x7F) ||
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(ql4xmdcapmask == 0xFF && dma_capable)) {
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ha->fw_dump_capture_mask = ql4xmdcapmask;
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else
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} else {
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if (ql4xmdcapmask == 0xFF)
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ql4_printk(KERN_INFO, ha, "Falling back to default capture mask, as PEX DMA is not supported\n");
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ha->fw_dump_capture_mask = capture_debug_level;
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}
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md_hdr->driver_capture_mask = ha->fw_dump_capture_mask;
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@ -88,7 +88,7 @@ module_param(ql4xmdcapmask, int, S_IRUGO);
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MODULE_PARM_DESC(ql4xmdcapmask,
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" Set the Minidump driver capture mask level.\n"
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"\t\t Default is 0 (firmware default capture mask)\n"
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"\t\t Can be set to 0x3, 0x7, 0xF, 0x1F, 0x3F, 0x7F");
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"\t\t Can be set to 0x3, 0x7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF");
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int ql4xenablemd = 1;
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module_param(ql4xenablemd, int, S_IRUGO | S_IWUSR);
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