[media] media: i2c: ADV7604: Rename adv7604 prefixes
It is confusing which parts of the driver are adv7604 specific, adv7611 specific or common for both. This patch renames any adv7604 prefixes (both for functions and defines) to adv76xx whenever they are common. Signed-off-by: Pablo Anton <pablo.anton@vodalys-labs.com> Signed-off-by: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com> [hans.verkuil@cisco.com: rebased and renamed ADV76xx_fsc to ADV76XX_FSC] [hans.verkuil@cisco.com: kept the existing adv7604 driver name] Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -47,16 +47,16 @@ enum adv7604_bus_order {
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};
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};
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/* Input Color Space (IO register 0x02, [7:4]) */
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/* Input Color Space (IO register 0x02, [7:4]) */
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enum adv7604_inp_color_space {
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enum adv76xx_inp_color_space {
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ADV7604_INP_COLOR_SPACE_LIM_RGB = 0,
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ADV76XX_INP_COLOR_SPACE_LIM_RGB = 0,
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ADV7604_INP_COLOR_SPACE_FULL_RGB = 1,
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ADV76XX_INP_COLOR_SPACE_FULL_RGB = 1,
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ADV7604_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
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ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
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ADV7604_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
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ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
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ADV7604_INP_COLOR_SPACE_XVYCC_601 = 4,
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ADV76XX_INP_COLOR_SPACE_XVYCC_601 = 4,
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ADV7604_INP_COLOR_SPACE_XVYCC_709 = 5,
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ADV76XX_INP_COLOR_SPACE_XVYCC_709 = 5,
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ADV7604_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
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ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
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ADV7604_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
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ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
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ADV7604_INP_COLOR_SPACE_AUTO = 0xf,
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ADV76XX_INP_COLOR_SPACE_AUTO = 0xf,
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};
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};
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/* Select output format (IO register 0x03, [4:2]) */
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/* Select output format (IO register 0x03, [4:2]) */
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@ -66,38 +66,39 @@ enum adv7604_op_format_mode_sel {
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ADV7604_OP_FORMAT_MODE2 = 0x08,
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ADV7604_OP_FORMAT_MODE2 = 0x08,
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};
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};
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enum adv7604_drive_strength {
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enum adv76xx_drive_strength {
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ADV7604_DR_STR_MEDIUM_LOW = 1,
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ADV76XX_DR_STR_MEDIUM_LOW = 1,
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ADV7604_DR_STR_MEDIUM_HIGH = 2,
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ADV76XX_DR_STR_MEDIUM_HIGH = 2,
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ADV7604_DR_STR_HIGH = 3,
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ADV76XX_DR_STR_HIGH = 3,
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};
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};
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enum adv7604_int1_config {
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/* INT1 Configuration (IO register 0x40, [1:0]) */
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ADV7604_INT1_CONFIG_OPEN_DRAIN,
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enum adv76xx_int1_config {
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ADV7604_INT1_CONFIG_ACTIVE_LOW,
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ADV76XX_INT1_CONFIG_OPEN_DRAIN,
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ADV7604_INT1_CONFIG_ACTIVE_HIGH,
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ADV76XX_INT1_CONFIG_ACTIVE_LOW,
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ADV7604_INT1_CONFIG_DISABLED,
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ADV76XX_INT1_CONFIG_ACTIVE_HIGH,
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ADV76XX_INT1_CONFIG_DISABLED,
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};
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};
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enum adv7604_page {
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enum adv76xx_page {
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ADV7604_PAGE_IO,
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ADV76XX_PAGE_IO,
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ADV7604_PAGE_AVLINK,
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ADV7604_PAGE_AVLINK,
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ADV7604_PAGE_CEC,
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ADV76XX_PAGE_CEC,
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ADV7604_PAGE_INFOFRAME,
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ADV76XX_PAGE_INFOFRAME,
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ADV7604_PAGE_ESDP,
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ADV7604_PAGE_ESDP,
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ADV7604_PAGE_DPP,
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ADV7604_PAGE_DPP,
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ADV7604_PAGE_AFE,
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ADV76XX_PAGE_AFE,
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ADV7604_PAGE_REP,
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ADV76XX_PAGE_REP,
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ADV7604_PAGE_EDID,
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ADV76XX_PAGE_EDID,
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ADV7604_PAGE_HDMI,
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ADV76XX_PAGE_HDMI,
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ADV7604_PAGE_TEST,
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ADV76XX_PAGE_TEST,
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ADV7604_PAGE_CP,
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ADV76XX_PAGE_CP,
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ADV7604_PAGE_VDP,
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ADV7604_PAGE_VDP,
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ADV7604_PAGE_MAX,
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ADV76XX_PAGE_MAX,
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};
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};
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/* Platform dependent definition */
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/* Platform dependent definition */
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struct adv7604_platform_data {
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struct adv76xx_platform_data {
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/* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
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/* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
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unsigned disable_pwrdnb:1;
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unsigned disable_pwrdnb:1;
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@ -116,7 +117,7 @@ struct adv7604_platform_data {
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enum adv7604_op_format_mode_sel op_format_mode_sel;
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enum adv7604_op_format_mode_sel op_format_mode_sel;
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/* Configuration of the INT1 pin */
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/* Configuration of the INT1 pin */
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enum adv7604_int1_config int1_config;
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enum adv76xx_int1_config int1_config;
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/* IO register 0x02 */
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/* IO register 0x02 */
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unsigned alt_gamma:1;
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unsigned alt_gamma:1;
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@ -134,9 +135,9 @@ struct adv7604_platform_data {
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unsigned inv_llc_pol:1;
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unsigned inv_llc_pol:1;
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/* IO register 0x14 */
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/* IO register 0x14 */
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enum adv7604_drive_strength dr_str_data;
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enum adv76xx_drive_strength dr_str_data;
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enum adv7604_drive_strength dr_str_clk;
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enum adv76xx_drive_strength dr_str_clk;
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enum adv7604_drive_strength dr_str_sync;
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enum adv76xx_drive_strength dr_str_sync;
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/* IO register 0x30 */
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/* IO register 0x30 */
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unsigned output_bus_lsb_to_msb:1;
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unsigned output_bus_lsb_to_msb:1;
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@ -145,11 +146,11 @@ struct adv7604_platform_data {
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unsigned hdmi_free_run_mode;
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unsigned hdmi_free_run_mode;
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/* i2c addresses: 0 == use default */
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/* i2c addresses: 0 == use default */
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u8 i2c_addresses[ADV7604_PAGE_MAX];
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u8 i2c_addresses[ADV76XX_PAGE_MAX];
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};
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};
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enum adv7604_pad {
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enum adv76xx_pad {
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ADV7604_PAD_HDMI_PORT_A = 0,
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ADV76XX_PAD_HDMI_PORT_A = 0,
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ADV7604_PAD_HDMI_PORT_B = 1,
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ADV7604_PAD_HDMI_PORT_B = 1,
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ADV7604_PAD_HDMI_PORT_C = 2,
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ADV7604_PAD_HDMI_PORT_C = 2,
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ADV7604_PAD_HDMI_PORT_D = 3,
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ADV7604_PAD_HDMI_PORT_D = 3,
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@ -158,7 +159,7 @@ enum adv7604_pad {
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/* The source pad is either 1 (ADV7611) or 6 (ADV7604) */
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/* The source pad is either 1 (ADV7611) or 6 (ADV7604) */
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ADV7604_PAD_SOURCE = 6,
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ADV7604_PAD_SOURCE = 6,
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ADV7611_PAD_SOURCE = 1,
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ADV7611_PAD_SOURCE = 1,
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ADV7604_PAD_MAX = 7,
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ADV76XX_PAD_MAX = 7,
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};
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};
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#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
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#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
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@ -166,7 +167,7 @@ enum adv7604_pad {
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#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
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#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
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/* notify events */
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/* notify events */
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#define ADV7604_HOTPLUG 1
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#define ADV76XX_HOTPLUG 1
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#define ADV7604_FMT_CHANGE 2
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#define ADV76XX_FMT_CHANGE 2
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#endif
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#endif
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