drm/nouveau/gpio: rename g92 class to g94
nv92 hardware has only 16 interrupt lines, while nv94 and later has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect PDISP setup. This is a regression introduced with commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3 Author: Ben Skeggs <bskeggs@redhat.com> Date: Mon May 12 15:22:42 2014 +1000 gpio: split g92 class from nv50 Reported-by: estece on #nouveau Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Родитель
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Коммит
b485a7005f
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@ -137,7 +137,7 @@ nouveau-y += core/subdev/fuse/gm107.o
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nouveau-y += core/subdev/gpio/base.o
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nouveau-y += core/subdev/gpio/nv10.o
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nouveau-y += core/subdev/gpio/nv50.o
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nouveau-y += core/subdev/gpio/nv92.o
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nouveau-y += core/subdev/gpio/nv94.o
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nouveau-y += core/subdev/gpio/nvd0.o
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nouveau-y += core/subdev/gpio/nve0.o
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nouveau-y += core/subdev/i2c/base.o
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@ -145,7 +145,7 @@ nv50_identify(struct nouveau_device *device)
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case 0x92:
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device->cname = "G92";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nv84_clock_oclass;
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@ -174,7 +174,7 @@ nv50_identify(struct nouveau_device *device)
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case 0x94:
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device->cname = "G94";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nv84_clock_oclass;
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@ -203,7 +203,7 @@ nv50_identify(struct nouveau_device *device)
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case 0x96:
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device->cname = "G96";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nv84_clock_oclass;
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@ -232,7 +232,7 @@ nv50_identify(struct nouveau_device *device)
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case 0x98:
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device->cname = "G98";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nv84_clock_oclass;
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@ -261,7 +261,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xa0:
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device->cname = "G200";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nv84_clock_oclass;
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@ -290,7 +290,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xaa:
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device->cname = "MCP77/MCP78";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nvaa_clock_oclass;
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@ -319,7 +319,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xac:
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device->cname = "MCP79/MCP7A";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = nvaa_clock_oclass;
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@ -348,7 +348,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xa3:
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device->cname = "GT215";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nva3_clock_oclass;
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@ -379,7 +379,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xa5:
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device->cname = "GT216";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nva3_clock_oclass;
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@ -409,7 +409,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xa8:
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device->cname = "GT218";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nva3_clock_oclass;
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@ -439,7 +439,7 @@ nv50_identify(struct nouveau_device *device)
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case 0xaf:
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device->cname = "MCP89";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nva3_clock_oclass;
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@ -61,7 +61,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xc0:
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device->cname = "GF100";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -94,7 +94,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xc4:
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device->cname = "GF104";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -127,7 +127,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xc3:
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device->cname = "GF106";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -159,7 +159,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xce:
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device->cname = "GF114";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -192,7 +192,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xcf:
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device->cname = "GF116";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -225,7 +225,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xc1:
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device->cname = "GF108";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -257,7 +257,7 @@ nvc0_identify(struct nouveau_device *device)
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case 0xc8:
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device->cname = "GF110";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
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@ -40,7 +40,7 @@ nouveau_gpio(void *obj)
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extern struct nouveau_oclass *nv10_gpio_oclass;
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extern struct nouveau_oclass *nv50_gpio_oclass;
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extern struct nouveau_oclass *nv92_gpio_oclass;
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extern struct nouveau_oclass *nv94_gpio_oclass;
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extern struct nouveau_oclass *nvd0_gpio_oclass;
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extern struct nouveau_oclass *nve0_gpio_oclass;
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@ -25,7 +25,7 @@
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#include "priv.h"
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void
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nv92_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
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nv94_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
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{
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u32 intr0 = nv_rd32(gpio, 0x00e054);
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u32 intr1 = nv_rd32(gpio, 0x00e074);
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@ -38,7 +38,7 @@ nv92_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
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}
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void
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nv92_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
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nv94_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
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{
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u32 inte0 = nv_rd32(gpio, 0x00e050);
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u32 inte1 = nv_rd32(gpio, 0x00e070);
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@ -57,8 +57,8 @@ nv92_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
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}
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struct nouveau_oclass *
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nv92_gpio_oclass = &(struct nouveau_gpio_impl) {
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.base.handle = NV_SUBDEV(GPIO, 0x92),
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nv94_gpio_oclass = &(struct nouveau_gpio_impl) {
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.base.handle = NV_SUBDEV(GPIO, 0x94),
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.base.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = _nouveau_gpio_ctor,
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.dtor = _nouveau_gpio_dtor,
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@ -66,8 +66,8 @@ nv92_gpio_oclass = &(struct nouveau_gpio_impl) {
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.fini = _nouveau_gpio_fini,
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},
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.lines = 32,
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.intr_stat = nv92_gpio_intr_stat,
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.intr_mask = nv92_gpio_intr_mask,
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.intr_stat = nv94_gpio_intr_stat,
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.intr_mask = nv94_gpio_intr_mask,
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.drive = nv50_gpio_drive,
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.sense = nv50_gpio_sense,
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.reset = nv50_gpio_reset,
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@ -77,8 +77,8 @@ nvd0_gpio_oclass = &(struct nouveau_gpio_impl) {
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.fini = _nouveau_gpio_fini,
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},
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.lines = 32,
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.intr_stat = nv92_gpio_intr_stat,
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.intr_mask = nv92_gpio_intr_mask,
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.intr_stat = nv94_gpio_intr_stat,
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.intr_mask = nv94_gpio_intr_mask,
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.drive = nvd0_gpio_drive,
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.sense = nvd0_gpio_sense,
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.reset = nvd0_gpio_reset,
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@ -56,8 +56,8 @@ void nv50_gpio_reset(struct nouveau_gpio *, u8);
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int nv50_gpio_drive(struct nouveau_gpio *, int, int, int);
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int nv50_gpio_sense(struct nouveau_gpio *, int);
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void nv92_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
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void nv92_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
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void nv94_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
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void nv94_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
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void nvd0_gpio_reset(struct nouveau_gpio *, u8);
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int nvd0_gpio_drive(struct nouveau_gpio *, int, int, int);
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