i2c: xtensa s6000 i2c driver
Support for the s6000 on-chip i2c controller. Signed-off-by: Oskar Schirmer <os@emlix.com> Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Oskar Schirmer
Ben Dooks
Родитель
c724d67dff
Коммит
b486ddbc0f
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@ -472,6 +472,16 @@ config I2C_S3C2410
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Say Y here to include support for I2C controller in the
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Samsung S3C2410 based System-on-Chip devices.
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config I2C_S6000
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tristate "S6000 I2C support"
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depends on XTENSA_VARIANT_S6000
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help
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This driver supports the on chip I2C device on the
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S6000 xtensa processor family.
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To compile this driver as a module, choose M here. The module
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will be called i2c-s6000.
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config I2C_SH7760
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tristate "Renesas SH7760 I2C Controller"
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depends on CPU_SUBTYPE_SH7760
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@ -44,6 +44,7 @@ obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
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obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
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obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
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obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
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obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
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obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
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obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
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obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
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@ -0,0 +1,407 @@
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/*
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* drivers/i2c/busses/i2c-s6000.c
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*
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* Description: Driver for S6000 Family I2C Interface
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* Copyright (c) 2008 emlix GmbH
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* Author: Oskar Schirmer <os@emlix.com>
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*
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* Partially based on i2c-bfin-twi.c driver by <sonic.zhang@analog.com>
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* Copyright (c) 2005-2007 Analog Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/i2c/s6000.h>
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#include <linux/timer.h>
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#include <linux/spinlock.h>
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include "i2c-s6000.h"
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#define DRV_NAME "i2c-s6000"
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#define POLL_TIMEOUT (2 * HZ)
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struct s6i2c_if {
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u8 __iomem *reg; /* memory mapped registers */
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int irq;
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spinlock_t lock;
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struct i2c_msg *msgs; /* messages currently handled */
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int msgs_num; /* nb of msgs to do */
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int msgs_push; /* nb of msgs read/written */
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int msgs_done; /* nb of msgs finally handled */
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unsigned push; /* nb of bytes read/written in msg */
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unsigned done; /* nb of bytes finally handled */
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int timeout_count; /* timeout retries left */
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struct timer_list timeout_timer;
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struct i2c_adapter adap;
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struct completion complete;
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struct clk *clk;
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struct resource *res;
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};
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static inline u16 i2c_rd16(struct s6i2c_if *iface, unsigned n)
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{
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return readw(iface->reg + (n));
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}
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static inline void i2c_wr16(struct s6i2c_if *iface, unsigned n, u16 v)
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{
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writew(v, iface->reg + (n));
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}
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static inline u32 i2c_rd32(struct s6i2c_if *iface, unsigned n)
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{
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return readl(iface->reg + (n));
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}
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static inline void i2c_wr32(struct s6i2c_if *iface, unsigned n, u32 v)
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{
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writel(v, iface->reg + (n));
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}
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static struct s6i2c_if s6i2c_if;
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static void s6i2c_handle_interrupt(struct s6i2c_if *iface)
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{
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if (i2c_rd16(iface, S6_I2C_INTRSTAT) & (1 << S6_I2C_INTR_TXABRT)) {
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i2c_rd16(iface, S6_I2C_CLRTXABRT);
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
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complete(&iface->complete);
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return;
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}
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if (iface->msgs_done >= iface->msgs_num) {
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dev_err(&iface->adap.dev, "s6i2c: spurious I2C irq: %04x\n",
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i2c_rd16(iface, S6_I2C_INTRSTAT));
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
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return;
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}
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while ((iface->msgs_push < iface->msgs_num)
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&& (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_TFNF))) {
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struct i2c_msg *m = &iface->msgs[iface->msgs_push];
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if (!(m->flags & I2C_M_RD))
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i2c_wr16(iface, S6_I2C_DATACMD, m->buf[iface->push]);
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else
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i2c_wr16(iface, S6_I2C_DATACMD,
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1 << S6_I2C_DATACMD_READ);
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if (++iface->push >= m->len) {
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iface->push = 0;
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iface->msgs_push += 1;
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}
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}
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do {
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struct i2c_msg *m = &iface->msgs[iface->msgs_done];
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if (!(m->flags & I2C_M_RD)) {
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if (iface->msgs_done < iface->msgs_push)
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iface->msgs_done += 1;
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else
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break;
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} else if (i2c_rd16(iface, S6_I2C_STATUS)
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& (1 << S6_I2C_STATUS_RFNE)) {
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m->buf[iface->done] = i2c_rd16(iface, S6_I2C_DATACMD);
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if (++iface->done >= m->len) {
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iface->done = 0;
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iface->msgs_done += 1;
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}
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} else{
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break;
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}
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} while (iface->msgs_done < iface->msgs_num);
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if (iface->msgs_done >= iface->msgs_num) {
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i2c_wr16(iface, S6_I2C_INTRMASK, 1 << S6_I2C_INTR_TXABRT);
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complete(&iface->complete);
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} else if (iface->msgs_push >= iface->msgs_num) {
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i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXABRT) |
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(1 << S6_I2C_INTR_RXFULL));
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} else {
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i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXABRT) |
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(1 << S6_I2C_INTR_TXEMPTY) |
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(1 << S6_I2C_INTR_RXFULL));
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}
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}
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static irqreturn_t s6i2c_interrupt_entry(int irq, void *dev_id)
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{
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struct s6i2c_if *iface = dev_id;
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if (!(i2c_rd16(iface, S6_I2C_STATUS) & ((1 << S6_I2C_INTR_RXUNDER)
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| (1 << S6_I2C_INTR_RXOVER)
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| (1 << S6_I2C_INTR_RXFULL)
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| (1 << S6_I2C_INTR_TXOVER)
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| (1 << S6_I2C_INTR_TXEMPTY)
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| (1 << S6_I2C_INTR_RDREQ)
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| (1 << S6_I2C_INTR_TXABRT)
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| (1 << S6_I2C_INTR_RXDONE)
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| (1 << S6_I2C_INTR_ACTIVITY)
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| (1 << S6_I2C_INTR_STOPDET)
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| (1 << S6_I2C_INTR_STARTDET)
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| (1 << S6_I2C_INTR_GENCALL))))
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return IRQ_NONE;
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spin_lock(&iface->lock);
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del_timer(&iface->timeout_timer);
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s6i2c_handle_interrupt(iface);
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spin_unlock(&iface->lock);
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return IRQ_HANDLED;
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}
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static void s6i2c_timeout(unsigned long data)
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{
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struct s6i2c_if *iface = (struct s6i2c_if *)data;
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unsigned long flags;
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spin_lock_irqsave(&iface->lock, flags);
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s6i2c_handle_interrupt(iface);
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if (--iface->timeout_count > 0) {
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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} else {
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complete(&iface->complete);
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
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}
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spin_unlock_irqrestore(&iface->lock, flags);
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}
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static int s6i2c_master_xfer(struct i2c_adapter *adap,
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struct i2c_msg *msgs, int num)
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{
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struct s6i2c_if *iface = adap->algo_data;
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int i;
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if (num == 0)
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return 0;
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if (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_ACTIVITY))
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yield();
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
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i2c_rd16(iface, S6_I2C_CLRINTR);
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for (i = 0; i < num; i++) {
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if (msgs[i].flags & I2C_M_TEN) {
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dev_err(&adap->dev,
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"s6i2c: 10 bits addr not supported\n");
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return -EINVAL;
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}
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if (msgs[i].len == 0) {
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dev_err(&adap->dev,
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"s6i2c: zero length message not supported\n");
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return -EINVAL;
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}
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if (msgs[i].addr != msgs[0].addr) {
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dev_err(&adap->dev,
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"s6i2c: multiple xfer cannot change target\n");
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return -EINVAL;
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}
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}
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iface->msgs = msgs;
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iface->msgs_num = num;
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iface->msgs_push = 0;
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iface->msgs_done = 0;
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iface->push = 0;
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iface->done = 0;
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iface->timeout_count = 10;
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i2c_wr16(iface, S6_I2C_TAR, msgs[0].addr);
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i2c_wr16(iface, S6_I2C_ENABLE, 1);
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i2c_wr16(iface, S6_I2C_INTRMASK, (1 << S6_I2C_INTR_TXEMPTY) |
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(1 << S6_I2C_INTR_TXABRT));
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iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
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add_timer(&iface->timeout_timer);
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wait_for_completion(&iface->complete);
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del_timer_sync(&iface->timeout_timer);
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while (i2c_rd32(iface, S6_I2C_TXFLR) > 0)
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schedule();
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while (i2c_rd16(iface, S6_I2C_STATUS) & (1 << S6_I2C_STATUS_ACTIVITY))
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schedule();
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
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i2c_wr16(iface, S6_I2C_ENABLE, 0);
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return iface->msgs_done;
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}
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static u32 s6i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static struct i2c_algorithm s6i2c_algorithm = {
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.master_xfer = s6i2c_master_xfer,
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.functionality = s6i2c_functionality,
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};
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static u16 __devinit nanoseconds_on_clk(struct s6i2c_if *iface, u32 ns)
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{
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u32 dividend = ((clk_get_rate(iface->clk) / 1000) * ns) / 1000000;
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if (dividend > 0xffff)
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return 0xffff;
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return dividend;
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}
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static int __devinit s6i2c_probe(struct platform_device *dev)
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{
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struct s6i2c_if *iface = &s6i2c_if;
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struct i2c_adapter *p_adap;
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const char *clock;
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int bus_num, rc;
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spin_lock_init(&iface->lock);
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init_completion(&iface->complete);
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iface->irq = platform_get_irq(dev, 0);
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if (iface->irq < 0) {
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rc = iface->irq;
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goto err_out;
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}
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iface->res = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!iface->res) {
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rc = -ENXIO;
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goto err_out;
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}
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iface->res = request_mem_region(iface->res->start,
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resource_size(iface->res),
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dev->dev.bus_id);
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if (!iface->res) {
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rc = -EBUSY;
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goto err_out;
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}
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iface->reg = ioremap_nocache(iface->res->start,
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resource_size(iface->res));
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if (!iface->reg) {
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rc = -ENOMEM;
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goto err_reg;
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}
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clock = 0;
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bus_num = -1;
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if (dev->dev.platform_data) {
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struct s6_i2c_platform_data *pdata = dev->dev.platform_data;
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bus_num = pdata->bus_num;
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clock = pdata->clock;
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}
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iface->clk = clk_get(&dev->dev, clock);
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if (IS_ERR(iface->clk)) {
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rc = PTR_ERR(iface->clk);
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goto err_map;
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}
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rc = clk_enable(iface->clk);
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if (rc < 0)
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goto err_clk_put;
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init_timer(&iface->timeout_timer);
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iface->timeout_timer.function = s6i2c_timeout;
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iface->timeout_timer.data = (unsigned long)iface;
|
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p_adap = &iface->adap;
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strlcpy(p_adap->name, dev->name, sizeof(p_adap->name));
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p_adap->algo = &s6i2c_algorithm;
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p_adap->algo_data = iface;
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p_adap->nr = bus_num;
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p_adap->class = 0;
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p_adap->dev.parent = &dev->dev;
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i2c_wr16(iface, S6_I2C_INTRMASK, 0);
|
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rc = request_irq(iface->irq, s6i2c_interrupt_entry,
|
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IRQF_SHARED, dev->name, iface);
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if (rc) {
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dev_err(&p_adap->dev, "s6i2c: cant get IRQ %d\n", iface->irq);
|
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goto err_clk_dis;
|
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}
|
||||
|
||||
i2c_wr16(iface, S6_I2C_ENABLE, 0);
|
||||
udelay(1);
|
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i2c_wr32(iface, S6_I2C_SRESET, 1 << S6_I2C_SRESET_IC_SRST);
|
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i2c_wr16(iface, S6_I2C_CLRTXABRT, 1);
|
||||
i2c_wr16(iface, S6_I2C_CON,
|
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(1 << S6_I2C_CON_MASTER) |
|
||||
(S6_I2C_CON_SPEED_NORMAL << S6_I2C_CON_SPEED) |
|
||||
(0 << S6_I2C_CON_10BITSLAVE) |
|
||||
(0 << S6_I2C_CON_10BITMASTER) |
|
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(1 << S6_I2C_CON_RESTARTENA) |
|
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(1 << S6_I2C_CON_SLAVEDISABLE));
|
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i2c_wr16(iface, S6_I2C_SSHCNT, nanoseconds_on_clk(iface, 4000));
|
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i2c_wr16(iface, S6_I2C_SSLCNT, nanoseconds_on_clk(iface, 4700));
|
||||
i2c_wr16(iface, S6_I2C_FSHCNT, nanoseconds_on_clk(iface, 600));
|
||||
i2c_wr16(iface, S6_I2C_FSLCNT, nanoseconds_on_clk(iface, 1300));
|
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i2c_wr16(iface, S6_I2C_RXTL, 0);
|
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i2c_wr16(iface, S6_I2C_TXTL, 0);
|
||||
|
||||
platform_set_drvdata(dev, iface);
|
||||
if (bus_num < 0)
|
||||
rc = i2c_add_adapter(p_adap);
|
||||
else
|
||||
rc = i2c_add_numbered_adapter(p_adap);
|
||||
if (rc)
|
||||
goto err_irq_free;
|
||||
return 0;
|
||||
|
||||
err_irq_free:
|
||||
free_irq(iface->irq, iface);
|
||||
err_clk_dis:
|
||||
clk_disable(iface->clk);
|
||||
err_clk_put:
|
||||
clk_put(iface->clk);
|
||||
err_map:
|
||||
iounmap(iface->reg);
|
||||
err_reg:
|
||||
release_mem_region(iface->res->start,
|
||||
resource_size(iface->res));
|
||||
err_out:
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int __devexit s6i2c_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct s6i2c_if *iface = platform_get_drvdata(pdev);
|
||||
i2c_wr16(iface, S6_I2C_ENABLE, 0);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
i2c_del_adapter(&iface->adap);
|
||||
free_irq(iface->irq, iface);
|
||||
clk_disable(iface->clk);
|
||||
clk_put(iface->clk);
|
||||
iounmap(iface->reg);
|
||||
release_mem_region(iface->res->start,
|
||||
resource_size(iface->res));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver s6i2c_driver = {
|
||||
.probe = s6i2c_probe,
|
||||
.remove = __devexit_p(s6i2c_remove),
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init s6i2c_init(void)
|
||||
{
|
||||
pr_info("I2C: S6000 I2C driver\n");
|
||||
return platform_driver_register(&s6i2c_driver);
|
||||
}
|
||||
|
||||
static void __exit s6i2c_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&s6i2c_driver);
|
||||
}
|
||||
|
||||
MODULE_DESCRIPTION("I2C-Bus adapter routines for S6000 I2C");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
|
||||
subsys_initcall(s6i2c_init);
|
||||
module_exit(s6i2c_exit);
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* drivers/i2c/busses/i2c-s6000.h
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Emlix GmbH <info@emlix.com>
|
||||
* Author: Oskar Schirmer <os@emlix.com>
|
||||
*/
|
||||
|
||||
#ifndef __DRIVERS_I2C_BUSSES_I2C_S6000_H
|
||||
#define __DRIVERS_I2C_BUSSES_I2C_S6000_H
|
||||
|
||||
#define S6_I2C_CON 0x000
|
||||
#define S6_I2C_CON_MASTER 0
|
||||
#define S6_I2C_CON_SPEED 1
|
||||
#define S6_I2C_CON_SPEED_NORMAL 1
|
||||
#define S6_I2C_CON_SPEED_FAST 2
|
||||
#define S6_I2C_CON_SPEED_MASK 3
|
||||
#define S6_I2C_CON_10BITSLAVE 3
|
||||
#define S6_I2C_CON_10BITMASTER 4
|
||||
#define S6_I2C_CON_RESTARTENA 5
|
||||
#define S6_I2C_CON_SLAVEDISABLE 6
|
||||
#define S6_I2C_TAR 0x004
|
||||
#define S6_I2C_TAR_GCORSTART 10
|
||||
#define S6_I2C_TAR_SPECIAL 11
|
||||
#define S6_I2C_SAR 0x008
|
||||
#define S6_I2C_HSMADDR 0x00C
|
||||
#define S6_I2C_DATACMD 0x010
|
||||
#define S6_I2C_DATACMD_READ 8
|
||||
#define S6_I2C_SSHCNT 0x014
|
||||
#define S6_I2C_SSLCNT 0x018
|
||||
#define S6_I2C_FSHCNT 0x01C
|
||||
#define S6_I2C_FSLCNT 0x020
|
||||
#define S6_I2C_INTRSTAT 0x02C
|
||||
#define S6_I2C_INTRMASK 0x030
|
||||
#define S6_I2C_RAWINTR 0x034
|
||||
#define S6_I2C_INTR_RXUNDER 0
|
||||
#define S6_I2C_INTR_RXOVER 1
|
||||
#define S6_I2C_INTR_RXFULL 2
|
||||
#define S6_I2C_INTR_TXOVER 3
|
||||
#define S6_I2C_INTR_TXEMPTY 4
|
||||
#define S6_I2C_INTR_RDREQ 5
|
||||
#define S6_I2C_INTR_TXABRT 6
|
||||
#define S6_I2C_INTR_RXDONE 7
|
||||
#define S6_I2C_INTR_ACTIVITY 8
|
||||
#define S6_I2C_INTR_STOPDET 9
|
||||
#define S6_I2C_INTR_STARTDET 10
|
||||
#define S6_I2C_INTR_GENCALL 11
|
||||
#define S6_I2C_RXTL 0x038
|
||||
#define S6_I2C_TXTL 0x03C
|
||||
#define S6_I2C_CLRINTR 0x040
|
||||
#define S6_I2C_CLRRXUNDER 0x044
|
||||
#define S6_I2C_CLRRXOVER 0x048
|
||||
#define S6_I2C_CLRTXOVER 0x04C
|
||||
#define S6_I2C_CLRRDREQ 0x050
|
||||
#define S6_I2C_CLRTXABRT 0x054
|
||||
#define S6_I2C_CLRRXDONE 0x058
|
||||
#define S6_I2C_CLRACTIVITY 0x05C
|
||||
#define S6_I2C_CLRSTOPDET 0x060
|
||||
#define S6_I2C_CLRSTARTDET 0x064
|
||||
#define S6_I2C_CLRGENCALL 0x068
|
||||
#define S6_I2C_ENABLE 0x06C
|
||||
#define S6_I2C_STATUS 0x070
|
||||
#define S6_I2C_STATUS_ACTIVITY 0
|
||||
#define S6_I2C_STATUS_TFNF 1
|
||||
#define S6_I2C_STATUS_TFE 2
|
||||
#define S6_I2C_STATUS_RFNE 3
|
||||
#define S6_I2C_STATUS_RFF 4
|
||||
#define S6_I2C_TXFLR 0x074
|
||||
#define S6_I2C_RXFLR 0x078
|
||||
#define S6_I2C_SRESET 0x07C
|
||||
#define S6_I2C_SRESET_IC_SRST 0
|
||||
#define S6_I2C_SRESET_IC_MASTER_SRST 1
|
||||
#define S6_I2C_SRESET_IC_SLAVE_SRST 2
|
||||
#define S6_I2C_TXABRTSOURCE 0x080
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __LINUX_I2C_S6000_H
|
||||
#define __LINUX_I2C_S6000_H
|
||||
|
||||
struct s6_i2c_platform_data {
|
||||
const char *clock; /* the clock to use */
|
||||
int bus_num; /* the bus number to register */
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
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