ACPI: restore comment justifying 'extra' P_LVLx access
While trying to look for superfluous I/O accesses that can be optimized away, I stumbled upon this ACPI sleep I/O access and couldn't figure out why the hell this dummy op was necessary. After more than one hour of internet research, I had collected a sufficient number of documents (among those very old kernel versions) that finally told me what this dummy read was about: STPCLK# doesn't get asserted in time on (some) chipsets, which is why we need to have a dummy I/O read to delay further instruction processing until the CPU is fully stopped. Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -365,7 +365,9 @@ static void acpi_processor_idle(void)
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C2 */
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/* Invoke C2 */
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inb(cx->address);
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inb(cx->address);
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/* Dummy op - must do something useless after P_LVL2 read */
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/* Dummy wait op - must do something useless after P_LVL2 read
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because chipsets cannot guarantee that STPCLK# signal
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gets asserted in time to freeze execution properly. */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Get end time (ticks) */
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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@ -403,7 +405,7 @@ static void acpi_processor_idle(void)
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C3 */
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/* Invoke C3 */
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inb(cx->address);
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inb(cx->address);
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/* Dummy op - must do something useless after P_LVL3 read */
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/* Dummy wait op (see above) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Get end time (ticks) */
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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