mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
In current implementation omap3_init_bch_tail() is a common function to
define ecc layout for different BCHx ecc schemes.This patch:
(1) removes omap3_init_bch_tail() and defines ecc layout for individual
ecc-schemes along with populating their nand_chip->ecc data in
omap_nand_probe(). This improves the readability and scalability of
code for add new ecc schemes in future.
(2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default
nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices).
(3) add the check to see if NAND device has enough OOB/Spare bytes to
store ECC signature of whole page, as defined by ecc-scheme.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Pekon Gupta
Brian Norris
Родитель
a919e51161
Коммит
b491da7233
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@ -139,6 +139,7 @@
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#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
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#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
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#define BADBLOCK_MARKER_LENGTH 2
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#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
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#ifdef CONFIG_MTD_NAND_OMAP_BCH
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@ -149,17 +150,6 @@ static u_char bch4_vector[] = {0x00, 0x6b, 0x31, 0xdd, 0x41, 0xbc, 0x10};
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/* oob info generated runtime depending on ecc algorithm and layout selected */
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static struct nand_ecclayout omap_oobinfo;
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/* Define some generic bad / good block scan pattern which are used
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* while scanning a device for factory marked good / bad blocks
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*/
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static uint8_t scan_ff_pattern[] = { 0xff };
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static struct nand_bbt_descr bb_descrip_flashbased = {
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.options = NAND_BBT_SCANALLPAGES,
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.offs = 0,
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.len = 1,
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.pattern = scan_ff_pattern,
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};
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struct omap_nand_info {
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struct nand_hw_control controller;
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@ -184,7 +174,6 @@ struct omap_nand_info {
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struct gpmc_nand_regs reg;
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/* fields specific for BCHx_HW ECC scheme */
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struct bch_control *bch;
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struct nand_ecclayout ecclayout;
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bool is_elm_used;
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struct device *elm_dev;
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struct device_node *of_node;
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@ -1686,65 +1675,8 @@ static void omap3_free_bch(struct mtd_info *mtd)
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}
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}
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/**
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* omap3_init_bch_tail - Build an oob layout for BCH ECC correction.
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* @mtd: MTD device structure
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*/
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static int omap3_init_bch_tail(struct mtd_info *mtd)
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{
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int i, steps, offset;
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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struct nand_ecclayout *layout = &info->ecclayout;
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/* build oob layout */
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steps = mtd->writesize/info->nand.ecc.size;
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layout->eccbytes = steps*info->nand.ecc.bytes;
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/* do not bother creating special oob layouts for small page devices */
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if (mtd->oobsize < 64) {
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pr_err("BCH ecc is not supported on small page devices\n");
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goto fail;
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}
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/* reserve 2 bytes for bad block marker */
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if (layout->eccbytes+2 > mtd->oobsize) {
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pr_err("no oob layout available for oobsize %d eccbytes %u\n",
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mtd->oobsize, layout->eccbytes);
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goto fail;
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}
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/* ECC layout compatible with RBL for BCH8 */
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if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
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offset = 2;
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else
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offset = mtd->oobsize - layout->eccbytes;
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/* put ecc bytes at oob tail */
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for (i = 0; i < layout->eccbytes; i++)
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layout->eccpos[i] = offset + i;
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if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
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layout->oobfree[0].offset = 2 + layout->eccbytes * steps;
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else
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layout->oobfree[0].offset = 2;
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layout->oobfree[0].length = mtd->oobsize-2-layout->eccbytes;
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info->nand.ecc.layout = layout;
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if (!(info->nand.options & NAND_BUSWIDTH_16))
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info->nand.badblock_pattern = &bb_descrip_flashbased;
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return 0;
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fail:
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omap3_free_bch(mtd);
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return -1;
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}
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#else
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static int omap3_init_bch_tail(struct mtd_info *mtd)
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{
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return -1;
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}
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static void omap3_free_bch(struct mtd_info *mtd)
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{
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}
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@ -1756,8 +1688,9 @@ static int omap_nand_probe(struct platform_device *pdev)
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struct omap_nand_platform_data *pdata;
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struct mtd_info *mtd;
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struct nand_chip *nand_chip;
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struct nand_ecclayout *ecclayout;
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int err;
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int i, offset;
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int i;
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dma_cap_mask_t mask;
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unsigned sig;
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struct resource *res;
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@ -1840,6 +1773,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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goto out_release_mem_region;
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}
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/* check for small page devices */
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if ((mtd->oobsize < 64) && (pdata->ecc_opt != OMAP_ECC_HAM1_CODE_HW)) {
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pr_err("small page devices are not supported\n");
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err = -EINVAL;
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goto out_release_mem_region;
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}
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/* re-populate low-level callbacks based on xfer modes */
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switch (pdata->xfer_type) {
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case NAND_OMAP_PREFETCH_POLLED:
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@ -1931,6 +1871,8 @@ static int omap_nand_probe(struct platform_device *pdev)
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}
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/* populate MTD interface based on ECC scheme */
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nand_chip->ecc.layout = &omap_oobinfo;
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ecclayout = &omap_oobinfo;
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switch (pdata->ecc_opt) {
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case OMAP_ECC_HAM1_CODE_HW:
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pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
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@ -1941,6 +1883,16 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.calculate = omap_calculate_ecc;
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nand_chip->ecc.hwctl = omap_enable_hwecc;
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nand_chip->ecc.correct = omap_correct_data;
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/* define ECC layout */
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ecclayout->eccbytes = nand_chip->ecc.bytes *
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(mtd->writesize /
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nand_chip->ecc.size);
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if (nand_chip->options & NAND_BUSWIDTH_16)
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ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
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else
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ecclayout->eccpos[0] = 1;
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ecclayout->oobfree->offset = ecclayout->eccpos[0] +
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ecclayout->eccbytes;
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break;
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case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
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@ -1953,6 +1905,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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nand_chip->ecc.correct = omap3_correct_data_bch;
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nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
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/* define ECC layout */
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ecclayout->eccbytes = nand_chip->ecc.bytes *
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(mtd->writesize /
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nand_chip->ecc.size);
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ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree->offset = ecclayout->eccpos[0] +
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ecclayout->eccbytes;
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/* software bch library is used for locating errors */
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info->bch = init_bch(nand_chip->ecc.bytes,
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nand_chip->ecc.strength,
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@ -1981,6 +1940,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
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nand_chip->ecc.read_page = omap_read_page_bch;
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nand_chip->ecc.write_page = omap_write_page_bch;
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/* define ECC layout */
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ecclayout->eccbytes = nand_chip->ecc.bytes *
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(mtd->writesize /
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nand_chip->ecc.size);
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ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree->offset = ecclayout->eccpos[0] +
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ecclayout->eccbytes;
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/* This ECC scheme requires ELM H/W block */
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if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
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pr_err("nand: error: could not initialize ELM\n");
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@ -2004,6 +1970,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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nand_chip->ecc.correct = omap3_correct_data_bch;
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nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
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/* define ECC layout */
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ecclayout->eccbytes = nand_chip->ecc.bytes *
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(mtd->writesize /
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nand_chip->ecc.size);
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ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree->offset = ecclayout->eccpos[0] +
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ecclayout->eccbytes;
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/* software bch library is used for locating errors */
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info->bch = init_bch(nand_chip->ecc.bytes,
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nand_chip->ecc.strength,
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@ -2038,6 +2011,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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pr_err("nand: error: could not initialize ELM\n");
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goto out_release_mem_region;
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}
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/* define ECC layout */
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ecclayout->eccbytes = nand_chip->ecc.bytes *
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(mtd->writesize /
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nand_chip->ecc.size);
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ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
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ecclayout->oobfree->offset = ecclayout->eccpos[0] +
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ecclayout->eccbytes;
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break;
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#else
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pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
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@ -2051,34 +2031,17 @@ static int omap_nand_probe(struct platform_device *pdev)
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goto out_release_mem_region;
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}
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/* rom code layout */
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if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
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if (nand_chip->options & NAND_BUSWIDTH_16) {
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offset = 2;
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} else {
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offset = 1;
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nand_chip->badblock_pattern = &bb_descrip_flashbased;
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}
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omap_oobinfo.eccbytes = 3 * (mtd->writesize / 512);
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for (i = 0; i < omap_oobinfo.eccbytes; i++)
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omap_oobinfo.eccpos[i] = i+offset;
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omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
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omap_oobinfo.oobfree->length = mtd->oobsize -
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(offset + omap_oobinfo.eccbytes);
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nand_chip->ecc.layout = &omap_oobinfo;
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} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
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(pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
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(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) ||
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(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
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/* build OOB layout for BCH ECC correction */
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err = omap3_init_bch_tail(mtd);
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if (err) {
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err = -EINVAL;
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goto out_release_mem_region;
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}
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/* populate remaining ECC layout data */
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ecclayout->oobfree->length = mtd->oobsize - (BADBLOCK_MARKER_LENGTH +
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ecclayout->eccbytes);
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for (i = 1; i < ecclayout->eccbytes; i++)
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ecclayout->eccpos[i] = ecclayout->eccpos[0] + i;
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/* check if NAND device's OOB is enough to store ECC signatures */
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if (mtd->oobsize < (ecclayout->eccbytes + BADBLOCK_MARKER_LENGTH)) {
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pr_err("not enough OOB bytes required = %d, available=%d\n",
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ecclayout->eccbytes, mtd->oobsize);
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err = -EINVAL;
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goto out_release_mem_region;
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}
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/* second phase scan */
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