media: ti-vpe: cal: Don't pass format to cal_ctx_wr_dma_config()
The cal_ctx_wr_dma_config() function has access to the context, there's no need to give it format-related values retrieved from the context. Access the values internally, and reword internal comments. The comment regarding the CAL_WR_DMA_OFST register not being well understood is dropped, as the datasheet explicitly documents it as "Offset between two consecutive line starts". Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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cc548febd2
Коммит
b496dc9071
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@ -516,8 +516,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count)
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cal_ctx_csi2_config(ctx);
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cal_ctx_pix_proc_config(ctx);
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cal_ctx_wr_dma_config(ctx, ctx->v_fmt.fmt.pix.bytesperline,
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ctx->v_fmt.fmt.pix.height);
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cal_ctx_wr_dma_config(ctx);
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cal_camerarx_enable_irqs(ctx->phy);
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@ -356,14 +356,15 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx)
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cal_read(ctx->cal, CAL_PIX_PROC(ctx->index)));
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}
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void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
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unsigned int height)
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void cal_ctx_wr_dma_config(struct cal_ctx *ctx)
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{
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unsigned int stride = ctx->v_fmt.fmt.pix.bytesperline;
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u32 val;
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val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index));
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cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK);
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cal_set_field(&val, height, CAL_WR_DMA_CTRL_YSIZE_MASK);
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cal_set_field(&val, ctx->v_fmt.fmt.pix.height,
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CAL_WR_DMA_CTRL_YSIZE_MASK);
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cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT,
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CAL_WR_DMA_CTRL_DTAG_MASK);
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cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST,
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@ -375,14 +376,8 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
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ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)));
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/*
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* width/16 not sure but giving it a whirl.
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* zero does not work right
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*/
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cal_write_field(ctx->cal,
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CAL_WR_DMA_OFST(ctx->index),
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(width / 16),
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CAL_WR_DMA_OFST_MASK);
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cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->index),
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stride / 16, CAL_WR_DMA_OFST_MASK);
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ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index)));
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@ -390,11 +385,11 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
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/* 64 bit word means no skipping */
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cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK);
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/*
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* (width*8)/64 this should be size of an entire line
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* in 64bit word but 0 means all data until the end
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* is detected automagically
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* The XSIZE field is expressed in 64-bit units and prevents overflows
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* in case of synchronization issues by limiting the number of bytes
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* written per line.
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*/
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cal_set_field(&val, (width / 8), CAL_WR_DMA_XSIZE_MASK);
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cal_set_field(&val, stride / 8, CAL_WR_DMA_XSIZE_MASK);
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cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val);
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ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index)));
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@ -273,8 +273,7 @@ void cal_camerarx_destroy(struct cal_camerarx *phy);
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void cal_ctx_csi2_config(struct cal_ctx *ctx);
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void cal_ctx_pix_proc_config(struct cal_ctx *ctx);
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void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
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unsigned int height);
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void cal_ctx_wr_dma_config(struct cal_ctx *ctx);
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void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr);
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int cal_ctx_v4l2_register(struct cal_ctx *ctx);
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