kvm: x86: Disable interception for IA32_XFD on demand
Always intercepting IA32_XFD causes non-negligible overhead when this register is updated frequently in the guest. Disable r/w emulation after intercepting the first WRMSR(IA32_XFD) with a non-zero value. Disable WRMSR emulation implies that IA32_XFD becomes out-of-sync with the software states in fpstate and the per-cpu xfd cache. This leads to two additional changes accordingly: - Call fpu_sync_guest_vmexit_xfd_state() after vm-exit to bring software states back in-sync with the MSR, before handle_exit_irqoff() is called. - Always trap #NM once write interception is disabled for IA32_XFD. The #NM exception is rare if the guest doesn't use dynamic features. Otherwise, there is at most one exception per guest task given a dynamic feature. p.s. We have confirmed that SDM is being revised to say that when setting IA32_XFD[18] the AMX register state is not guaranteed to be preserved. This clarification avoids adding mess for a creative guest which sets IA32_XFD[18]=1 before saving active AMX state to its own storage. Signed-off-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Jing Liu <jing2.liu@intel.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20220105123532.12586-22-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -647,6 +647,7 @@ struct kvm_vcpu_arch {
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u64 smi_count;
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bool tpr_access_reporting;
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bool xsaves_enabled;
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bool xfd_no_write_intercept;
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u64 ia32_xss;
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u64 microcode_version;
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u64 arch_capabilities;
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@ -162,6 +162,7 @@ static u32 vmx_possible_passthrough_msrs[MAX_POSSIBLE_PASSTHROUGH_MSRS] = {
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MSR_FS_BASE,
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MSR_GS_BASE,
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MSR_KERNEL_GS_BASE,
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MSR_IA32_XFD,
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MSR_IA32_XFD_ERR,
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#endif
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MSR_IA32_SYSENTER_CS,
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@ -764,10 +765,11 @@ void vmx_update_exception_bitmap(struct kvm_vcpu *vcpu)
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}
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/*
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* Trap #NM if guest xfd contains a non-zero value so guest XFD_ERR
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* can be saved timely.
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* Disabling xfd interception indicates that dynamic xfeatures
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* might be used in the guest. Always trap #NM in this case
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* to save guest xfd_err timely.
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*/
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if (vcpu->arch.guest_fpu.fpstate->xfd)
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if (vcpu->arch.xfd_no_write_intercept)
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eb |= (1u << NM_VECTOR);
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vmcs_write32(EXCEPTION_BITMAP, eb);
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@ -1978,9 +1980,21 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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break;
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case MSR_IA32_XFD:
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ret = kvm_set_msr_common(vcpu, msr_info);
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/* Update #NM interception according to guest xfd */
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if (!ret)
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/*
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* Always intercepting WRMSR could incur non-negligible
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* overhead given xfd might be changed frequently in
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* guest context switch. Disable write interception
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* upon the first write with a non-zero value (indicating
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* potential usage on dynamic xfeatures). Also update
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* exception bitmap to trap #NM for proper virtualization
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* of guest xfd_err.
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*/
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if (!ret && data) {
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vmx_disable_intercept_for_msr(vcpu, MSR_IA32_XFD,
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MSR_TYPE_RW);
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vcpu->arch.xfd_no_write_intercept = true;
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vmx_update_exception_bitmap(vcpu);
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}
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break;
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#endif
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case MSR_IA32_SYSENTER_CS:
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@ -349,7 +349,7 @@ struct vcpu_vmx {
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struct lbr_desc lbr_desc;
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/* Save desired MSR intercept (read: pass-through) state */
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#define MAX_POSSIBLE_PASSTHROUGH_MSRS 14
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#define MAX_POSSIBLE_PASSTHROUGH_MSRS 15
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struct {
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DECLARE_BITMAP(read, MAX_POSSIBLE_PASSTHROUGH_MSRS);
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DECLARE_BITMAP(write, MAX_POSSIBLE_PASSTHROUGH_MSRS);
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@ -10083,6 +10083,14 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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vcpu->mode = OUTSIDE_GUEST_MODE;
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smp_wmb();
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/*
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* Sync xfd before calling handle_exit_irqoff() which may
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* rely on the fact that guest_fpu::xfd is up-to-date (e.g.
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* in #NM irqoff handler).
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*/
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if (vcpu->arch.xfd_no_write_intercept)
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fpu_sync_guest_vmexit_xfd_state();
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static_call(kvm_x86_handle_exit_irqoff)(vcpu);
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if (vcpu->arch.guest_fpu.xfd_err)
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