firmware: stratix10-svc: extend svc to support new RSU features
Extend Intel Stratix10 service layer driver to support new RSU notify and MAX_RETRY with watchdog event. RSU is used to provide our customers with protection against loading bad bitstream onto their devices when those devices are booting from flash RSU notifies provides users with an API to notify the firmware of the state of hard processor system. To deal with watchdog event, RSU provides a way for user to retry the current running image several times before giving up and starting normal RSU failover flow. Signed-off-by: Richard Gong <richard.gong@intel.com> Reviewed-by: Alan Tull <atull@kernel.org> Link: https://lore.kernel.org/r/1567516701-26026-2-git-send-email-richard.gong@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Richard Gong
Greg Kroah-Hartman
Родитель
1798045900
Коммит
b5dc75c915
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@ -38,12 +38,23 @@
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#define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 200
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#define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30
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/* stratix10 service layer clients */
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#define STRATIX10_RSU "stratix10-rsu"
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typedef void (svc_invoke_fn)(unsigned long, unsigned long, unsigned long,
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unsigned long, unsigned long, unsigned long,
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unsigned long, unsigned long,
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struct arm_smccc_res *);
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struct stratix10_svc_chan;
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/**
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* struct stratix10_svc - svc private data
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* @stratix10_svc_rsu: pointer to stratix10 RSU device
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*/
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struct stratix10_svc {
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struct platform_device *stratix10_svc_rsu;
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};
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/**
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* struct stratix10_svc_sh_memory - service shared memory structure
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* @sync_complete: state for a completion
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@ -296,8 +307,13 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
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cb_data->status = BIT(SVC_STATUS_RECONFIG_COMPLETED);
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break;
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case COMMAND_RSU_UPDATE:
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case COMMAND_RSU_NOTIFY:
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cb_data->status = BIT(SVC_STATUS_RSU_OK);
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break;
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case COMMAND_RSU_RETRY:
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cb_data->status = BIT(SVC_STATUS_RSU_OK);
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cb_data->kaddr1 = &res.a1;
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break;
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default:
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pr_warn("it shouldn't happen\n");
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break;
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@ -386,6 +402,16 @@ static int svc_normal_to_secure_thread(void *data)
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a1 = pdata->arg[0];
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a2 = 0;
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break;
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case COMMAND_RSU_NOTIFY:
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a0 = INTEL_SIP_SMC_RSU_NOTIFY;
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a1 = pdata->arg[0];
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a2 = 0;
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break;
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case COMMAND_RSU_RETRY:
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a0 = INTEL_SIP_SMC_RSU_RETRY_COUNTER;
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a1 = 0;
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a2 = 0;
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break;
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default:
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pr_warn("it shouldn't happen\n");
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break;
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@ -438,7 +464,28 @@ static int svc_normal_to_secure_thread(void *data)
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pr_debug("%s: STATUS_REJECTED\n", __func__);
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break;
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case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR:
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case INTEL_SIP_SMC_RSU_ERROR:
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pr_err("%s: STATUS_ERROR\n", __func__);
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switch (pdata->command) {
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/* for FPGA mgr */
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case COMMAND_RECONFIG_DATA_CLAIM:
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case COMMAND_RECONFIG:
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case COMMAND_RECONFIG_DATA_SUBMIT:
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case COMMAND_RECONFIG_STATUS:
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cbdata->status =
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BIT(SVC_STATUS_RECONFIG_ERROR);
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break;
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/* for RSU */
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case COMMAND_RSU_STATUS:
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case COMMAND_RSU_UPDATE:
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case COMMAND_RSU_NOTIFY:
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case COMMAND_RSU_RETRY:
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cbdata->status =
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BIT(SVC_STATUS_RSU_ERROR);
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break;
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}
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cbdata->status = BIT(SVC_STATUS_RECONFIG_ERROR);
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cbdata->kaddr1 = NULL;
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cbdata->kaddr2 = NULL;
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@ -530,7 +577,7 @@ static int svc_get_sh_memory(struct platform_device *pdev,
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if (!sh_memory->addr || !sh_memory->size) {
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dev_err(dev,
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"fails to get shared memory info from secure world\n");
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"failed to get shared memory info from secure world\n");
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return -ENOMEM;
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}
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@ -768,7 +815,7 @@ int stratix10_svc_send(struct stratix10_svc_chan *chan, void *msg)
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"svc_smc_hvc_thread");
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if (IS_ERR(chan->ctrl->task)) {
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dev_err(chan->ctrl->dev,
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"fails to create svc_smc_hvc_thread\n");
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"failed to create svc_smc_hvc_thread\n");
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kfree(p_data);
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return -EINVAL;
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}
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@ -913,6 +960,8 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
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struct stratix10_svc_chan *chans;
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struct gen_pool *genpool;
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struct stratix10_svc_sh_memory *sh_memory;
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struct stratix10_svc *svc;
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svc_invoke_fn *invoke_fn;
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size_t fifo_size;
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int ret;
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@ -957,7 +1006,7 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
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fifo_size = sizeof(struct stratix10_svc_data) * SVC_NUM_DATA_IN_FIFO;
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ret = kfifo_alloc(&controller->svc_fifo, fifo_size, GFP_KERNEL);
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if (ret) {
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dev_err(dev, "fails to allocate FIFO\n");
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dev_err(dev, "failed to allocate FIFO\n");
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return ret;
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}
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spin_lock_init(&controller->svc_fifo_lock);
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@ -975,6 +1024,24 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
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list_add_tail(&controller->node, &svc_ctrl);
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platform_set_drvdata(pdev, controller);
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/* add svc client device(s) */
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svc = devm_kzalloc(dev, sizeof(*svc), GFP_KERNEL);
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if (!svc)
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return -ENOMEM;
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svc->stratix10_svc_rsu = platform_device_alloc(STRATIX10_RSU, 0);
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if (!svc->stratix10_svc_rsu) {
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dev_err(dev, "failed to allocate %s device\n", STRATIX10_RSU);
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return -ENOMEM;
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}
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ret = platform_device_add(svc->stratix10_svc_rsu);
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if (ret) {
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platform_device_put(svc->stratix10_svc_rsu);
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return ret;
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}
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dev_set_drvdata(dev, svc);
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pr_info("Intel Service Layer Driver Initialized\n");
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return ret;
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@ -982,8 +1049,11 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
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static int stratix10_svc_drv_remove(struct platform_device *pdev)
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{
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struct stratix10_svc *svc = dev_get_drvdata(&pdev->dev);
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struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
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platform_device_unregister(svc->stratix10_svc_rsu);
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kfifo_free(&ctrl->svc_fifo);
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if (ctrl->task) {
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kthread_stop(ctrl->task);
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@ -210,7 +210,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
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/*
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/**
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* Request INTEL_SIP_SMC_REG_READ
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*
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* Read a protected register at EL3
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@ -229,7 +229,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_REG_READ \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
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/*
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/**
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* Request INTEL_SIP_SMC_REG_WRITE
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*
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* Write a protected register at EL3
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@ -248,7 +248,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_REG_WRITE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
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/*
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/**
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* Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
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*
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* Update one or more bits in a protected register at EL3 using a
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@ -269,7 +269,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_REG_UPDATE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
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/*
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/**
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* Request INTEL_SIP_SMC_RSU_STATUS
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*
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* Request remote status update boot log, call is synchronous.
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@ -292,7 +292,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_RSU_STATUS \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
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/*
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/**
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* Request INTEL_SIP_SMC_RSU_UPDATE
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*
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* Request to set the offset of the bitstream to boot after reboot, call
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@ -310,7 +310,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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#define INTEL_SIP_SMC_RSU_UPDATE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
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/*
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/**
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* Request INTEL_SIP_SMC_ECC_DBE
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*
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* Sync call used by service driver at EL1 to alert EL3 that a Double
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@ -329,3 +329,42 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
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#endif
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/**
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* Request INTEL_SIP_SMC_RSU_NOTIFY
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*
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* Sync call used by service driver at EL1 to report hard processor
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* system execution stage to firmware
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_NOTIFY
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* a1 32bit value representing hard processor system execution stage
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* a2-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
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#define INTEL_SIP_SMC_RSU_NOTIFY \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
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/**
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* Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
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*
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* Sync call used by service driver at EL1 to query RSU retry counter
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
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* a1-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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* a1 the retry counter
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*
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* Or
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*
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* a0 INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
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#define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
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@ -95,6 +95,13 @@ struct stratix10_svc_chan;
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*
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* @COMMAND_RSU_UPDATE: set the offset of the bitstream to boot after reboot,
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* return status is SVC_STATUS_RSU_OK or SVC_STATUS_RSU_ERROR
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*
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* @COMMAND_RSU_NOTIFY: report the status of hard processor system
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* software to firmware, return status is SVC_STATUS_RSU_OK or
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* SVC_STATUS_RSU_ERROR
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*
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* @COMMAND_RSU_RETRY: query firmware for the current image's retry counter,
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* return status is SVC_STATUS_RSU_OK or SVC_STATUS_RSU_ERROR
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*/
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enum stratix10_svc_command_code {
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COMMAND_NOOP = 0,
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@ -103,7 +110,9 @@ enum stratix10_svc_command_code {
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COMMAND_RECONFIG_DATA_CLAIM,
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COMMAND_RECONFIG_STATUS,
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COMMAND_RSU_STATUS,
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COMMAND_RSU_UPDATE
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COMMAND_RSU_UPDATE,
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COMMAND_RSU_NOTIFY,
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COMMAND_RSU_RETRY,
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};
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/**
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