[SCSI] hpsa: add ioaccel mode 2 structure definitions
Signed-off-by: Mike Miller <michael.miller@canonical.com> Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Родитель
0e7a7fcea0
Коммит
b66cc250ee
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@ -6133,6 +6133,28 @@ static void __exit hpsa_cleanup(void)
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static void __attribute__((unused)) verify_offsets(void)
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{
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#define VERIFY_OFFSET(member, offset) \
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BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
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VERIFY_OFFSET(IU_type, 0);
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VERIFY_OFFSET(direction, 1);
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VERIFY_OFFSET(reply_queue, 2);
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/* VERIFY_OFFSET(reserved1, 3); */
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VERIFY_OFFSET(scsi_nexus, 4);
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VERIFY_OFFSET(Tag, 8);
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VERIFY_OFFSET(cdb, 16);
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VERIFY_OFFSET(cciss_lun, 32);
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VERIFY_OFFSET(data_len, 40);
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VERIFY_OFFSET(cmd_priority_task_attr, 44);
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VERIFY_OFFSET(sg_count, 45);
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/* VERIFY_OFFSET(reserved3 */
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VERIFY_OFFSET(err_ptr, 48);
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VERIFY_OFFSET(err_len, 56);
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/* VERIFY_OFFSET(reserved4 */
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VERIFY_OFFSET(sg, 64);
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#undef VERIFY_OFFSET
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#define VERIFY_OFFSET(member, offset) \
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BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
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@ -258,6 +258,14 @@ struct ctlr_info {
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#define HPSA_INTR_ON 1
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#define HPSA_INTR_OFF 0
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/*
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* Inbound Post Queue offsets for IO Accelerator Mode 2
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*/
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#define IOACCEL2_INBOUND_POSTQ_32 0x48
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#define IOACCEL2_INBOUND_POSTQ_64_LOW 0xd0
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#define IOACCEL2_INBOUND_POSTQ_64_HI 0xd4
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/*
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Send the command to the hardware
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*/
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@ -332,6 +332,7 @@ struct ErrorInfo {
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#define CMD_IOCTL_PEND 0x01
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#define CMD_SCSI 0x03
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#define CMD_IOACCEL1 0x04
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#define CMD_IOACCEL2 0x05
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#define DIRECT_LOOKUP_SHIFT 5
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#define DIRECT_LOOKUP_BIT 0x10
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@ -384,6 +385,7 @@ struct CommandList {
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/* Max S/G elements in I/O accelerator command */
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#define IOACCEL1_MAXSGENTRIES 24
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#define IOACCEL2_MAXSGENTRIES 28
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/*
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* Structure for I/O accelerator (mode 1) commands.
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@ -444,6 +446,103 @@ struct io_accel1_cmd {
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#define IOACCEL1_BUSADDR_CMDTYPE 0x00000060
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struct ioaccel2_sg_element {
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u64 address;
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u32 length;
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u8 reserved[3];
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u8 chain_indicator;
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#define IOACCEL2_CHAIN 0x80
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};
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/*
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* SCSI Response Format structure for IO Accelerator Mode 2
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*/
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struct io_accel2_scsi_response {
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u8 IU_type;
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#define IOACCEL2_IU_TYPE_SRF 0x60
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u8 reserved1[3];
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u8 req_id[4]; /* request identifier */
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u8 reserved2[4];
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u8 serv_response; /* service response */
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#define IOACCEL2_SERV_RESPONSE_COMPLETE 0x000
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#define IOACCEL2_SERV_RESPONSE_FAILURE 0x001
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#define IOACCEL2_SERV_RESPONSE_TMF_COMPLETE 0x002
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#define IOACCEL2_SERV_RESPONSE_TMF_SUCCESS 0x003
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#define IOACCEL2_SERV_RESPONSE_TMF_REJECTED 0x004
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#define IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN 0x005
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u8 status; /* status */
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#define IOACCEL2_STATUS_SR_TASK_COMP_GOOD 0x00
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#define IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND 0x02
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#define IOACCEL2_STATUS_SR_TASK_COMP_BUSY 0x08
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#define IOACCEL2_STATUS_SR_TASK_COMP_RES_CON 0x18
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#define IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL 0x28
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#define IOACCEL2_STATUS_SR_TASK_COMP_ABORTED 0x40
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u8 data_present; /* low 2 bits */
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#define IOACCEL2_NO_DATAPRESENT 0x000
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#define IOACCEL2_RESPONSE_DATAPRESENT 0x001
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#define IOACCEL2_SENSE_DATA_PRESENT 0x002
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#define IOACCEL2_RESERVED 0x003
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u8 sense_data_len; /* sense/response data length */
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u8 resid_cnt[4]; /* residual count */
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u8 sense_data_buff[32]; /* sense/response data buffer */
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};
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#define IOACCEL2_64_PAD 76
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#define IOACCEL2_32_PAD 76
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#define IOACCEL2_PAD (IS_32_BIT * IOACCEL2_32_PAD + \
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IS_64_BIT * IOACCEL2_64_PAD)
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/*
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* Structure for I/O accelerator (mode 2 or m2) commands.
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* Note that this structure must be 128-byte aligned in size.
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*/
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struct io_accel2_cmd {
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u8 IU_type; /* IU Type */
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u8 direction; /* Transfer direction, 2 bits */
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u8 reply_queue; /* Reply Queue ID */
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u8 reserved1; /* Reserved */
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u32 scsi_nexus; /* Device Handle */
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struct vals32 Tag; /* cciss tag */
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u8 cdb[16]; /* SCSI Command Descriptor Block */
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u8 cciss_lun[8]; /* 8 byte SCSI address */
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u32 data_len; /* Total bytes to transfer */
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u8 cmd_priority_task_attr; /* priority and task attrs */
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#define IOACCEL2_PRIORITY_MASK 0x78
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#define IOACCEL2_ATTR_MASK 0x07
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u8 sg_count; /* Number of sg elements */
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u8 reserved3[2]; /* Reserved */
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u64 err_ptr; /* Error Pointer */
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u32 err_len; /* Error Length*/
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u8 reserved4[4]; /* Reserved */
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struct ioaccel2_sg_element sg[IOACCEL2_MAXSGENTRIES];
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struct io_accel2_scsi_response error_data;
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u8 pad[IOACCEL2_PAD];
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};
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/*
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* defines for Mode 2 command struct
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* FIXME: this can't be all I need mfm
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*/
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#define IOACCEL2_IU_TYPE 0x40
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#define IU_TYPE_TMF 0x41
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#define IOACCEL2_DIR_NO_DATA 0x00
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#define IOACCEL2_DIR_DATA_IN 0x01
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#define IOACCEL2_DIR_DATA_OUT 0x02
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/*
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* SCSI Task Management Request format for Accelerator Mode 2
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*/
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struct hpsa_tmf_struct {
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u8 iu_type; /* Information Unit Type */
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u8 reply_queue; /* Reply Queue ID */
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u8 tmf; /* Task Management Function */
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u8 reserved1; /* byte 3 Reserved */
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u32 it_nexus; /* SCSI I-T Nexus */
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u8 lun_id[8]; /* LUN ID for TMF request */
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struct vals32 Tag; /* cciss tag associated w/ request */
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struct vals32 abort_tag;/* cciss tag of SCSI cmd or task to abort */
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u64 error_ptr; /* Error Pointer */
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u32 error_len; /* Error Length */
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};
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/* Configuration Table Structure */
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struct HostWrite {
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u32 TransportRequest;
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