ARM: davinci: convert platform code to use clk_prepare/clk_unprepare
As a first step towards migrating davinci platforms to use common clock framework, replace all instances of clk_enable() with clk_prepare_enable() and clk_disable() with clk_disable_unprepare(). Until the platform is switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just adds a might_sleep() call and would work without any issues. This will make it easy later to switch to common clk based implementation of clk driver from DaVinci specific driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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@ -324,7 +324,7 @@ static __init void dm355_evm_init(void)
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if (IS_ERR(aemif))
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WARN("%s: unable to get AEMIF clock\n", __func__);
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else
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clk_enable(aemif);
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clk_prepare_enable(aemif);
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platform_add_devices(davinci_evm_devices,
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ARRAY_SIZE(davinci_evm_devices));
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@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void)
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if (IS_ERR(aemif))
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WARN("%s: unable to get AEMIF clock\n", __func__);
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else
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clk_enable(aemif);
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clk_prepare_enable(aemif);
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platform_add_devices(davinci_leopard_devices,
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ARRAY_SIZE(davinci_leopard_devices));
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@ -478,7 +478,7 @@ static void __init evm_init_cpld(void)
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aemif_clk = clk_get(NULL, "aemif");
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if (IS_ERR(aemif_clk))
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return;
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clk_enable(aemif_clk);
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clk_prepare_enable(aemif_clk);
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if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
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"cpld") == NULL)
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@ -489,7 +489,7 @@ static void __init evm_init_cpld(void)
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SECTION_SIZE);
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fail:
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pr_err("ERROR: can't map CPLD\n");
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clk_disable(aemif_clk);
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clk_disable_unprepare(aemif_clk);
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return;
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}
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@ -776,7 +776,7 @@ static __init void davinci_evm_init(void)
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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aemif_clk = clk_get(NULL, "aemif");
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clk_enable(aemif_clk);
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clk_prepare_enable(aemif_clk);
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if (HAS_ATA) {
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if (HAS_NAND || HAS_NOR)
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@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void)
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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aemif_clk = clk_get(NULL, "aemif");
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clk_enable(aemif_clk);
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clk_prepare_enable(aemif_clk);
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if (HAS_ATA) {
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if (HAS_NAND)
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@ -900,7 +900,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
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if (IS_ERR(da850_sata_clk))
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return PTR_ERR(da850_sata_clk);
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ret = clk_enable(da850_sata_clk);
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ret = clk_prepare_enable(da850_sata_clk);
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if (ret)
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goto err0;
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@ -931,7 +931,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
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return 0;
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err1:
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clk_disable(da850_sata_clk);
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clk_disable_unprepare(da850_sata_clk);
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err0:
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clk_put(da850_sata_clk);
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return ret;
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@ -939,7 +939,7 @@ err0:
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static void da850_sata_exit(struct device *dev)
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{
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clk_disable(da850_sata_clk);
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clk_disable_unprepare(da850_sata_clk);
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clk_put(da850_sata_clk);
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}
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@ -95,7 +95,7 @@ int __init davinci_serial_init(struct davinci_uart_config *info)
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continue;
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}
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clk_enable(uart_clk);
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clk_prepare_enable(uart_clk);
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p->uartclk = clk_get_rate(uart_clk);
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if (!p->membase && p->mapbase) {
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@ -379,7 +379,7 @@ static void __init davinci_timer_init(void)
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timer_clk = clk_get(NULL, "timer0");
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BUG_ON(IS_ERR(timer_clk));
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clk_enable(timer_clk);
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clk_prepare_enable(timer_clk);
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/* init timer hw */
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timer_init();
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@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev)
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wd_clk = clk_get(&pdev->dev, NULL);
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if (WARN_ON(IS_ERR(wd_clk)))
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return;
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clk_enable(wd_clk);
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clk_prepare_enable(wd_clk);
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/* disable, internal clock source */
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__raw_writel(0, base + TCR);
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