mtd: adjust kernel-docs to avoid Sphinx/kerneldoc warnings
./drivers/mtd/nand/nand_bbt.c:1: warning: no structured comments found ./include/linux/mtd/nand.h:785: ERROR: Unexpected indentation. ./drivers/mtd/nand/nand_base.c:449: WARNING: Definition list ends without a blank line; unexpected unindent. ./drivers/mtd/nand/nand_base.c:1161: ERROR: Unexpected indentation. ./drivers/mtd/nand/nand_base.c:1162: WARNING: Block quote ends without a blank line; unexpected unindent. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -970,9 +970,6 @@ hints" for an explanation.
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.. kernel-doc:: drivers/mtd/nand/nand_base.c
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:export:
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.. kernel-doc:: drivers/mtd/nand/nand_bbt.c
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:export:
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.. kernel-doc:: drivers/mtd/nand/nand_ecc.c
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:export:
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@ -442,10 +442,12 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
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* specify how to write bad block markers to OOB (chip->block_markbad).
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*
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* We try operations in the following order:
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*
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* (1) erase the affected block, to allow OOB marker to be written cleanly
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* (2) write bad block marker to OOB area of affected block (unless flag
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* NAND_BBT_NO_OOB_BBM is present)
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* (3) update the BBT
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*
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* Note that we retain the first error encountered in (2) or (3), finish the
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* procedures, and dump the error in the end.
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*/
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@ -1155,9 +1157,10 @@ int nand_reset(struct nand_chip *chip, int chipnr)
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* @mtd: mtd info
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* @ofs: offset to start unlock from
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* @len: length to unlock
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* @invert: when = 0, unlock the range of blocks within the lower and
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* @invert:
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* - when = 0, unlock the range of blocks within the lower and
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* upper boundary address
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* when = 1, unlock the range of blocks outside the boundaries
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* - when = 1, unlock the range of blocks outside the boundaries
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* of the lower and upper boundary address
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*
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* Returs unlock status.
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@ -779,7 +779,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
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* Minimum amount of bit errors per @ecc_step_ds guaranteed
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* to be correctable. If unknown, set to zero.
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* @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds,
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* also from the datasheet. It is the recommended ECC step
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* also from the datasheet. It is the recommended ECC step
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* size, if known; if unknown, set to zero.
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* @onfi_timing_mode_default: [INTERN] default ONFI timing mode. This field is
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* set to the actually used ONFI mode if the chip is
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