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clk: qcom: videocc-sm8250: use parent_hws where possible 

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-29-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2021-04-06 01:47:38 +03:00 коммит произвёл Stephen Boyd
Родитель c97b6b41e9
Коммит b707291351
1 изменённых файлов: 14 добавлений и 14 удалений
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28
drivers/clk/qcom/videocc-sm8250.c
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@ -158,8 +158,8 @@ static struct clk_regmap_div video_cc_mvs0c_div2_div_clk_src = {
.width = 2, .width = 2,
.clkr.hw.init = &(struct clk_init_data) { .clkr.hw.init = &(struct clk_init_data) {
.name = "video_cc_mvs0c_div2_div_clk_src", .name = "video_cc_mvs0c_div2_div_clk_src",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs0_clk_src.clkr.hw, &video_cc_mvs0_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -173,8 +173,8 @@ static struct clk_regmap_div video_cc_mvs0_div_clk_src = {
.width = 2, .width = 2,
.clkr.hw.init = &(struct clk_init_data) { .clkr.hw.init = &(struct clk_init_data) {
.name = "video_cc_mvs0_div_clk_src", .name = "video_cc_mvs0_div_clk_src",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs0_clk_src.clkr.hw, &video_cc_mvs0_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -188,8 +188,8 @@ static struct clk_regmap_div video_cc_mvs1c_div2_div_clk_src = {
.width = 2, .width = 2,
.clkr.hw.init = &(struct clk_init_data) { .clkr.hw.init = &(struct clk_init_data) {
.name = "video_cc_mvs1c_div2_div_clk_src", .name = "video_cc_mvs1c_div2_div_clk_src",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs1_clk_src.clkr.hw, &video_cc_mvs1_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -205,8 +205,8 @@ static struct clk_branch video_cc_mvs0c_clk = {
.enable_mask = BIT(0), .enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "video_cc_mvs0c_clk", .name = "video_cc_mvs0c_clk",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs0c_div2_div_clk_src.clkr.hw, &video_cc_mvs0c_div2_div_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -223,8 +223,8 @@ static struct clk_branch video_cc_mvs0_clk = {
.enable_mask = BIT(0), .enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "video_cc_mvs0_clk", .name = "video_cc_mvs0_clk",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs0_div_clk_src.clkr.hw, &video_cc_mvs0_div_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -241,8 +241,8 @@ static struct clk_branch video_cc_mvs1_div2_clk = {
.enable_mask = BIT(0), .enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "video_cc_mvs1_div2_clk", .name = "video_cc_mvs1_div2_clk",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs1c_div2_div_clk_src.clkr.hw, &video_cc_mvs1c_div2_div_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
@ -259,8 +259,8 @@ static struct clk_branch video_cc_mvs1c_clk = {
.enable_mask = BIT(0), .enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "video_cc_mvs1c_clk", .name = "video_cc_mvs1c_clk",
.parent_data = &(const struct clk_parent_data){ .parent_hws = (const struct clk_hw*[]){
.hw = &video_cc_mvs1c_div2_div_clk_src.clkr.hw, &video_cc_mvs1c_div2_div_clk_src.clkr.hw,
}, },
.num_parents = 1, .num_parents = 1,
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,