mmc: mmci: add variant property to not read datacnt
This patch adds a boolean property to not read datacnt register. Needed to support the STM32 sdmmc variant. MMCIDATACNT register should be read only after the data transfer is completed. When reading after an error event the read data count value may be different from the real number of data bytes transferred. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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d2141547f5
Коммит
b79220b3e0
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@ -1123,8 +1123,12 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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* can be as much as a FIFO-worth of data ahead. This
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* matters for FIFO overruns only.
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*/
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remain = readl(host->base + MMCIDATACNT);
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success = data->blksz * data->blocks - remain;
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if (!host->variant->datacnt_useless) {
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remain = readl(host->base + MMCIDATACNT);
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success = data->blksz * data->blocks - remain;
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} else {
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success = 0;
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}
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dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n",
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status_err, success);
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@ -224,6 +224,8 @@ struct mmci_host;
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* @datactrl_blksz: block size in power of two
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* @datactrl_dpsm_enable: enable value for DPSM
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* @datactrl_first: true if data must be setup before send command
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* @datacnt_useless: true if you could not use datacnt register to read
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* remaining data
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* @pwrreg_powerup: power up value for MMCIPOWER register
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* @f_max: maximum clk frequency supported by the controller.
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* @signal_direction: input/out direction of bus signals can be indicated
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@ -264,6 +266,7 @@ struct variant_data {
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unsigned int datactrl_blocksz;
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unsigned int datactrl_dpsm_enable;
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u8 datactrl_first:1;
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u8 datacnt_useless:1;
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u8 st_sdio:1;
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u8 st_clkdiv:1;
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u8 blksz_datactrl16:1;
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