Merge branch 'next-remove-ldst' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc into next
This commit is contained in:
Коммит
b7f859dda9
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@ -42,12 +42,12 @@ struct dbdma_regs {
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* DBDMA command structure. These fields are all little-endian!
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*/
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struct dbdma_cmd {
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unsigned short req_count; /* requested byte transfer count */
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unsigned short command; /* command word (has bit-fields) */
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unsigned int phy_addr; /* physical data address */
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unsigned int cmd_dep; /* command-dependent field */
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unsigned short res_count; /* residual count after completion */
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unsigned short xfer_status; /* transfer status */
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__le16 req_count; /* requested byte transfer count */
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__le16 command; /* command word (has bit-fields) */
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__le32 phy_addr; /* physical data address */
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__le32 cmd_dep; /* command-dependent field */
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__le16 res_count; /* residual count after completion */
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__le16 xfer_status; /* transfer status */
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};
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/* DBDMA command values in command field */
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@ -585,7 +585,7 @@ struct kvm_vcpu_arch {
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pgd_t *pgdir;
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u8 io_gpr; /* GPR used as IO source/target */
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u8 mmio_is_bigendian;
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u8 mmio_host_swabbed;
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u8 mmio_sign_extend;
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u8 osi_needed;
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u8 osi_enabled;
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@ -9,30 +9,4 @@
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#include <uapi/asm/swab.h>
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static __inline__ __u16 ld_le16(const volatile __u16 *addr)
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{
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__u16 val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
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return val;
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}
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static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
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{
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__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
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}
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static __inline__ __u32 ld_le32(const volatile __u32 *addr)
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{
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__u32 val;
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__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
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return val;
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}
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static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
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{
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__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
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}
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#endif /* _ASM_POWERPC_SWAB_H */
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@ -25,12 +25,12 @@
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static inline void scr_writew(u16 val, volatile u16 *addr)
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{
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st_le16(addr, val);
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*addr = cpu_to_le16(val);
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}
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static inline u16 scr_readw(volatile const u16 *addr)
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{
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return ld_le16(addr);
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return le16_to_cpu(*addr);
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}
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#define VT_BUF_HAVE_MEMCPYW
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@ -720,7 +720,7 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
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return;
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}
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if (vcpu->arch.mmio_is_bigendian) {
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if (!vcpu->arch.mmio_host_swabbed) {
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switch (run->mmio.len) {
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case 8: gpr = *(u64 *)run->mmio.data; break;
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case 4: gpr = *(u32 *)run->mmio.data; break;
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@ -728,10 +728,10 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
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case 1: gpr = *(u8 *)run->mmio.data; break;
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}
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} else {
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/* Convert BE data from userland back to LE. */
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switch (run->mmio.len) {
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case 4: gpr = ld_le32((u32 *)run->mmio.data); break;
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case 2: gpr = ld_le16((u16 *)run->mmio.data); break;
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case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
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case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
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case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
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case 1: gpr = *(u8 *)run->mmio.data; break;
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}
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}
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@ -780,14 +780,13 @@ int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
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int is_default_endian)
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{
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int idx, ret;
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int is_bigendian;
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bool host_swabbed;
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/* Pity C doesn't have a logical XOR operator */
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if (kvmppc_need_byteswap(vcpu)) {
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/* Default endianness is "little endian". */
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is_bigendian = !is_default_endian;
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host_swabbed = is_default_endian;
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} else {
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/* Default endianness is "big endian". */
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is_bigendian = is_default_endian;
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host_swabbed = !is_default_endian;
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}
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if (bytes > sizeof(run->mmio.data)) {
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@ -800,7 +799,7 @@ int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
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run->mmio.is_write = 0;
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vcpu->arch.io_gpr = rt;
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vcpu->arch.mmio_is_bigendian = is_bigendian;
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vcpu->arch.mmio_host_swabbed = host_swabbed;
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vcpu->mmio_needed = 1;
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vcpu->mmio_is_write = 0;
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vcpu->arch.mmio_sign_extend = 0;
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@ -840,14 +839,13 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
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{
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void *data = run->mmio.data;
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int idx, ret;
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int is_bigendian;
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bool host_swabbed;
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/* Pity C doesn't have a logical XOR operator */
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if (kvmppc_need_byteswap(vcpu)) {
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/* Default endianness is "little endian". */
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is_bigendian = !is_default_endian;
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host_swabbed = is_default_endian;
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} else {
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/* Default endianness is "big endian". */
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is_bigendian = is_default_endian;
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host_swabbed = !is_default_endian;
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}
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if (bytes > sizeof(run->mmio.data)) {
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@ -862,7 +860,7 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
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vcpu->mmio_is_write = 1;
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/* Store the value at the lowest bytes in 'data'. */
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if (is_bigendian) {
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if (!host_swabbed) {
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switch (bytes) {
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case 8: *(u64 *)data = val; break;
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case 4: *(u32 *)data = val; break;
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@ -870,11 +868,11 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
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case 1: *(u8 *)data = val; break;
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}
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} else {
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/* Store LE value into 'data'. */
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switch (bytes) {
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case 4: st_le32(data, val); break;
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case 2: st_le16(data, val); break;
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case 1: *(u8 *)data = val; break;
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case 8: *(u64 *)data = swab64(val); break;
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case 4: *(u32 *)data = swab32(val); break;
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case 2: *(u16 *)data = swab16(val); break;
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case 1: *(u8 *)data = val; break;
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}
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}
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@ -540,9 +540,9 @@ static void pata_macio_qc_prep(struct ata_queued_cmd *qc)
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BUG_ON (pi++ >= MAX_DCMDS);
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len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG;
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st_le16(&table->command, write ? OUTPUT_MORE: INPUT_MORE);
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st_le16(&table->req_count, len);
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st_le32(&table->phy_addr, addr);
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table->command = cpu_to_le16(write ? OUTPUT_MORE: INPUT_MORE);
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table->req_count = cpu_to_le16(len);
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table->phy_addr = cpu_to_le32(addr);
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table->cmd_dep = 0;
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table->xfer_status = 0;
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table->res_count = 0;
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@ -557,12 +557,12 @@ static void pata_macio_qc_prep(struct ata_queued_cmd *qc)
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/* Convert the last command to an input/output */
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table--;
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st_le16(&table->command, write ? OUTPUT_LAST: INPUT_LAST);
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table->command = cpu_to_le16(write ? OUTPUT_LAST: INPUT_LAST);
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table++;
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/* Add the stop command to the end of the list */
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memset(table, 0, sizeof(struct dbdma_cmd));
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st_le16(&table->command, DBDMA_STOP);
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table->command = cpu_to_le16(DBDMA_STOP);
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dev_dbgdma(priv->dev, "%s: %d DMA list entries\n", __func__, pi);
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}
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@ -440,9 +440,9 @@ static inline void seek_track(struct floppy_state *fs, int n)
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static inline void init_dma(struct dbdma_cmd *cp, int cmd,
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void *buf, int count)
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{
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st_le16(&cp->req_count, count);
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st_le16(&cp->command, cmd);
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st_le32(&cp->phy_addr, virt_to_bus(buf));
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cp->req_count = cpu_to_le16(count);
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cp->command = cpu_to_le16(cmd);
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cp->phy_addr = cpu_to_le32(virt_to_bus(buf));
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cp->xfer_status = 0;
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}
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@ -771,8 +771,8 @@ static irqreturn_t swim3_interrupt(int irq, void *dev_id)
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}
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/* turn off DMA */
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out_le32(&dr->control, (RUN | PAUSE) << 16);
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stat = ld_le16(&cp->xfer_status);
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resid = ld_le16(&cp->res_count);
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stat = le16_to_cpu(cp->xfer_status);
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resid = le16_to_cpu(cp->res_count);
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if (intr & ERROR_INTR) {
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n = fs->scount - 1 - resid / 512;
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if (n > 0) {
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@ -1170,7 +1170,7 @@ static int swim3_add_device(struct macio_dev *mdev, int index)
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fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
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memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
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st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
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fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
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if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
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swim3_mb_event(mdev, MB_FD);
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@ -1497,9 +1497,9 @@ static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
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drive->name);
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return 0;
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}
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st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE);
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st_le16(&table->req_count, tc);
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st_le32(&table->phy_addr, cur_addr);
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table->command = cpu_to_le16(wr? OUTPUT_MORE: INPUT_MORE);
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table->req_count = cpu_to_le16(tc);
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table->phy_addr = cpu_to_le32(cur_addr);
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table->cmd_dep = 0;
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table->xfer_status = 0;
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table->res_count = 0;
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@ -1513,10 +1513,10 @@ static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
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/* convert the last command to an input/output last command */
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if (count) {
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st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST);
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table[-1].command = cpu_to_le16(wr? OUTPUT_LAST: INPUT_LAST);
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/* add the stop command to the end of the list */
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memset(table, 0, sizeof(struct dbdma_cmd));
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st_le16(&table->command, DBDMA_STOP);
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table->command = cpu_to_le16(DBDMA_STOP);
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mb();
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writel(hwif->dmatable_dma, &dma->cmdptr);
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return 1;
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@ -182,31 +182,31 @@ static void rackmeter_setup_dbdma(struct rackmeter *rm)
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/* Prepare 4 dbdma commands for the 2 buffers */
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memset(cmd, 0, 4 * sizeof(struct dbdma_cmd));
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st_le16(&cmd->req_count, 4);
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st_le16(&cmd->command, STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
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st_le32(&cmd->phy_addr, rm->dma_buf_p +
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cmd->req_count = cpu_to_le16(4);
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cmd->command = cpu_to_le16(STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
|
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cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
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offsetof(struct rackmeter_dma, mark));
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st_le32(&cmd->cmd_dep, 0x02000000);
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cmd->cmd_dep = cpu_to_le32(0x02000000);
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cmd++;
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st_le16(&cmd->req_count, SAMPLE_COUNT * 4);
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st_le16(&cmd->command, OUTPUT_MORE);
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st_le32(&cmd->phy_addr, rm->dma_buf_p +
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cmd->req_count = cpu_to_le16(SAMPLE_COUNT * 4);
|
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cmd->command = cpu_to_le16(OUTPUT_MORE);
|
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cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
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offsetof(struct rackmeter_dma, buf1));
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cmd++;
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st_le16(&cmd->req_count, 4);
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st_le16(&cmd->command, STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
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st_le32(&cmd->phy_addr, rm->dma_buf_p +
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cmd->req_count = cpu_to_le16(4);
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cmd->command = cpu_to_le16(STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
|
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cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
|
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offsetof(struct rackmeter_dma, mark));
|
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st_le32(&cmd->cmd_dep, 0x01000000);
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cmd->cmd_dep = cpu_to_le32(0x01000000);
|
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cmd++;
|
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|
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st_le16(&cmd->req_count, SAMPLE_COUNT * 4);
|
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st_le16(&cmd->command, OUTPUT_MORE | BR_ALWAYS);
|
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st_le32(&cmd->phy_addr, rm->dma_buf_p +
|
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cmd->req_count = cpu_to_le16(SAMPLE_COUNT * 4);
|
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cmd->command = cpu_to_le16(OUTPUT_MORE | BR_ALWAYS);
|
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cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
|
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offsetof(struct rackmeter_dma, buf2));
|
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st_le32(&cmd->cmd_dep, rm->dma_buf_p);
|
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cmd->cmd_dep = cpu_to_le32(rm->dma_buf_p);
|
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|
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rackmeter_do_pause(rm, 0);
|
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}
|
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|
|
|
@ -416,9 +416,6 @@ static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
|
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int result = 0;
|
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unsigned char lat;
|
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struct bt878 *bt;
|
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#if defined(__powerpc__)
|
||||
unsigned int cmd;
|
||||
#endif
|
||||
unsigned int cardid;
|
||||
|
||||
printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
|
||||
|
@ -461,15 +458,6 @@ static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
|
|||
printk("irq: %d, latency: %d, memory: 0x%lx\n",
|
||||
bt->irq, lat, bt->bt878_adr);
|
||||
|
||||
|
||||
#if defined(__powerpc__)
|
||||
/* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
|
||||
/* response on cards with no firmware is not enabled by OF */
|
||||
pci_read_config_dword(dev, PCI_COMMAND, &cmd);
|
||||
cmd = (cmd | PCI_COMMAND_MEMORY);
|
||||
pci_write_config_dword(dev, PCI_COMMAND, cmd);
|
||||
#endif
|
||||
|
||||
#ifdef __sparc__
|
||||
bt->bt878_mem = (unsigned char *) bt->bt878_adr;
|
||||
#else
|
||||
|
|
|
@ -142,18 +142,7 @@ void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
|
|||
u32 irq_err_ignore);
|
||||
void bt878_stop(struct bt878 *bt);
|
||||
|
||||
#if defined(__powerpc__) /* big-endian */
|
||||
static inline void io_st_le32(volatile unsigned __iomem *addr, unsigned val)
|
||||
{
|
||||
st_le32(addr, val);
|
||||
eieio();
|
||||
}
|
||||
|
||||
#define bmtwrite(dat,adr) io_st_le32((adr),(dat))
|
||||
#define bmtread(adr) ld_le32((adr))
|
||||
#else
|
||||
#define bmtwrite(dat,adr) writel((dat), (adr))
|
||||
#define bmtread(adr) readl(adr)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -281,7 +281,7 @@ static inline void buffer_swap32(u32 *buf, int len)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < ((len + 3) / 4); i++) {
|
||||
st_le32(buf, *buf);
|
||||
*buf = swab32(*buf);
|
||||
buf++;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -483,8 +483,8 @@ static int bmac_suspend(struct macio_dev *mdev, pm_message_t state)
|
|||
bmwrite(dev, TXCFG, (config & ~TxMACEnable));
|
||||
bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */
|
||||
/* disable rx and tx dma */
|
||||
st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
/* free some skb's */
|
||||
for (i=0; i<N_RX_RING; i++) {
|
||||
if (bp->rx_bufs[i] != NULL) {
|
||||
|
@ -699,8 +699,8 @@ static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id)
|
|||
|
||||
while (1) {
|
||||
cp = &bp->rx_cmds[i];
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
residual = ld_le16(&cp->res_count);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
residual = le16_to_cpu(cp->res_count);
|
||||
if ((stat & ACTIVE) == 0)
|
||||
break;
|
||||
nb = RX_BUFLEN - residual - 2;
|
||||
|
@ -728,8 +728,8 @@ static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id)
|
|||
skb_reserve(bp->rx_bufs[i], 2);
|
||||
}
|
||||
bmac_construct_rxbuff(skb, &bp->rx_cmds[i]);
|
||||
st_le16(&cp->res_count, 0);
|
||||
st_le16(&cp->xfer_status, 0);
|
||||
cp->res_count = cpu_to_le16(0);
|
||||
cp->xfer_status = cpu_to_le16(0);
|
||||
last = i;
|
||||
if (++i >= N_RX_RING) i = 0;
|
||||
}
|
||||
|
@ -769,7 +769,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)
|
|||
|
||||
while (1) {
|
||||
cp = &bp->tx_cmds[bp->tx_empty];
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
if (txintcount < 10) {
|
||||
XXDEBUG(("bmac_txdma_xfer_stat=%#0x\n", stat));
|
||||
}
|
||||
|
@ -1411,8 +1411,8 @@ static int bmac_close(struct net_device *dev)
|
|||
bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */
|
||||
|
||||
/* disable rx and tx dma */
|
||||
st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
|
||||
|
||||
/* free some skb's */
|
||||
XXDEBUG(("bmac: free rx bufs\n"));
|
||||
|
@ -1493,7 +1493,7 @@ static void bmac_tx_timeout(unsigned long data)
|
|||
|
||||
cp = &bp->tx_cmds[bp->tx_empty];
|
||||
/* XXDEBUG((KERN_DEBUG "bmac: tx dmastat=%x %x runt=%d pr=%x fs=%x fc=%x\n", */
|
||||
/* ld_le32(&td->status), ld_le16(&cp->xfer_status), bp->tx_bad_runt, */
|
||||
/* le32_to_cpu(td->status), le16_to_cpu(cp->xfer_status), bp->tx_bad_runt, */
|
||||
/* mb->pr, mb->xmtfs, mb->fifofc)); */
|
||||
|
||||
/* turn off both tx and rx and reset the chip */
|
||||
|
@ -1506,7 +1506,7 @@ static void bmac_tx_timeout(unsigned long data)
|
|||
bmac_enable_and_reset_chip(dev);
|
||||
|
||||
/* restart rx dma */
|
||||
cp = bus_to_virt(ld_le32(&rd->cmdptr));
|
||||
cp = bus_to_virt(le32_to_cpu(rd->cmdptr));
|
||||
out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
|
||||
out_le16(&cp->xfer_status, 0);
|
||||
out_le32(&rd->cmdptr, virt_to_bus(cp));
|
||||
|
@ -1553,10 +1553,10 @@ static void dump_dbdma(volatile struct dbdma_cmd *cp,int count)
|
|||
ip = (int*)(cp+i);
|
||||
|
||||
printk("dbdma req 0x%x addr 0x%x baddr 0x%x xfer/res 0x%x\n",
|
||||
ld_le32(ip+0),
|
||||
ld_le32(ip+1),
|
||||
ld_le32(ip+2),
|
||||
ld_le32(ip+3));
|
||||
le32_to_cpup(ip+0),
|
||||
le32_to_cpup(ip+1),
|
||||
le32_to_cpup(ip+2),
|
||||
le32_to_cpup(ip+3));
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -310,7 +310,7 @@ static void dbdma_reset(volatile struct dbdma_regs __iomem *dma)
|
|||
* way on some machines.
|
||||
*/
|
||||
for (i = 200; i > 0; --i)
|
||||
if (ld_le32(&dma->control) & RUN)
|
||||
if (le32_to_cpu(dma->control) & RUN)
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
|
@ -452,21 +452,21 @@ static int mace_open(struct net_device *dev)
|
|||
data = skb->data;
|
||||
}
|
||||
mp->rx_bufs[i] = skb;
|
||||
st_le16(&cp->req_count, RX_BUFLEN);
|
||||
st_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
|
||||
st_le32(&cp->phy_addr, virt_to_bus(data));
|
||||
cp->req_count = cpu_to_le16(RX_BUFLEN);
|
||||
cp->command = cpu_to_le16(INPUT_LAST + INTR_ALWAYS);
|
||||
cp->phy_addr = cpu_to_le32(virt_to_bus(data));
|
||||
cp->xfer_status = 0;
|
||||
++cp;
|
||||
}
|
||||
mp->rx_bufs[i] = NULL;
|
||||
st_le16(&cp->command, DBDMA_STOP);
|
||||
cp->command = cpu_to_le16(DBDMA_STOP);
|
||||
mp->rx_fill = i;
|
||||
mp->rx_empty = 0;
|
||||
|
||||
/* Put a branch back to the beginning of the receive command list */
|
||||
++cp;
|
||||
st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
|
||||
st_le32(&cp->cmd_dep, virt_to_bus(mp->rx_cmds));
|
||||
cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
|
||||
cp->cmd_dep = cpu_to_le32(virt_to_bus(mp->rx_cmds));
|
||||
|
||||
/* start rx dma */
|
||||
out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
|
||||
|
@ -475,8 +475,8 @@ static int mace_open(struct net_device *dev)
|
|||
|
||||
/* put a branch at the end of the tx command list */
|
||||
cp = mp->tx_cmds + NCMDS_TX * N_TX_RING;
|
||||
st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
|
||||
st_le32(&cp->cmd_dep, virt_to_bus(mp->tx_cmds));
|
||||
cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
|
||||
cp->cmd_dep = cpu_to_le32(virt_to_bus(mp->tx_cmds));
|
||||
|
||||
/* reset tx dma */
|
||||
out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
|
||||
|
@ -507,8 +507,8 @@ static int mace_close(struct net_device *dev)
|
|||
out_8(&mb->imr, 0xff); /* disable all intrs */
|
||||
|
||||
/* disable rx and tx dma */
|
||||
st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
|
||||
st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
|
||||
rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
|
||||
td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
|
||||
|
||||
mace_clean_rings(mp);
|
||||
|
||||
|
@ -558,8 +558,8 @@ static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
|
|||
}
|
||||
mp->tx_bufs[fill] = skb;
|
||||
cp = mp->tx_cmds + NCMDS_TX * fill;
|
||||
st_le16(&cp->req_count, len);
|
||||
st_le32(&cp->phy_addr, virt_to_bus(skb->data));
|
||||
cp->req_count = cpu_to_le16(len);
|
||||
cp->phy_addr = cpu_to_le32(virt_to_bus(skb->data));
|
||||
|
||||
np = mp->tx_cmds + NCMDS_TX * next;
|
||||
out_le16(&np->command, DBDMA_STOP);
|
||||
|
@ -691,7 +691,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
|
|||
out_8(&mb->xmtfc, AUTO_PAD_XMIT);
|
||||
continue;
|
||||
}
|
||||
dstat = ld_le32(&td->status);
|
||||
dstat = le32_to_cpu(td->status);
|
||||
/* stop DMA controller */
|
||||
out_le32(&td->control, RUN << 16);
|
||||
/*
|
||||
|
@ -724,7 +724,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
|
|||
*/
|
||||
}
|
||||
cp = mp->tx_cmds + NCMDS_TX * i;
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) {
|
||||
/*
|
||||
* Check whether there were in fact 2 bytes written to
|
||||
|
@ -830,7 +830,7 @@ static void mace_tx_timeout(unsigned long data)
|
|||
mace_reset(dev);
|
||||
|
||||
/* restart rx dma */
|
||||
cp = bus_to_virt(ld_le32(&rd->cmdptr));
|
||||
cp = bus_to_virt(le32_to_cpu(rd->cmdptr));
|
||||
dbdma_reset(rd);
|
||||
out_le16(&cp->xfer_status, 0);
|
||||
out_le32(&rd->cmdptr, virt_to_bus(cp));
|
||||
|
@ -889,20 +889,20 @@ static irqreturn_t mace_rxdma_intr(int irq, void *dev_id)
|
|||
spin_lock_irqsave(&mp->lock, flags);
|
||||
for (i = mp->rx_empty; i != mp->rx_fill; ) {
|
||||
cp = mp->rx_cmds + i;
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
if ((stat & ACTIVE) == 0) {
|
||||
next = i + 1;
|
||||
if (next >= N_RX_RING)
|
||||
next = 0;
|
||||
np = mp->rx_cmds + next;
|
||||
if (next != mp->rx_fill &&
|
||||
(ld_le16(&np->xfer_status) & ACTIVE) != 0) {
|
||||
(le16_to_cpu(np->xfer_status) & ACTIVE) != 0) {
|
||||
printk(KERN_DEBUG "mace: lost a status word\n");
|
||||
++mace_lost_status;
|
||||
} else
|
||||
break;
|
||||
}
|
||||
nb = ld_le16(&cp->req_count) - ld_le16(&cp->res_count);
|
||||
nb = le16_to_cpu(cp->req_count) - le16_to_cpu(cp->res_count);
|
||||
out_le16(&cp->command, DBDMA_STOP);
|
||||
/* got a packet, have a look at it */
|
||||
skb = mp->rx_bufs[i];
|
||||
|
@ -962,13 +962,13 @@ static irqreturn_t mace_rxdma_intr(int irq, void *dev_id)
|
|||
mp->rx_bufs[i] = skb;
|
||||
}
|
||||
}
|
||||
st_le16(&cp->req_count, RX_BUFLEN);
|
||||
cp->req_count = cpu_to_le16(RX_BUFLEN);
|
||||
data = skb? skb->data: dummy_buf;
|
||||
st_le32(&cp->phy_addr, virt_to_bus(data));
|
||||
cp->phy_addr = cpu_to_le32(virt_to_bus(data));
|
||||
out_le16(&cp->xfer_status, 0);
|
||||
out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
|
||||
#if 0
|
||||
if ((ld_le32(&rd->status) & ACTIVE) != 0) {
|
||||
if ((le32_to_cpu(rd->status) & ACTIVE) != 0) {
|
||||
out_le32(&rd->control, (PAUSE << 16) | PAUSE);
|
||||
while ((in_le32(&rd->status) & ACTIVE) != 0)
|
||||
;
|
||||
|
|
|
@ -382,16 +382,16 @@ static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
|
|||
if (dma_len > 0xffff)
|
||||
panic("mac53c94: scatterlist element >= 64k");
|
||||
total += dma_len;
|
||||
st_le16(&dcmds->req_count, dma_len);
|
||||
st_le16(&dcmds->command, dma_cmd);
|
||||
st_le32(&dcmds->phy_addr, dma_addr);
|
||||
dcmds->req_count = cpu_to_le16(dma_len);
|
||||
dcmds->command = cpu_to_le16(dma_cmd);
|
||||
dcmds->phy_addr = cpu_to_le32(dma_addr);
|
||||
dcmds->xfer_status = 0;
|
||||
++dcmds;
|
||||
}
|
||||
|
||||
dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
|
||||
st_le16(&dcmds[-1].command, dma_cmd);
|
||||
st_le16(&dcmds->command, DBDMA_STOP);
|
||||
dcmds[-1].command = cpu_to_le16(dma_cmd);
|
||||
dcmds->command = cpu_to_le16(DBDMA_STOP);
|
||||
cmd->SCp.this_residual = total;
|
||||
}
|
||||
|
||||
|
|
|
@ -1287,9 +1287,9 @@ static void set_dma_cmds(struct mesh_state *ms, struct scsi_cmnd *cmd)
|
|||
}
|
||||
if (dma_len > 0xffff)
|
||||
panic("mesh: scatterlist element >= 64k");
|
||||
st_le16(&dcmds->req_count, dma_len - off);
|
||||
st_le16(&dcmds->command, dma_cmd);
|
||||
st_le32(&dcmds->phy_addr, dma_addr + off);
|
||||
dcmds->req_count = cpu_to_le16(dma_len - off);
|
||||
dcmds->command = cpu_to_le16(dma_cmd);
|
||||
dcmds->phy_addr = cpu_to_le32(dma_addr + off);
|
||||
dcmds->xfer_status = 0;
|
||||
++dcmds;
|
||||
dtot += dma_len - off;
|
||||
|
@ -1303,15 +1303,15 @@ static void set_dma_cmds(struct mesh_state *ms, struct scsi_cmnd *cmd)
|
|||
static char mesh_extra_buf[64];
|
||||
|
||||
dtot = sizeof(mesh_extra_buf);
|
||||
st_le16(&dcmds->req_count, dtot);
|
||||
st_le32(&dcmds->phy_addr, virt_to_phys(mesh_extra_buf));
|
||||
dcmds->req_count = cpu_to_le16(dtot);
|
||||
dcmds->phy_addr = cpu_to_le32(virt_to_phys(mesh_extra_buf));
|
||||
dcmds->xfer_status = 0;
|
||||
++dcmds;
|
||||
}
|
||||
dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
|
||||
st_le16(&dcmds[-1].command, dma_cmd);
|
||||
dcmds[-1].command = cpu_to_le16(dma_cmd);
|
||||
memset(dcmds, 0, sizeof(*dcmds));
|
||||
st_le16(&dcmds->command, DBDMA_STOP);
|
||||
dcmds->command = cpu_to_le16(DBDMA_STOP);
|
||||
ms->dma_count = dtot;
|
||||
}
|
||||
|
||||
|
|
|
@ -315,7 +315,7 @@ static int controlfb_blank(int blank_mode, struct fb_info *info)
|
|||
container_of(info, struct fb_info_control, info);
|
||||
unsigned ctrl;
|
||||
|
||||
ctrl = ld_le32(CNTRL_REG(p,ctrl));
|
||||
ctrl = le32_to_cpup(CNTRL_REG(p,ctrl));
|
||||
if (blank_mode > 0)
|
||||
switch (blank_mode) {
|
||||
case FB_BLANK_VSYNC_SUSPEND:
|
||||
|
|
|
@ -168,7 +168,7 @@ static int platinumfb_blank(int blank, struct fb_info *fb)
|
|||
struct fb_info_platinum *info = (struct fb_info_platinum *) fb;
|
||||
int ctrl;
|
||||
|
||||
ctrl = ld_le32(&info->platinum_regs->ctrl.r) | 0x33;
|
||||
ctrl = le32_to_cpup(&info->platinum_regs->ctrl.r) | 0x33;
|
||||
if (blank)
|
||||
--blank_mode;
|
||||
if (blank & VESA_VSYNC_SUSPEND)
|
||||
|
|
|
@ -240,7 +240,7 @@ static int snd_pmac_pcm_prepare(struct snd_pmac *chip, struct pmac_stream *rec,
|
|||
*/
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
snd_pmac_dma_stop(rec);
|
||||
st_le16(&chip->extra_dma.cmds->command, DBDMA_STOP);
|
||||
chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP);
|
||||
snd_pmac_dma_set_command(rec, &chip->extra_dma);
|
||||
snd_pmac_dma_run(rec, RUN);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
|
@ -251,15 +251,15 @@ static int snd_pmac_pcm_prepare(struct snd_pmac *chip, struct pmac_stream *rec,
|
|||
*/
|
||||
offset = runtime->dma_addr;
|
||||
for (i = 0, cp = rec->cmd.cmds; i < rec->nperiods; i++, cp++) {
|
||||
st_le32(&cp->phy_addr, offset);
|
||||
st_le16(&cp->req_count, rec->period_size);
|
||||
/*st_le16(&cp->res_count, 0);*/
|
||||
st_le16(&cp->xfer_status, 0);
|
||||
cp->phy_addr = cpu_to_le32(offset);
|
||||
cp->req_count = cpu_to_le16(rec->period_size);
|
||||
/*cp->res_count = cpu_to_le16(0);*/
|
||||
cp->xfer_status = cpu_to_le16(0);
|
||||
offset += rec->period_size;
|
||||
}
|
||||
/* make loop */
|
||||
st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
|
||||
st_le32(&cp->cmd_dep, rec->cmd.addr);
|
||||
cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
|
||||
cp->cmd_dep = cpu_to_le32(rec->cmd.addr);
|
||||
|
||||
snd_pmac_dma_stop(rec);
|
||||
snd_pmac_dma_set_command(rec, &rec->cmd);
|
||||
|
@ -328,7 +328,7 @@ static snd_pcm_uframes_t snd_pmac_pcm_pointer(struct snd_pmac *chip,
|
|||
#if 1 /* hmm.. how can we get the current dma pointer?? */
|
||||
int stat;
|
||||
volatile struct dbdma_cmd __iomem *cp = &rec->cmd.cmds[rec->cur_period];
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
if (stat & (ACTIVE|DEAD)) {
|
||||
count = in_le16(&cp->res_count);
|
||||
if (count)
|
||||
|
@ -427,26 +427,26 @@ static inline void snd_pmac_pcm_dead_xfer(struct pmac_stream *rec,
|
|||
memcpy((void *)emergency_dbdma.cmds, (void *)cp,
|
||||
sizeof(struct dbdma_cmd));
|
||||
emergency_in_use = 1;
|
||||
st_le16(&cp->xfer_status, 0);
|
||||
st_le16(&cp->req_count, rec->period_size);
|
||||
cp->xfer_status = cpu_to_le16(0);
|
||||
cp->req_count = cpu_to_le16(rec->period_size);
|
||||
cp = emergency_dbdma.cmds;
|
||||
}
|
||||
|
||||
/* now bump the values to reflect the amount
|
||||
we haven't yet shifted */
|
||||
req = ld_le16(&cp->req_count);
|
||||
res = ld_le16(&cp->res_count);
|
||||
phy = ld_le32(&cp->phy_addr);
|
||||
req = le16_to_cpu(cp->req_count);
|
||||
res = le16_to_cpu(cp->res_count);
|
||||
phy = le32_to_cpu(cp->phy_addr);
|
||||
phy += (req - res);
|
||||
st_le16(&cp->req_count, res);
|
||||
st_le16(&cp->res_count, 0);
|
||||
st_le16(&cp->xfer_status, 0);
|
||||
st_le32(&cp->phy_addr, phy);
|
||||
cp->req_count = cpu_to_le16(res);
|
||||
cp->res_count = cpu_to_le16(0);
|
||||
cp->xfer_status = cpu_to_le16(0);
|
||||
cp->phy_addr = cpu_to_le32(phy);
|
||||
|
||||
st_le32(&cp->cmd_dep, rec->cmd.addr
|
||||
cp->cmd_dep = cpu_to_le32(rec->cmd.addr
|
||||
+ sizeof(struct dbdma_cmd)*((rec->cur_period+1)%rec->nperiods));
|
||||
|
||||
st_le16(&cp->command, OUTPUT_MORE | BR_ALWAYS | INTR_ALWAYS);
|
||||
cp->command = cpu_to_le16(OUTPUT_MORE | BR_ALWAYS | INTR_ALWAYS);
|
||||
|
||||
/* point at our patched up command block */
|
||||
out_le32(&rec->dma->cmdptr, emergency_dbdma.addr);
|
||||
|
@ -475,7 +475,7 @@ static void snd_pmac_pcm_update(struct snd_pmac *chip, struct pmac_stream *rec)
|
|||
else
|
||||
cp = &rec->cmd.cmds[rec->cur_period];
|
||||
|
||||
stat = ld_le16(&cp->xfer_status);
|
||||
stat = le16_to_cpu(cp->xfer_status);
|
||||
|
||||
if (stat & DEAD) {
|
||||
snd_pmac_pcm_dead_xfer(rec, cp);
|
||||
|
@ -489,9 +489,9 @@ static void snd_pmac_pcm_update(struct snd_pmac *chip, struct pmac_stream *rec)
|
|||
break;
|
||||
|
||||
/*printk(KERN_DEBUG "update frag %d\n", rec->cur_period);*/
|
||||
st_le16(&cp->xfer_status, 0);
|
||||
st_le16(&cp->req_count, rec->period_size);
|
||||
/*st_le16(&cp->res_count, 0);*/
|
||||
cp->xfer_status = cpu_to_le16(0);
|
||||
cp->req_count = cpu_to_le16(rec->period_size);
|
||||
/*cp->res_count = cpu_to_le16(0);*/
|
||||
rec->cur_period++;
|
||||
if (rec->cur_period >= rec->nperiods) {
|
||||
rec->cur_period = 0;
|
||||
|
@ -760,11 +760,11 @@ void snd_pmac_beep_dma_start(struct snd_pmac *chip, int bytes, unsigned long add
|
|||
struct pmac_stream *rec = &chip->playback;
|
||||
|
||||
snd_pmac_dma_stop(rec);
|
||||
st_le16(&chip->extra_dma.cmds->req_count, bytes);
|
||||
st_le16(&chip->extra_dma.cmds->xfer_status, 0);
|
||||
st_le32(&chip->extra_dma.cmds->cmd_dep, chip->extra_dma.addr);
|
||||
st_le32(&chip->extra_dma.cmds->phy_addr, addr);
|
||||
st_le16(&chip->extra_dma.cmds->command, OUTPUT_MORE + BR_ALWAYS);
|
||||
chip->extra_dma.cmds->req_count = cpu_to_le16(bytes);
|
||||
chip->extra_dma.cmds->xfer_status = cpu_to_le16(0);
|
||||
chip->extra_dma.cmds->cmd_dep = cpu_to_le32(chip->extra_dma.addr);
|
||||
chip->extra_dma.cmds->phy_addr = cpu_to_le32(addr);
|
||||
chip->extra_dma.cmds->command = cpu_to_le16(OUTPUT_MORE + BR_ALWAYS);
|
||||
out_le32(&chip->awacs->control,
|
||||
(in_le32(&chip->awacs->control) & ~0x1f00)
|
||||
| (speed << 8));
|
||||
|
@ -776,7 +776,7 @@ void snd_pmac_beep_dma_start(struct snd_pmac *chip, int bytes, unsigned long add
|
|||
void snd_pmac_beep_dma_stop(struct snd_pmac *chip)
|
||||
{
|
||||
snd_pmac_dma_stop(&chip->playback);
|
||||
st_le16(&chip->extra_dma.cmds->command, DBDMA_STOP);
|
||||
chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP);
|
||||
snd_pmac_pcm_set_format(chip); /* reset format */
|
||||
}
|
||||
|
||||
|
|
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Ссылка в новой задаче