sh: mach-se evt2irq migration.
Migrate Solution Engine boards to evt2irq backed hwirq lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Родитель
a7734e5107
Коммит
b894701e7c
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@ -16,6 +16,7 @@
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#include <linux/input.h>
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#include <linux/input/sh_keysc.h>
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#include <linux/smc91x.h>
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#include <linux/sh_intc.h>
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#include <mach-se/mach/se7722.h>
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#include <mach-se/mach/mrshpc.h>
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#include <asm/machvec.h>
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@ -114,7 +115,7 @@ static struct resource sh_keysc_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 79,
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.start = evt2irq(0xbe0),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -24,6 +24,7 @@
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#include <linux/input/sh_keysc.h>
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#include <linux/usb/r8a66597.h>
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#include <linux/sh_eth.h>
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#include <linux/sh_intc.h>
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#include <linux/videodev2.h>
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#include <video/sh_mobile_lcdc.h>
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#include <media/sh_mobile_ceu.h>
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@ -197,7 +198,7 @@ static struct resource lcdc_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 106,
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.start = evt2irq(0xf40),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -224,7 +225,7 @@ static struct resource ceu0_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.start = evt2irq(0x880),
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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@ -255,7 +256,7 @@ static struct resource ceu1_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 63,
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.start = evt2irq(0x9e0),
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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@ -289,7 +290,7 @@ static struct resource fsi_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 108,
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.start = evt2irq(0xf80),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -343,7 +344,7 @@ static struct resource keysc_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 79,
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.start = evt2irq(0xbe0),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -366,7 +367,7 @@ static struct resource sh_eth_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 91,
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.start = evt2irq(0xd60),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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@ -397,8 +398,8 @@ static struct resource sh7724_usb0_host_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 65,
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.end = 65,
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.start = evt2irq(0xa20),
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.end = evt2irq(0xa20),
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
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},
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};
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@ -426,8 +427,8 @@ static struct resource sh7724_usb1_gadget_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 66,
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.end = 66,
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.start = evt2irq(0xa40),
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.end = evt2irq(0xa40),
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
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},
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};
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@ -452,7 +453,7 @@ static struct resource sdhi0_cn7_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 100,
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.start = evt2irq(0xe80),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -481,7 +482,7 @@ static struct resource sdhi1_cn8_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 23,
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.start = evt2irq(0x4e0),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -511,7 +512,7 @@ static struct resource irda_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 20,
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.start = evt2irq(0x480),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -549,7 +550,7 @@ static struct resource sh_vou_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 55,
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.start = evt2irq(0x8e0),
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -595,6 +596,7 @@ static struct i2c_board_info i2c0_devices[] = {
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#define EEPROM_DATA 0xBA20600C
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#define EEPROM_STAT 0xBA206010
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#define EEPROM_STRT 0xBA206014
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static int __init sh_eth_is_eeprom_ready(void)
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{
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int t = 10000;
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@ -651,7 +653,6 @@ extern char ms7724se_sdram_enter_end;
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extern char ms7724se_sdram_leave_start;
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extern char ms7724se_sdram_leave_end;
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static int __init arch_setup(void)
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{
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/* enable I2C device */
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@ -8,6 +8,7 @@
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*
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* Hitachi SolutionEngine support
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*/
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#include <linux/sh_intc.h>
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/* Box specific addresses. */
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@ -82,16 +83,16 @@
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#define INTC_IPRD 0xa4000018UL
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#define INTC_IPRE 0xa400001aUL
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#define IRQ0_IRQ 32
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#define IRQ1_IRQ 33
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#define IRQ0_IRQ evt2irq(0x600)
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#define IRQ1_IRQ evt2irq(0x620)
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7705)
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#define IRQ_STNIC 12
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#define IRQ_CFCARD 14
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#define IRQ_STNIC evt2irq(0x380)
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#define IRQ_CFCARD evt2irq(0x3c0)
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#else
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#define IRQ_STNIC 10
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#define IRQ_CFCARD 7
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#define IRQ_STNIC evt2irq(0x340)
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#define IRQ_CFCARD evt2irq(0x2e0)
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#endif
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/* SH Ether support (SH7710/SH7712) */
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@ -105,9 +106,9 @@
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# define PHY_ID 0x01
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#endif
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/* Ether IRQ */
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#define SH_ETH0_IRQ 80
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#define SH_ETH1_IRQ 81
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#define SH_TSU_IRQ 82
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#define SH_ETH0_IRQ evt2irq(0xc00)
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#define SH_ETH1_IRQ evt2irq(0xc20)
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#define SH_TSU_IRQ evt2irq(0xc40)
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void init_se_IRQ(void);
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@ -8,6 +8,7 @@
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*
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* SH-Mobile SolutionEngine 7343 support
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*/
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#include <linux/sh_intc.h>
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/* Box specific addresses. */
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@ -118,10 +119,10 @@
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#define FPGA_IN 0xb1400000
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#define FPGA_OUT 0xb1400002
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#define IRQ0_IRQ 32
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#define IRQ1_IRQ 33
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#define IRQ4_IRQ 36
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#define IRQ5_IRQ 37
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#define IRQ0_IRQ evt2irq(0x600)
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#define IRQ1_IRQ evt2irq(0x620)
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#define IRQ4_IRQ evt2irq(0x680)
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#define IRQ5_IRQ evt2irq(0x6a0)
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#define SE7343_FPGA_IRQ_MRSHPC0 0
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#define SE7343_FPGA_IRQ_MRSHPC1 1
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@ -11,6 +11,8 @@
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#ifndef __ASM_SH_SE7721_H
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#define __ASM_SH_SE7721_H
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#include <linux/sh_intc.h>
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#include <asm/addrspace.h>
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/* Box specific addresses. */
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@ -49,9 +51,9 @@
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#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
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#define PA_LED 0xB6800000 /* 8bit LED */
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#define PA_FPGA 0xB7000000 /* FPGA base address */
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#define PA_FPGA 0xB7000000 /* FPGA base address */
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#define MRSHPC_IRQ0 10
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#define MRSHPC_IRQ0 evt2irq(0x340)
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#define FPGA_ILSR1 (PA_FPGA + 0x02)
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#define FPGA_ILSR2 (PA_FPGA + 0x03)
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@ -13,6 +13,7 @@
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* for more details.
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*
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*/
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#include <linux/sh_intc.h>
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#include <asm/addrspace.h>
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/* Box specific addresses. */
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@ -31,7 +32,7 @@
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#define PA_PERIPHERAL 0xB0000000
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#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
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#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
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#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */
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#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */
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#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */
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#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
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#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */
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#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
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#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
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#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */
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/* GPIO */
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@ -77,8 +78,8 @@
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#define PORT_HIZCRC 0xA405015CUL
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/* IRQ */
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#define IRQ0_IRQ 32
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#define IRQ1_IRQ 33
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#define IRQ0_IRQ evt2irq(0x600)
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#define IRQ1_IRQ evt2irq(0x620)
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#define IRQ01_MODE 0xb1800000
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#define IRQ01_STS 0xb1800004
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@ -18,6 +18,7 @@
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* for more details.
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*
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*/
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#include <linux/sh_intc.h>
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#include <asm/addrspace.h>
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/* SH Eth */
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@ -35,9 +36,9 @@
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#define IRQ2_MR (0xba200028)
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/* IRQ */
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#define IRQ0_IRQ 32
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#define IRQ1_IRQ 33
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#define IRQ2_IRQ 34
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#define IRQ0_IRQ evt2irq(0x600)
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#define IRQ1_IRQ evt2irq(0x620)
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#define IRQ2_IRQ evt2irq(0x640)
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/* Bits in IRQ012 registers */
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#define SE7724_FPGA_IRQ_BASE 220
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@ -11,6 +11,7 @@
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* Modified for 7751 Solution Engine by
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* Ian da Silva and Jeremy Siegel, 2001.
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*/
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#include <linux/sh_intc.h>
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/* Box specific addresses. */
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@ -63,7 +64,7 @@
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#define BCR_ILCRF (PA_BCR + 10)
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#define BCR_ILCRG (PA_BCR + 12)
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#define IRQ_79C973 13
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#define IRQ_79C973 evt2irq(0x3a0)
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void init_7751se_IRQ(void);
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@ -12,6 +12,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/sh_intc.h>
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#include <asm/addrspace.h>
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/* Box specific addresses. */
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@ -80,13 +81,13 @@
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#define IRQPOS_PCCPW (0 * 4)
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/* IDE interrupt */
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#define IRQ_IDE0 67 /* iVDR */
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#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */
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/* SMC interrupt */
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#define SMC_IRQ 8
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#define SMC_IRQ evt2irq(0x300)
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/* SM501 interrupt */
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#define SM501_IRQ 0
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#define SM501_IRQ evt2irq(0x200)
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/* interrupt pin */
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#define IRQPIN_EXTINT1 0 /* IRQ0 pin */
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