mtd: gpmi: add subpage read support
1) Why add the subpage read support?
The page size of the nand chip becomes larger and larger, the imx6 has to
supports the 16K page or even bigger page. But sometimes, the upper layer only
needs a small part of the page, such as 512 bytes or less.
For example, ubiattach may only read 64 bytes per page.
2) We only enable the subpage read support when it meets the conditions:
<1> the chip is imx6 (or later chips) which can supports large nand page.
<2> the size of ECC parity is byte aligned.
If the size of ECC parity is not byte aligned, the calling of NAND_CMD_RNDOUT
will fail.
3) What does this patch do?
This patch will fake a virtual small page for the subpage read, and call the
gpmi_ecc_read_page() to do the real work.
In order to fake a virtual small page, the patch changes the BCH registers and
the bch_geometry{}. After the subpage read finished, we will restore them back.
4) Performace:
4.1) Tested with Toshiba TC58NVG2S0F(4096 + 224) with the following command:
#ubiattach /dev/ubi_ctrl -m 4
The detail information of /dev/mtd4 shows below:
--------------------------------------------------------------
#mtdinfo /dev/mtd4
mtd4
Name: test
Type: nand
Eraseblock size: 262144 bytes, 256.0 KiB
Amount of eraseblocks: 1856 (486539264 bytes, 464.0 MiB)
Minimum input/output unit size: 4096 bytes
Sub-page size: 4096 bytes
OOB size: 224 bytes
Character device major/minor: 90:8
Bad blocks are allowed: true
Device is writable: true
--------------------------------------------------------------
4.2) Before this patch:
--------------------------------------------------------------
[ 94.530495] UBI: attaching mtd4 to ubi0
[ 98.928850] UBI: scanning is finished
[ 98.953594] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
[ 98.958562] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
[ 98.964076] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
[ 98.969518] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
[ 98.975128] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
[ 98.979843] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128
[ 98.985878] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 2024916145
[ 98.993635] UBI: available PEBs: 0, total reserved PEBs: 1856, PEBs reserved for bad PEB handling: 40
[ 99.001807] UBI: background thread "ubi_bgt0d" started, PID 831
--------------------------------------------------------------
The attach time is about 98.9 - 94.5 = 4.4s
4.3) After this patch:
--------------------------------------------------------------
[ 286.464906] UBI: attaching mtd4 to ubi0
[ 289.186129] UBI: scanning is finished
[ 289.211416] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
[ 289.216360] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
[ 289.221858] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
[ 289.227293] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
[ 289.232878] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
[ 289.237628] UBI: user volume: 0, internal volumes: 1, max. volumes count: 128
[ 289.243553] UBI: max/mean erase counter: 1/1, WL threshold: 4096, image sequence number: 2024916145
[ 289.251348] UBI: available PEBs: 1812, total reserved PEBs: 44, PEBs reserved for bad PEB handling: 40
[ 289.259417] UBI: background thread "ubi_bgt0d" started, PID 847
--------------------------------------------------------------
The attach time is about 289.18 - 286.46 = 2.7s
4.4) The conclusion:
We achieve (4.4 - 2.7) / 4.4 = 38.6% faster in the ubiattach.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Huang Shijie
Brian Norris
Родитель
4a57d670a9
Коммит
b8e2931d16
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@ -27,6 +27,7 @@
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#include <linux/of_device.h>
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#include <linux/of_mtd.h>
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#include "gpmi-nand.h"
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#include "bch-regs.h"
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/* Resource names for the GPMI NAND driver. */
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#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
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@ -1049,6 +1050,90 @@ static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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return max_bitflips;
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}
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/* Fake a virtual small page for the subpage read */
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static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
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uint32_t offs, uint32_t len, uint8_t *buf, int page)
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{
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struct gpmi_nand_data *this = chip->priv;
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void __iomem *bch_regs = this->resources.bch_regs;
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struct bch_geometry old_geo = this->bch_geometry;
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struct bch_geometry *geo = &this->bch_geometry;
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int size = chip->ecc.size; /* ECC chunk size */
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int meta, n, page_size;
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u32 r1_old, r2_old, r1_new, r2_new;
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unsigned int max_bitflips;
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int first, last, marker_pos;
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int ecc_parity_size;
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int col = 0;
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/* The size of ECC parity */
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ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
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/* Align it with the chunk size */
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first = offs / size;
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last = (offs + len - 1) / size;
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/*
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* Find the chunk which contains the Block Marker. If this chunk is
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* in the range of [first, last], we have to read out the whole page.
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* Why? since we had swapped the data at the position of Block Marker
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* to the metadata which is bound with the chunk 0.
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*/
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marker_pos = geo->block_mark_byte_offset / size;
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if (last >= marker_pos && first <= marker_pos) {
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dev_dbg(this->dev, "page:%d, first:%d, last:%d, marker at:%d\n",
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page, first, last, marker_pos);
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return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
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}
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meta = geo->metadata_size;
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if (first) {
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col = meta + (size + ecc_parity_size) * first;
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1);
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meta = 0;
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buf = buf + first * size;
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}
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/* Save the old environment */
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r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
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r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
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/* change the BCH registers and bch_geometry{} */
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n = last - first + 1;
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page_size = meta + (size + ecc_parity_size) * n;
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r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
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BM_BCH_FLASH0LAYOUT0_META_SIZE);
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r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
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| BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
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writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
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r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
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r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
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writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
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geo->ecc_chunk_count = n;
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geo->payload_size = n * size;
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geo->page_size = page_size;
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geo->auxiliary_status_offset = ALIGN(meta, 4);
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dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
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page, offs, len, col, first, n, page_size);
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/* Read the subpage now */
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this->swap_block_mark = false;
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max_bitflips = gpmi_ecc_read_page(mtd, chip, buf, 0, page);
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/* Restore */
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writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
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writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
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this->bch_geometry = old_geo;
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this->swap_block_mark = true;
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return max_bitflips;
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}
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static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
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const uint8_t *buf, int oob_required)
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{
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@ -1565,6 +1650,17 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
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ecc->strength = bch_geo->ecc_strength;
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ecc->layout = &gpmi_hw_ecclayout;
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/*
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* We only enable the subpage read when:
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* (1) the chip is imx6, and
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* (2) the size of the ECC parity is byte aligned.
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*/
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if (GPMI_IS_MX6Q(this) &&
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((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
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ecc->read_subpage = gpmi_ecc_read_subpage;
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chip->options |= NAND_SUBPAGE_READ;
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}
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/*
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* Can we enable the extra features? such as EDO or Sync mode.
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*
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