staging: octeon-usb: Probe via device tree populated platform device.
Extract clocking parameters from the device tree, and remove now dead code and types. Signed-off-by: David Daney <david.daney@cavium.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
David Daney
Greg Kroah-Hartman
Родитель
1ea98e4c44
Коммит
b91619c284
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@ -275,13 +275,6 @@ enum cvmx_usb_pipe_flags {
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*/
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#define MAX_TRANSFER_PACKETS ((1<<10)-1)
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enum {
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USB_CLOCK_TYPE_REF_12,
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USB_CLOCK_TYPE_REF_24,
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USB_CLOCK_TYPE_REF_48,
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USB_CLOCK_TYPE_CRYSTAL_12,
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};
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/**
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* Logical transactions may take numerous low level
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* transactions, especially when splits are concerned. This
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@ -471,19 +464,6 @@ struct octeon_hcd {
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/* Returns the IO address to push/pop stuff data from the FIFOs */
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#define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
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static int octeon_usb_get_clock_type(void)
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{
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switch (cvmx_sysinfo_get()->board_type) {
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case CVMX_BOARD_TYPE_BBGW_REF:
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case CVMX_BOARD_TYPE_LANAI2_A:
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case CVMX_BOARD_TYPE_LANAI2_U:
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case CVMX_BOARD_TYPE_LANAI2_G:
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case CVMX_BOARD_TYPE_UBNT_E100:
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return USB_CLOCK_TYPE_CRYSTAL_12;
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}
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return USB_CLOCK_TYPE_REF_48;
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}
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/**
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* Read a USB 32bit CSR. It performs the necessary address swizzle
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* for 32bit CSRs and logs the value in a readable format if
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@ -582,37 +562,6 @@ static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
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return 0; /* Data0 */
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}
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/**
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* Return the number of USB ports supported by this Octeon
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* chip. If the chip doesn't support USB, or is not supported
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* by this API, a zero will be returned. Most Octeon chips
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* support one usb port, but some support two ports.
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* cvmx_usb_initialize() must be called on independent
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* struct cvmx_usb_state.
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*
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* Returns: Number of port, zero if usb isn't supported
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*/
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static int cvmx_usb_get_num_ports(void)
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{
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int arch_ports = 0;
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if (OCTEON_IS_MODEL(OCTEON_CN56XX))
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arch_ports = 1;
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else if (OCTEON_IS_MODEL(OCTEON_CN52XX))
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arch_ports = 2;
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else if (OCTEON_IS_MODEL(OCTEON_CN50XX))
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arch_ports = 1;
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else if (OCTEON_IS_MODEL(OCTEON_CN31XX))
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arch_ports = 1;
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else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
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arch_ports = 1;
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else
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arch_ports = 0;
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return arch_ports;
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}
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/**
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* Initialize a USB port for use. This must be called before any
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* other access to the Octeon USB port is made. The port starts
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@ -628,41 +577,16 @@ static int cvmx_usb_get_num_ports(void)
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* Returns: 0 or a negative error code.
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*/
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static int cvmx_usb_initialize(struct cvmx_usb_state *usb,
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int usb_port_number)
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int usb_port_number,
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enum cvmx_usb_initialize_flags flags)
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{
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union cvmx_usbnx_clk_ctl usbn_clk_ctl;
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union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
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enum cvmx_usb_initialize_flags flags = 0;
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int i;
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/* At first allow 0-1 for the usb port number */
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if ((usb_port_number < 0) || (usb_port_number > 1))
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return -EINVAL;
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/* For all chips except 52XX there is only one port */
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if (!OCTEON_IS_MODEL(OCTEON_CN52XX) && (usb_port_number > 0))
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return -EINVAL;
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/* Try to determine clock type automatically */
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if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12) {
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/* Only 12 MHZ crystals are supported */
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;
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} else {
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
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switch (octeon_usb_get_clock_type()) {
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case USB_CLOCK_TYPE_REF_12:
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
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break;
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case USB_CLOCK_TYPE_REF_24:
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
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break;
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case USB_CLOCK_TYPE_REF_48:
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
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break;
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default:
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return -EINVAL;
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break;
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}
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}
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memset(usb, 0, sizeof(*usb));
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usb->init_flags = flags;
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@ -3431,7 +3355,6 @@ static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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return 0;
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}
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static const struct hc_driver octeon_hc_driver = {
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.description = "Octeon USB",
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.product_desc = "Octeon Host Controller",
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@ -3448,15 +3371,74 @@ static const struct hc_driver octeon_hc_driver = {
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.hub_control = octeon_usb_hub_control,
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};
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static int octeon_usb_driver_probe(struct device *dev)
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static int octeon_usb_probe(struct platform_device *pdev)
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{
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int status;
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int usb_num = to_platform_device(dev)->id;
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int irq = platform_get_irq(to_platform_device(dev), 0);
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int initialize_flags;
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int usb_num;
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struct resource *res_mem;
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struct device_node *usbn_node;
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int irq = platform_get_irq(pdev, 0);
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struct device *dev = &pdev->dev;
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struct octeon_hcd *priv;
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struct usb_hcd *hcd;
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unsigned long flags;
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u32 clock_rate = 48000000;
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bool is_crystal_clock = false;
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const char *clock_type;
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int i;
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if (dev->of_node == NULL) {
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dev_err(dev, "Error: empty of_node\n");
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return -ENXIO;
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}
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usbn_node = dev->of_node->parent;
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i = of_property_read_u32(usbn_node,
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"refclk-frequency", &clock_rate);
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if (i) {
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dev_err(dev, "No USBN \"refclk-frequency\"\n");
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return -ENXIO;
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}
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switch (clock_rate) {
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case 12000000:
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initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
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break;
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case 24000000:
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initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
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break;
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case 48000000:
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initialize_flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
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break;
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default:
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dev_err(dev, "Illebal USBN \"refclk-frequency\" %u\n", clock_rate);
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return -ENXIO;
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}
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i = of_property_read_string(usbn_node,
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"refclk-type", &clock_type);
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if (!i && strcmp("crystal", clock_type) == 0)
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is_crystal_clock = true;
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if (is_crystal_clock)
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initialize_flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;
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else
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initialize_flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
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res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res_mem == NULL) {
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dev_err(dev, "found no memory resource\n");
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return -ENXIO;
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}
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usb_num = (res_mem->start >> 44) & 1;
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if (irq < 0) {
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/* Defective device tree, but we know how to fix it. */
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irq_hw_number_t hwirq = usb_num ? (1 << 6) + 17 : 56;
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irq = irq_create_mapping(NULL, hwirq);
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}
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/*
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* Set the DMA mask to 64bits so we get buffers already translated for
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@ -3465,90 +3447,6 @@ static int octeon_usb_driver_probe(struct device *dev)
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dev->coherent_dma_mask = ~0;
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dev->dma_mask = &dev->coherent_dma_mask;
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hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev));
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if (!hcd) {
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dev_dbg(dev, "Failed to allocate memory for HCD\n");
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return -1;
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}
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hcd->uses_new_polling = 1;
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priv = (struct octeon_hcd *)hcd->hcd_priv;
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spin_lock_init(&priv->lock);
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tasklet_init(&priv->dequeue_tasklet, octeon_usb_urb_dequeue_work, (unsigned long)priv);
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INIT_LIST_HEAD(&priv->dequeue_list);
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status = cvmx_usb_initialize(&priv->usb, usb_num);
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if (status) {
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dev_dbg(dev, "USB initialization failed with %d\n", status);
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kfree(hcd);
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return -1;
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}
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/* This delay is needed for CN3010, but I don't know why... */
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mdelay(10);
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spin_lock_irqsave(&priv->lock, flags);
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cvmx_usb_poll(&priv->usb);
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spin_unlock_irqrestore(&priv->lock, flags);
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status = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (status) {
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dev_dbg(dev, "USB add HCD failed with %d\n", status);
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kfree(hcd);
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return -1;
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}
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device_wakeup_enable(hcd->self.controller);
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dev_dbg(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq);
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return 0;
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}
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static int octeon_usb_driver_remove(struct device *dev)
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{
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int status;
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct octeon_hcd *priv = hcd_to_octeon(hcd);
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unsigned long flags;
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usb_remove_hcd(hcd);
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tasklet_kill(&priv->dequeue_tasklet);
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spin_lock_irqsave(&priv->lock, flags);
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status = cvmx_usb_shutdown(&priv->usb);
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spin_unlock_irqrestore(&priv->lock, flags);
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if (status)
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dev_dbg(dev, "USB shutdown failed with %d\n", status);
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kfree(hcd);
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return 0;
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}
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static struct device_driver octeon_usb_driver = {
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.name = "OcteonUSB",
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.bus = &platform_bus_type,
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.probe = octeon_usb_driver_probe,
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.remove = octeon_usb_driver_remove,
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};
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#define MAX_USB_PORTS 10
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static struct platform_device *pdev_glob[MAX_USB_PORTS];
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static int octeon_usb_registered;
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static int __init octeon_usb_module_init(void)
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{
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int num_devices = cvmx_usb_get_num_ports();
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int device;
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if (usb_disabled() || num_devices == 0)
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return -ENODEV;
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if (driver_register(&octeon_usb_driver))
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return -ENOMEM;
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octeon_usb_registered = 1;
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/*
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* Only cn52XX and cn56XX have DWC_OTG USB hardware and the
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* IOB priority registers. Under heavy network load USB
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@ -3569,41 +3467,102 @@ static int __init octeon_usb_module_init(void)
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cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64);
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}
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for (device = 0; device < num_devices; device++) {
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struct resource irq_resource;
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struct platform_device *pdev;
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memset(&irq_resource, 0, sizeof(irq_resource));
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irq_resource.start = (device == 0) ? OCTEON_IRQ_USB0 : OCTEON_IRQ_USB1;
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irq_resource.end = irq_resource.start;
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irq_resource.flags = IORESOURCE_IRQ;
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pdev = platform_device_register_simple((char *)octeon_usb_driver. name, device, &irq_resource, 1);
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if (IS_ERR(pdev)) {
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driver_unregister(&octeon_usb_driver);
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octeon_usb_registered = 0;
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return PTR_ERR(pdev);
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}
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if (device < MAX_USB_PORTS)
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pdev_glob[device] = pdev;
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hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev));
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if (!hcd) {
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dev_dbg(dev, "Failed to allocate memory for HCD\n");
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return -1;
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}
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hcd->uses_new_polling = 1;
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priv = (struct octeon_hcd *)hcd->hcd_priv;
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spin_lock_init(&priv->lock);
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tasklet_init(&priv->dequeue_tasklet, octeon_usb_urb_dequeue_work, (unsigned long)priv);
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INIT_LIST_HEAD(&priv->dequeue_list);
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status = cvmx_usb_initialize(&priv->usb, usb_num, initialize_flags);
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if (status) {
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dev_dbg(dev, "USB initialization failed with %d\n", status);
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kfree(hcd);
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return -1;
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}
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/* This delay is needed for CN3010, but I don't know why... */
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mdelay(10);
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spin_lock_irqsave(&priv->lock, flags);
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cvmx_usb_poll(&priv->usb);
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spin_unlock_irqrestore(&priv->lock, flags);
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status = usb_add_hcd(hcd, irq, 0);
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if (status) {
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dev_dbg(dev, "USB add HCD failed with %d\n", status);
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kfree(hcd);
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return -1;
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}
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device_wakeup_enable(hcd->self.controller);
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dev_info(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq);
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return 0;
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}
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static void __exit octeon_usb_module_cleanup(void)
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static int octeon_usb_remove(struct platform_device *pdev)
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{
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int i;
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int status;
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struct device *dev = &pdev->dev;
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct octeon_hcd *priv = hcd_to_octeon(hcd);
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unsigned long flags;
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for (i = 0; i < MAX_USB_PORTS; i++)
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if (pdev_glob[i]) {
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platform_device_unregister(pdev_glob[i]);
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pdev_glob[i] = NULL;
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}
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if (octeon_usb_registered)
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driver_unregister(&octeon_usb_driver);
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usb_remove_hcd(hcd);
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tasklet_kill(&priv->dequeue_tasklet);
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spin_lock_irqsave(&priv->lock, flags);
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status = cvmx_usb_shutdown(&priv->usb);
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spin_unlock_irqrestore(&priv->lock, flags);
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if (status)
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dev_dbg(dev, "USB shutdown failed with %d\n", status);
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kfree(hcd);
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return 0;
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}
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static struct of_device_id octeon_usb_match[] = {
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{
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.compatible = "cavium,octeon-5750-usbc",
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},
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{},
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};
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static struct platform_driver octeon_usb_driver = {
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.driver = {
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.name = "OcteonUSB",
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.owner = THIS_MODULE,
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.of_match_table = octeon_usb_match,
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},
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.probe = octeon_usb_probe,
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.remove = octeon_usb_remove,
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};
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static int __init octeon_usb_driver_init(void)
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{
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if (usb_disabled())
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return 0;
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return platform_driver_register(&octeon_usb_driver);
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}
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module_init(octeon_usb_driver_init);
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static void __exit octeon_usb_driver_exit(void)
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{
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if (usb_disabled())
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return;
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platform_driver_unregister(&octeon_usb_driver);
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}
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module_exit(octeon_usb_driver_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
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MODULE_DESCRIPTION("Cavium Networks Octeon USB Host driver.");
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module_init(octeon_usb_module_init);
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module_exit(octeon_usb_module_cleanup);
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MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
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MODULE_DESCRIPTION("Cavium Inc. OCTEON USB Host driver.");
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