bnx2x: use pcie_get_minimum_link()
Use common code for getting the pcie link speed/width for debug printing. Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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b91e1a1aa5
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@ -2491,11 +2491,5 @@ enum {
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#define NUM_MACS 8
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#define NUM_MACS 8
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enum bnx2x_pci_bus_speed {
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BNX2X_PCI_LINK_SPEED_2500 = 2500,
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BNX2X_PCI_LINK_SPEED_5000 = 5000,
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BNX2X_PCI_LINK_SPEED_8000 = 8000
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};
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void bnx2x_set_local_cmng(struct bnx2x *bp);
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void bnx2x_set_local_cmng(struct bnx2x *bp);
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#endif /* bnx2x.h */
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#endif /* bnx2x.h */
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@ -12274,28 +12274,6 @@ err_out:
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return rc;
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return rc;
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}
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}
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static void bnx2x_get_pcie_width_speed(struct bnx2x *bp, int *width,
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enum bnx2x_pci_bus_speed *speed)
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{
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u32 link_speed, val = 0;
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pci_read_config_dword(bp->pdev, PCICFG_LINK_CONTROL, &val);
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*width = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
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link_speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
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switch (link_speed) {
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case 3:
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*speed = BNX2X_PCI_LINK_SPEED_8000;
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break;
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case 2:
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*speed = BNX2X_PCI_LINK_SPEED_5000;
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break;
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default:
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*speed = BNX2X_PCI_LINK_SPEED_2500;
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}
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}
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static int bnx2x_check_firmware(struct bnx2x *bp)
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static int bnx2x_check_firmware(struct bnx2x *bp)
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{
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{
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const struct firmware *firmware = bp->firmware;
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const struct firmware *firmware = bp->firmware;
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@ -12652,8 +12630,8 @@ static int bnx2x_init_one(struct pci_dev *pdev,
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{
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{
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struct net_device *dev = NULL;
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struct net_device *dev = NULL;
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struct bnx2x *bp;
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struct bnx2x *bp;
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int pcie_width;
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enum pcie_link_width pcie_width;
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enum bnx2x_pci_bus_speed pcie_speed;
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enum pci_bus_speed pcie_speed;
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int rc, max_non_def_sbs;
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int rc, max_non_def_sbs;
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int rx_count, tx_count, rss_count, doorbell_size;
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int rx_count, tx_count, rss_count, doorbell_size;
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int max_cos_est;
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int max_cos_est;
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@ -12802,18 +12780,19 @@ static int bnx2x_init_one(struct pci_dev *pdev,
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dev_addr_add(bp->dev, bp->fip_mac, NETDEV_HW_ADDR_T_SAN);
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dev_addr_add(bp->dev, bp->fip_mac, NETDEV_HW_ADDR_T_SAN);
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rtnl_unlock();
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rtnl_unlock();
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}
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}
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if (pcie_get_minimum_link(bp->pdev, &pcie_speed, &pcie_width) ||
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bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed);
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pcie_speed == PCI_SPEED_UNKNOWN ||
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BNX2X_DEV_INFO("got pcie width %d and speed %d\n",
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pcie_width == PCIE_LNK_WIDTH_UNKNOWN)
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pcie_width, pcie_speed);
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BNX2X_DEV_INFO("Failed to determine PCI Express Bandwidth\n");
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else
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BNX2X_DEV_INFO("%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n",
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BNX2X_DEV_INFO(
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"%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n",
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board_info[ent->driver_data].name,
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board_info[ent->driver_data].name,
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(CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
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(CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
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pcie_width,
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pcie_width,
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pcie_speed == BNX2X_PCI_LINK_SPEED_2500 ? "2.5GHz" :
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pcie_speed == PCIE_SPEED_2_5GT ? "2.5GHz" :
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pcie_speed == BNX2X_PCI_LINK_SPEED_5000 ? "5.0GHz" :
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pcie_speed == PCIE_SPEED_5_0GT ? "5.0GHz" :
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pcie_speed == BNX2X_PCI_LINK_SPEED_8000 ? "8.0GHz" :
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pcie_speed == PCIE_SPEED_8_0GT ? "8.0GHz" :
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"Unknown",
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"Unknown",
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dev->base_addr, bp->pdev->irq, dev->dev_addr);
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dev->base_addr, bp->pdev->irq, dev->dev_addr);
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